JPH0447394B2 - - Google Patents

Info

Publication number
JPH0447394B2
JPH0447394B2 JP10425682A JP10425682A JPH0447394B2 JP H0447394 B2 JPH0447394 B2 JP H0447394B2 JP 10425682 A JP10425682 A JP 10425682A JP 10425682 A JP10425682 A JP 10425682A JP H0447394 B2 JPH0447394 B2 JP H0447394B2
Authority
JP
Japan
Prior art keywords
bit
code word
followed
bits
codeword
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP10425682A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58220213A (ja
Inventor
Masatoshi Shinho
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP57104256A priority Critical patent/JPS58220213A/ja
Publication of JPS58220213A publication Critical patent/JPS58220213A/ja
Publication of JPH0447394B2 publication Critical patent/JPH0447394B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Dc Digital Transmission (AREA)
JP57104256A 1982-06-16 1982-06-16 ディジタル変調方法 Granted JPS58220213A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57104256A JPS58220213A (ja) 1982-06-16 1982-06-16 ディジタル変調方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57104256A JPS58220213A (ja) 1982-06-16 1982-06-16 ディジタル変調方法

Publications (2)

Publication Number Publication Date
JPS58220213A JPS58220213A (ja) 1983-12-21
JPH0447394B2 true JPH0447394B2 (cs) 1992-08-03

Family

ID=14375843

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57104256A Granted JPS58220213A (ja) 1982-06-16 1982-06-16 ディジタル変調方法

Country Status (1)

Country Link
JP (1) JPS58220213A (cs)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW280974B (cs) * 1994-07-08 1996-07-11 Nippon Bickter Kk

Also Published As

Publication number Publication date
JPS58220213A (ja) 1983-12-21

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