JPH0445981B2 - - Google Patents
Info
- Publication number
- JPH0445981B2 JPH0445981B2 JP56211715A JP21171581A JPH0445981B2 JP H0445981 B2 JPH0445981 B2 JP H0445981B2 JP 56211715 A JP56211715 A JP 56211715A JP 21171581 A JP21171581 A JP 21171581A JP H0445981 B2 JPH0445981 B2 JP H0445981B2
- Authority
- JP
- Japan
- Prior art keywords
- chip
- semiconductor
- terminal
- external conductive
- pin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H10W90/00—
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3447—Lead-in-hole components
-
- H10W70/60—
-
- H10W70/682—
-
- H10W72/801—
-
- H10W72/884—
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- H10W90/722—
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- H10W90/734—
-
- H10W90/754—
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56211715A JPS58112348A (ja) | 1981-12-25 | 1981-12-25 | 半導体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56211715A JPS58112348A (ja) | 1981-12-25 | 1981-12-25 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58112348A JPS58112348A (ja) | 1983-07-04 |
| JPH0445981B2 true JPH0445981B2 (cg-RX-API-DMAC10.html) | 1992-07-28 |
Family
ID=16610394
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56211715A Granted JPS58112348A (ja) | 1981-12-25 | 1981-12-25 | 半導体装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58112348A (cg-RX-API-DMAC10.html) |
Families Citing this family (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5943556A (ja) * | 1982-09-03 | 1984-03-10 | Matsushita Electric Ind Co Ltd | 端面電極形成方法 |
| JPS60181072U (ja) * | 1984-05-12 | 1985-12-02 | イビデン株式会社 | チツプ搭載用プリント配線基板 |
| KR900008647B1 (ko) * | 1986-03-20 | 1990-11-26 | 후지쓰 가부시끼가이샤 | 3차원 집적회로와 그의 제조방법 |
| JPH07109873B2 (ja) * | 1988-07-05 | 1995-11-22 | 株式会社東芝 | 半導体記憶装置 |
| US5499160A (en) * | 1990-08-01 | 1996-03-12 | Staktek Corporation | High density integrated circuit module with snap-on rail assemblies |
| AU8519891A (en) * | 1990-08-01 | 1992-03-02 | Staktek Corporation | Ultra high density integrated circuit packages, method and apparatus |
| US5377077A (en) * | 1990-08-01 | 1994-12-27 | Staktek Corporation | Ultra high density integrated circuit packages method and apparatus |
| US5367766A (en) * | 1990-08-01 | 1994-11-29 | Staktek Corporation | Ultra high density integrated circuit packages method |
| US5475920A (en) * | 1990-08-01 | 1995-12-19 | Burns; Carmen D. | Method of assembling ultra high density integrated circuit packages |
| US5446620A (en) * | 1990-08-01 | 1995-08-29 | Staktek Corporation | Ultra high density integrated circuit packages |
| US5448450A (en) * | 1991-08-15 | 1995-09-05 | Staktek Corporation | Lead-on-chip integrated circuit apparatus |
| US5702985A (en) * | 1992-06-26 | 1997-12-30 | Staktek Corporation | Hermetically sealed ceramic integrated circuit heat dissipating package fabrication method |
| US5484959A (en) * | 1992-12-11 | 1996-01-16 | Staktek Corporation | High density lead-on-package fabrication method and apparatus |
| US6205654B1 (en) | 1992-12-11 | 2001-03-27 | Staktek Group L.P. | Method of manufacturing a surface mount package |
| US5541812A (en) * | 1995-05-22 | 1996-07-30 | Burns; Carmen D. | Bus communication system for stacked high density integrated circuit packages having an intermediate lead frame |
| US5369056A (en) | 1993-03-29 | 1994-11-29 | Staktek Corporation | Warp-resistent ultra-thin integrated circuit package fabrication method |
| US5455740A (en) * | 1994-03-07 | 1995-10-03 | Staktek Corporation | Bus communication system for stacked high density integrated circuit packages |
| US5801437A (en) * | 1993-03-29 | 1998-09-01 | Staktek Corporation | Three-dimensional warp-resistant integrated circuit module method and apparatus |
| US5644161A (en) * | 1993-03-29 | 1997-07-01 | Staktek Corporation | Ultra-high density warp-resistant memory module |
| US5588205A (en) * | 1995-01-24 | 1996-12-31 | Staktek Corporation | Method of manufacturing a high density integrated circuit module having complex electrical interconnect rails |
| US6025642A (en) * | 1995-08-17 | 2000-02-15 | Staktek Corporation | Ultra high density integrated circuit packages |
| JPH09283652A (ja) * | 1996-04-15 | 1997-10-31 | Nec Corp | 電子デバイス組立体 |
| US5945732A (en) * | 1997-03-12 | 1999-08-31 | Staktek Corporation | Apparatus and method of manufacturing a warp resistant thermally conductive integrated circuit package |
| US6572387B2 (en) | 1999-09-24 | 2003-06-03 | Staktek Group, L.P. | Flexible circuit connector for stacked chip module |
| US6462408B1 (en) | 2001-03-27 | 2002-10-08 | Staktek Group, L.P. | Contact member stacking system and method |
| US7371609B2 (en) | 2001-10-26 | 2008-05-13 | Staktek Group L.P. | Stacked module systems and methods |
| US7485951B2 (en) | 2001-10-26 | 2009-02-03 | Entorian Technologies, Lp | Modularized die stacking system and method |
| US6940729B2 (en) | 2001-10-26 | 2005-09-06 | Staktek Group L.P. | Integrated circuit stacking system and method |
| US6914324B2 (en) | 2001-10-26 | 2005-07-05 | Staktek Group L.P. | Memory expansion and chip scale stacking system and method |
| US6576992B1 (en) | 2001-10-26 | 2003-06-10 | Staktek Group L.P. | Chip scale stacking system and method |
| US6956284B2 (en) | 2001-10-26 | 2005-10-18 | Staktek Group L.P. | Integrated circuit stacking system and method |
| KR100800140B1 (ko) | 2005-06-27 | 2008-02-01 | 주식회사 하이닉스반도체 | 패키지 스택 |
-
1981
- 1981-12-25 JP JP56211715A patent/JPS58112348A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58112348A (ja) | 1983-07-04 |
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