JPH0441503B2 - - Google Patents

Info

Publication number
JPH0441503B2
JPH0441503B2 JP58249707A JP24970783A JPH0441503B2 JP H0441503 B2 JPH0441503 B2 JP H0441503B2 JP 58249707 A JP58249707 A JP 58249707A JP 24970783 A JP24970783 A JP 24970783A JP H0441503 B2 JPH0441503 B2 JP H0441503B2
Authority
JP
Japan
Prior art keywords
bipolar transistor
mosfet
offset
semiconductor device
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58249707A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60137055A (ja
Inventor
Takahide Ikeda
Tokuo Watanabe
Hideo Pponma
Kyoshi Tsukuda
Osamu Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58249707A priority Critical patent/JPS60137055A/ja
Publication of JPS60137055A publication Critical patent/JPS60137055A/ja
Publication of JPH0441503B2 publication Critical patent/JPH0441503B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H10D84/401—Combinations of FETs or IGBTs with BJTs

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP58249707A 1983-12-26 1983-12-26 Ｍｏｓｆｅｔとバイポ−ラトランジスタとが混在する半導体装置及びその製造方法 Granted JPS60137055A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58249707A JPS60137055A (ja) 1983-12-26 1983-12-26 Ｍｏｓｆｅｔとバイポ−ラトランジスタとが混在する半導体装置及びその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58249707A JPS60137055A (ja) 1983-12-26 1983-12-26 Ｍｏｓｆｅｔとバイポ−ラトランジスタとが混在する半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
JPS60137055A JPS60137055A (ja) 1985-07-20
JPH0441503B2 true JPH0441503B2 (cs) 1992-07-08

Family

ID=17197001

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58249707A Granted JPS60137055A (ja) 1983-12-26 1983-12-26 Ｍｏｓｆｅｔとバイポ−ラトランジスタとが混在する半導体装置及びその製造方法

Country Status (1)

Country Link
JP (1) JPS60137055A (cs)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4752589A (en) * 1985-12-17 1988-06-21 Siemens Aktiengesellschaft Process for the production of bipolar transistors and complementary MOS transistors on a common silicon substrate
EP0256315B1 (de) * 1986-08-13 1992-01-29 Siemens Aktiengesellschaft Integrierte Bipolar- und komplementäre MOS-Transistoren auf einem gemeinsamen Substrat enthaltende Schaltung und Verfahren zu ihrer Herstellung
JPH02103960A (ja) * 1988-10-13 1990-04-17 Mitsubishi Electric Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
JPS60137055A (ja) 1985-07-20

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