JPH04367234A - Manufacture of field-effect transistor - Google Patents

Abstract

PURPOSE:To process, with good uniformity and with good reproducibility, a distance (a recess, distance), from the end part of a gate electrode up to the end part of a recess, wherein an element characteristic is decided in a field- effect transistor, of a recess structure, wherein aluminum is used as the gate electrode. CONSTITUTION:An SiO2 film 3 is deposited on an N-type active layer 2 on a semiinsulating GaAs substrate 1; the SiO2 film 3 is dry-etched by making use of a resist 4 as a mask. Then, a resist 5 having a gate opening pattern is formed; after that, the SiO2 film 3 is etched completely by using a hydrofluoric acid-based aqueous solution. Then, the surface of the N-type active layer 2 is etched down to a prescribed depth. Then, aluminum 6 is deposited; it is lifted off; a gate electrode is completed. A recess width L1 can be decided by the SiO2 film 3 which has been processed in advance by the dry etching operation whose uniformity and reproducibility, are excellent.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to field effect transistors, and more particularly to a method for forming gate electrodes by aluminum lift-off.

0002

[Prior art] Field effect transistor for ultra-high frequency band (
GaAsMES (hereinafter referred to as FET)
tal Schottky) FET is common. Usually, aluminum is used for the gate electrode of a GaAs MESFET because it has excellent workability and good Schottky characteristics.

Aluminum gate GaAsME according to prior art
A method for manufacturing an SFET will be described with reference to FIGS. 2(a) to 2(d).

First, as shown in FIG. 2(a), an N-type active layer 2 is formed on a semi-insulating GaAs substrate 1, and then an SiO
2. Deposit film 3 and form resist 5 having a gate opening pattern.

Next, as shown in FIG. 2(b), using the resist 5 as a mask, the SiO2 film 3 is side-etched using a diluted HF solution to a predetermined width not only in the depth direction but also in the lateral direction. . Next, the surface of the N-type active layer 2 is etched using the SiO2 film 3 as a mask.

Next, as shown in FIG. 2(c), aluminum is deposited on the entire surface with the resist 5 remaining.

Next, as shown in FIG. 2(d), unnecessary aluminum 6 is removed together with the resist 5 by lift-off to obtain an aluminum gate electrode 6.

The recessed structure in which the N-type active layer 2 made of GaAs is etched is important for improving characteristics such as reducing parasitic resistance and improving breakdown voltage.

Regarding the distance L2 between the gate end and the recess end shown in FIGS. 2(b) to 2(d), there is a trade-off relationship between parasitic resistance and breakdown voltage. This distance L2 is a very important parameter in determining the device characteristics, so
A process with good controllability and reproducibility of this L2 is desired.

0010

[Problem to be solved by the invention] In FIG. 2(b),
The recess distance L2 is determined by the gate length and SiO2
This is the amount of side etching of the film 3.

[0011] Recent advances in lithography technology, including high-resolution resists, have been remarkable. It has become possible to control the gate length of about 0.5 μm with good reproducibility.

On the other hand, the method of determining the recess width using side etching of the SiO2 film 3 has no choice but to rely on wet etching. The etching depth, that is, the distance L2, varies greatly between lots, between wafers, and within a wafer due to differences in the circulation of the solution due to subtle changes in the composition, temperature, or stirring of the diluted HF solution for etching, or minute variations in the opening width. .

[0013] As described above, there has been a major problem in the uniformity and reproducibility of the recess distance L2, which has a serious effect on the characteristics.

[0014]

[Means for Solving the Problems] A method for manufacturing a field effect transistor according to the present invention includes a step of forming an active layer on one main surface of a semiconductor substrate and then depositing an insulating film, and forming a region to be recessed on the insulating film. forming a covering first resist; dry etching the insulating film using the first resist as a mask; and removing the first resist to form an opening in a region on the insulating film where a gate electrode is to be formed. forming a second resist, etching the entire insulating film by wet etching using the second resist as a mask, and etching the active layer to a predetermined depth; and etching the active layer to a predetermined depth. The method includes a step of forming a gate electrode made of aluminum by vapor deposition and lift-off.

[0015]

[Example] Regarding an example of the present invention, FIGS. 1(a) to (
This will be explained with reference to e).

First, as shown in FIG. 1(a), CVD is applied to an N-type active layer 2 formed on a semi-insulating GaAs substrate 1.
A SiO2 film 3 having a thickness of 5000 Å is deposited by the method. Next, the resist 4 having a predetermined recess width L1 is patterned, and the SiO2 film 3 is dry etched using CF4 gas.

Next, as shown in FIG. 1(b), after removing the resist 4, a resist 5 having a gate opening is formed again on the SiO2 film 3. Then, as shown in FIG.

Next, as shown in FIG. 1(c), SiO2 is heated using a mixed solution of, for example, hydrofluoric acid and ammonium fluoride.
The film 3 is sufficiently etched until it is completely removed. Next, the N-type active layer 2 is prepared using a mixture of sulfuric acid and hydrogen peroxide, for example.
A recess is formed by etching the surface to a predetermined depth.

Next, as shown in FIG. 1(d), aluminum 6 is deposited on the entire surface.

Next, as shown in FIG. 1E, unnecessary aluminum 6 is removed together with the resist 5 by a lift-off method to complete a gate electrode made of aluminum 6.

Width L1 of the SiO2 film 3 shown in FIG. 1(a)
is processed by dry etching with excellent uniformity and reproducibility, so the difference in dimensional conversion is small. S shown in Figure 1(b)
In etching the iO2 film 3, delicate etching control is not necessary, and it is sufficient to simply perform etching for a sufficiently long time until the SiO2 film 3 is completely removed.

[0022] In this way, the recess width L1 can be machined with sufficient accuracy. Since wet etching is used for the SiO2 film 3 as in the prior art, there is no risk of surface damage in the vicinity of the gate of the active layer.

[0023]

Effect of the Invention: Conventionally, the recess distance was determined by side etching of the SiO2 film, but in the present invention, the recess distance was determined by side etching of the SiO2 film.
2 Determined by the width of the membrane. As a result, we were able to achieve a recess distance that has a significant effect on device characteristics with good uniformity and reproducibility.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view showing an embodiment of the present invention in the order of steps.

FIG. 2 is a cross-sectional view illustrating a conventional method for manufacturing a field effect transistor in order of steps;

[Explanation of symbols]

1 Semi-insulating GaAs substrate 2 N-type active layer 3 SiO2 film 4 Resist for SiO2 film processing 5 Resist for gate opening 6 Aluminum L1 Recess width L2 Recess distance

Claims (1)

[Claims] 1. A step of forming an active layer on one principal surface of a semiconductor substrate and then depositing an insulating film; forming a first resist covering a region to be recessed on the insulating film;
a step of dry etching the insulating film using the resist as a mask; a step of removing the first resist and forming a second resist having an opening in a region where the gate electrode is to be formed on the insulating film; The insulating film is completely etched by wet etching using the resist as a mask, and then the active layer is etched to a predetermined depth. Aluminum is deposited on the entire surface and then lifted off to form a gate electrode made of the aluminum. A method of manufacturing a field effect transistor, comprising a step of forming.