JPH0433154B2 - - Google Patents

Info

Publication number
JPH0433154B2
JPH0433154B2 JP58201618A JP20161883A JPH0433154B2 JP H0433154 B2 JPH0433154 B2 JP H0433154B2 JP 58201618 A JP58201618 A JP 58201618A JP 20161883 A JP20161883 A JP 20161883A JP H0433154 B2 JPH0433154 B2 JP H0433154B2
Authority
JP
Japan
Prior art keywords
resin
resin layer
paste
curing
printing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58201618A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6092691A (ja
Inventor
Eiichi Tsunashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP58201618A priority Critical patent/JPS6092691A/ja
Publication of JPS6092691A publication Critical patent/JPS6092691A/ja
Publication of JPH0433154B2 publication Critical patent/JPH0433154B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/1012—Auxiliary members for bump connectors, e.g. spacers
    • H01L2224/10122—Auxiliary members for bump connectors, e.g. spacers being formed on the semiconductor or solid-state body to be connected
    • H01L2224/10125—Reinforcing structures
    • H01L2224/10126—Bump collar
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Wire Bonding (AREA)
JP58201618A 1983-10-27 1983-10-27 フィルムベ−ス印刷配線板 Granted JPS6092691A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58201618A JPS6092691A (ja) 1983-10-27 1983-10-27 フィルムベ−ス印刷配線板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58201618A JPS6092691A (ja) 1983-10-27 1983-10-27 フィルムベ−ス印刷配線板

Publications (2)

Publication Number Publication Date
JPS6092691A JPS6092691A (ja) 1985-05-24
JPH0433154B2 true JPH0433154B2 (cg-RX-API-DMAC7.html) 1992-06-02

Family

ID=16444040

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58201618A Granted JPS6092691A (ja) 1983-10-27 1983-10-27 フィルムベ−ス印刷配線板

Country Status (1)

Country Link
JP (1) JPS6092691A (cg-RX-API-DMAC7.html)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49108564A (cg-RX-API-DMAC7.html) * 1973-02-20 1974-10-16
JPS51123241A (en) * 1975-04-18 1976-10-27 Matsushita Electric Ind Co Ltd Method of coating conductive material on insulators
JPS5348462A (en) * 1976-10-15 1978-05-01 Hitachi Ltd Wire bonding method

Also Published As

Publication number Publication date
JPS6092691A (ja) 1985-05-24

Similar Documents

Publication Publication Date Title
US6625037B2 (en) Printed circuit board and method manufacturing the same
JP3051700B2 (ja) 素子内蔵多層配線基板の製造方法
KR0142178B1 (ko) 전장부품접합방법 및 모듈 및 다층기판
WO2000049655A1 (fr) Dispositif a semi-conducteur, carte a circuit, procede de fabrication de carte a circuit et dispositif electronique
CN1217576A (zh) 电路板平面化方法和制造半导体器件的方法
JPH0433154B2 (cg-RX-API-DMAC7.html)
JP3560996B2 (ja) 実装用配線板およびこれを用いた実装方法
JPH0345909B2 (cg-RX-API-DMAC7.html)
JP2607906B2 (ja) 回路基板
JPS6092690A (ja) ガラスエポキシベ−ス印刷配線板
JP2002280715A (ja) 電子回路の鉛レス接続方法
JPS6346592B2 (cg-RX-API-DMAC7.html)
KR20070031525A (ko) 전자부품용 이방전도성 접착테이프, 그 제조방법 및이로부터 접속된 전자기기
JPH05259221A (ja) 電子部品搭載装置
JP2986466B2 (ja) 回路基板平坦化方法及び半導体装置の製造方法
JP2001068815A (ja) 配線板とその製造方法
JPS6119196A (ja) プリント板接着構造
JPS60165790A (ja) 電子回路基板の製造方法
JPS63299242A (ja) 半導体装置の接続方法
JPS6293993A (ja) 電子回路装置とその実装方法
JPS6355796B2 (cg-RX-API-DMAC7.html)
JPH02191332A (ja) 電子部品
JPS6255883A (ja) 電気的接続方法
JPS59204296A (ja) 印刷回路用基板
JP2004193504A (ja) 多数個取り配線基板