JPH04326575A - Integrated circuit device - Google Patents

Abstract

PURPOSE:To minimize the space unused or unnecessary for an input/output circuit so as to reduce the occupancy of the input/output circuit in whole chip space by fitting bonding pads corresponding to respective input buffer and output buffer in each input/output circuit for the integrated circuit device. CONSTITUTION:An input/output circuit 1 composed of an input buffer 11 and an output buffer 12 for interface is formed on a semiconductor chip 6 comprising basic cells such as a gate circuit, etc., and bonding pads 2 and 3 are placed in a manner to correspond to the buffer 11 and the buffer 12 respectively. These pads 2 and 3 function as electrodes for electrical connections such as the external terminals of leads and others, and the internal circuit on the chip 6. Furthermore, the number of pads used as the pad 2 is one and it is arranged for the buffer 11 of the circuit 1 and is connected electrically using a bonding wire 4. On the other hand, the number of pads used as the pad 3 is one and it is arranged for the buffer 12 and is connected electrically using a bonding wire 5.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit device, and more particularly to a master slice type integrated circuit device.

0002

2. Description of the Related Art As shown in FIG. 3, a conventional integrated circuit device of this type includes an input buffer 71 for interfacing between the inside and the outside, and an output buffer 71 on a semiconductor chip 6 on which basic cells such as gate circuits are formed. The input/output circuit 7 includes a buffer 72 and a corresponding bonding pad 2. The bonding pad 2 is an electrode for electrical connection between an external terminal such as a lead and an internal circuit on the semiconductor chip 4.

One bonding pad 2 is arranged for one set of input/output circuits 7. By selecting either the input buffer 71 or the output buffer 72 according to the circuit configuration and electrically connecting it to the corresponding bonding pad 2 with the bonding wire 4, either the input circuit or the output circuit can be configured. Ta.

Generally, compared to the input buffer 71,
Since the output buffer 72 handles a large current, the size and number of constituent transistors used are approximately three times larger. Figure 3
In this example, the length of the input buffer 71 is about 0.2 mm, while the length of the output buffer 72 is about 0.8 mm, so the length of the input/output circuit 7 is about 1 mm.

Here, an example of the usage ratio of input/output circuits in this type of integrated circuit device is as follows:
40% of the output buffer 72 compared to 60% of the output buffer 72. That is, 60% of input buffer 71 and output buffer 72
40% of the area was unused and wasted space.

[0006]

[Problems to be Solved by the Invention] In the conventional integrated circuit device described above, only one bonding pad for electrical connection to external terminals is arranged for one set of input/output circuits, so it is preferable not to use it. If the buffer is left as it is, it becomes a wasted area on the semiconductor chip, so it has the disadvantage that the input/output circuit occupies a large area with respect to the entire chip, increasing the chip size.

[0007]

[Means for Solving the Problems] An integrated circuit device of the present invention includes a plurality of basic cells formed in advance on a semiconductor chip,
A master slice type integrated circuit device comprising a plurality of input/output circuits each including an input buffer and an output buffer, comprising bonding pads respectively corresponding to the input buffer and the output buffer of each of the input/output circuits. has been done.

[0008]

Embodiments Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a partial plan view showing an embodiment of the integrated circuit device of the present invention.

As shown in FIG. 1, the integrated circuit device of this embodiment has an input buffer 11 and an output buffer 12 for interfacing between the inside and the outside on a semiconductor chip 6 on which basic cells such as gate circuits are formed. an input/output circuit 1 consisting of;
It is configured to include bonding pads 2 and 3 corresponding to an input buffer 11 and an output buffer 12, respectively. The bonding pads 2 and 3 are electrodes for electrical connection between external terminals such as leads and internal circuits on the semiconductor chip 6.

One bonding pad 2 is arranged for each input buffer 11 of the input/output circuit 1, and is electrically connected by a bonding wire 4. Further, one bonding good 3 is arranged for each output buffer 12 of the input/output circuit 1, and is electrically connected to it by a bonding wire 5.

As shown in FIG. 1, when the input/output circuit 1 is placed directly opposite the two bonding pads 2 and 3, the width of the frontage is approximately 100% smaller than that of the conventional case where the input/output circuit 1 is placed directly opposite the two bonding pads 2 and 3. Since the size can be doubled, if the required area is the same, the lengthwise dimension can be reduced by that amount, that is, about 1/2.

Assuming that the usage ratio of the input/output circuits is 40% for the input buffer and 60% for the output buffer, as in the conventional example, the input/output is 1:1 as shown in FIG. In the case of 1, one input buffer 11 becomes unused for every three sets of input/output circuits 1. That is, the unused rate of the input buffer 11 is 33%, and the unused rate of the output circuit 12 is 0%. This is the 6th input buffer of the conventional example.
This is a significant improvement compared to the unused rate of 0% and 40% of the output buffer.

Next, a second embodiment of the present invention will be explained.

FIG. 2 is a partial plan view showing a second embodiment of the integrated circuit device of the present invention.

The difference between the present embodiment shown in FIG. 2 and the first embodiment shown in FIG. 1 is that the input/output circuit 8 includes a second output buffer in addition to the output buffer 12 in the first embodiment. 1
3, and correspondingly, a bonding pad 9 and a bonding wire 10 are added.

Here, the usage ratio of the input/output circuits is set to 40% of the input buffer as in the first embodiment and the conventional example.
% and the output buffer is 60%. By combining the two input/output circuits of the first embodiment shown in FIG. 1 and the two input/output circuits of the second embodiment shown in FIG. 2, the unused rate of both the input buffer and the output buffer is 0%. becomes. Therefore, there is an advantage that a semiconductor chip with no wasted area can be constructed.

[0018]

As explained above, the integrated circuit device of the present invention is provided with bonding pads corresponding to the input buffer and output buffer of each input/output circuit, thereby reducing unused waste in the input/output circuit. Since the occurrence of such areas can be reduced, the area occupied by the input/output circuits relative to the entire chip can be reduced, which has the effect of suppressing the increase in chip size.

[Brief explanation of drawings]

FIG. 1 is a partial plan view showing an embodiment of an integrated circuit device of the present invention.

FIG. 2 is a partial plan view showing a second embodiment of the integrated circuit device of the present invention.

FIG. 3 is a partial plan view showing an example of a conventional integrated circuit device.

[Explanation of symbols]

1, 7, 8 Input/output circuit 2, 3, 9 Bonding pad 4, 5, 10
Bonding wire 6 Semiconductor chip 11, 71 Input buffer

Claims (1)

[Claims] 1. A master slice type integrated circuit device comprising a plurality of basic cells formed in advance on a semiconductor chip and a plurality of input/output circuits each including an input buffer and an output buffer, wherein each of the input/output circuits An integrated circuit device comprising bonding pads corresponding to the input buffer and the output buffer, respectively.