JPH012345A - Semiconductor integrated circuit device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] A resistor forming a protection circuit is placed under a bonding pad. In this way, semiconductor integrated circuits can be even more highly integrated.

[Industrial application field] The present invention relates to the structure of a semiconductor integrated circuit device (IC).

2. Description of the Related Art In order to operate semiconductor integrated circuits such as ICs and LSIs at high speeds, technological development is progressing toward higher integration and higher density. The higher the integration and density, the more
This is because performance is improved.

Therefore, the placement of resistors and the like that occupy a relatively large area is a major issue, and a rational configuration thereof is desired.

[Prior Art] As is well known, an IC constitutes an electronic circuit including not only active elements such as transistors and diodes, but also passive elements such as resistors and capacitors.

Therefore, it is important not only to miniaturize active elements such as transistors, but also to miniaturize passive elements, and to arrange wiring that connects these elements as short as possible. The layout is CA D (Cup
This is done by making full use of Tor Aided Design. Naturally, this means that the passive elements necessary for the active elements are placed in the vicinity of the active elements that require the passive elements.

Incidentally, such an IC has an input/output terminal, and is provided with a bonding pad for connecting an integrated circuit formed on the semiconductor chip to an external circuit. FIG. 3 shows a plan view of the semiconductor chip 1, and 2 is a bonding pad, and the bonding pad and the lead-out terminal of the package containing the semiconductor chip are connected by a bonding wire (not shown). , the bonding pads are arranged around the chip periphery so as to connect with the shortest possible bonding wire.

However, on the other hand, while ICs have the great advantage of having low power consumption and being able to operate with very weak power, on the other hand, when large amounts of external electricity, such as static electricity, enters the input/output terminals from the input/output terminals as described above, the IC immediately This type of static electricity has a high voltage of several hundred volts and can easily be input from human clothing.

Therefore, to prevent damage caused by external static electricity, a protection circuit is provided at the input/output end, that is, near the bonding pad, and FIG. 4 shows one row of the protection circuit. 2 in the figure is the input/output terminal (bonding pad),! ? ρ is a resistor made of polycrystalline silicon, Rf is a resistor made of a diffusion layer, 3 is an aluminum gate field transistor, 4 is a protection transistor,
5 is an input/output circuit. Not all such protection circuits are equipped with the above two resistors and two transistors, but some protection circuits are composed of one resistor and one transistor, as shown in Figure 4. is a diagram illustrating all the elements constituting the protection circuit.

[Problems to be solved by the invention] However, in order to increase the withstand voltage of the resistor itself, polycrystalline silicon resistors Rp have recently been mainly used for the resistors constituting the above-mentioned protection circuit from the viewpoint of overvoltage protection. It is often When using the polycrystalline silicon resistor Rp, it is made of a wide range of polycrystalline silicon so that the polycrystalline silicon resistor Rp itself does not melt due to current caused by static electricity. The resistance value per length is low (because the length becomes long, as a result,
The shape of the polycrystalline silicon resistor Rp is long and wide, and such a large polycrystalline silicon resistor Rp is disposed.

Furthermore, it is a good idea to place a protection circuit including such a polycrystalline silicon resistor Rp around the bonding pad from the viewpoint of static electricity countermeasures. A protection circuit such as the following is provided.

FIG. 5 shows a conventional configuration in which a polycrystalline silicon resistor Rp (indicated by a broken line) is arranged around the bonding pad 2, and other transistors 3.
4 is relatively small compared to this polycrystalline silicon resistor, so it does not pose much of a problem.

In FIG. 5, the area surrounded by the dotted line is the aluminum wiring layer 6 including the bonding pad portion 2 (indicated by the solid line). The width is about 70 to 80 μm. Therefore, the distance between the bonding pads becomes wider, and as a result, the size of the semiconductor chip becomes larger. Polycrystalline silicon resistors are a major problem that hinders the high integration of ICs.

The present invention proposes an IC that reduces such problems.

[Means for Solving the Problems] The object is achieved by a semiconductor integrated circuit device in which a resistor is disposed under a bonding pad.

[Operation: A polycrystalline silicon resistor is provided under the bonding pad to form a multilayer structure. This will further improve the degree of integration of the IC.

[Example] Hereinafter, embodiments will be described in detail with reference to the drawings.

Fig. 1 shows the structure of the bonding pad portion according to the present invention, and Fig.
It is an A' sectional view. The symbols in the figure are: 2 is a bonding pad made of aluminum, Rp is a polycrystalline silicon resistor, and 6 is an aluminum wiring layer (electrode part of resistor Rp).
, 7.8 is an insulating film, 9 is a cover insulating film, and IO is a semiconductor substrate.

In this way, the polycrystalline silicon resistor Rp is formed between the insulating films 7 and 8 and placed under the bonding pad 2. In this case, since it is configured in multiple layers, the area around the conventional bonding pad 2, for example, the bonding band 2
Compared to the conventional case in which the polycrystalline silicon resistor Rp is placed in the gap, the gap can be significantly narrowed.
This makes it possible to further increase the density and integration of semiconductor chips.

Further, FIG. 2 shows another configuration according to the present invention,
In this example, only a plan view is shown, and the same symbols are attached to the same parts as in FIG. 1. Such a polycrystalline silicon resistor has a resistance value of several hundred ohms to several kiloohms, and may be longer than the length of the bonding pad 2, in which case the bonding pad is 2 to form a resistor.

Now, the embodiment explained above is a resistor of a protection circuit made of polycrystalline silicon, but a resistor made of high-melting point metal silicide or a resistor made of a diffusion layer can be similarly configured to achieve high density. Furthermore, even at the input/output end of an IC not provided with a protection circuit, for example, the input resistor at the input end can be arranged in a similar configuration, and high integration can be similarly achieved.

[Effects of the Invention] As is clear from the above description, according to the present invention, the resistor, which occupies a large area, is constructed in multiple layers under the bonding pad, which greatly contributes to improving the degree of integration of the IC. be.

[Brief explanation of the drawing]

1(al) and (b) are diagrams showing the configuration of the bonding pad portion according to the present invention, FIG. 2 is a diagram showing another configuration of the bonding pad portion according to the present invention, and FIG. 3 is a plan view of the semiconductor chip. Figure 4 is a diagram showing a protection circuit, and Figure 5 is a diagram showing the configuration of a conventional bonding pad part. In the figure, l is a semiconductor chip, 2 is a bonding pad (input/output end), and Rp is a polycrystalline silicon resistor, 6 is an aluminum wiring layer, 7.8 is an insulating film, 9 is a cover insulating film, 10 is a semiconductor substrate; Shi Ni To ka 4 Yoshihiko Hanshin E demonstration diagram No. 21 1,4 tips Kuni = + 2 side mouth Figure 3 A 1 mitan C poem ”) Gu・lrbu Kotome Composition Appeal Sword No. 5
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Claims (1)

[Claims] A semiconductor integrated circuit device characterized in that a resistor for an input protection circuit is disposed under a bonding pad with an insulating layer interposed therebetween.