JPH04215497A - Manufacture of multilayer circuit board - Google Patents
Manufacture of multilayer circuit boardInfo
- Publication number
- JPH04215497A JPH04215497A JP40210990A JP40210990A JPH04215497A JP H04215497 A JPH04215497 A JP H04215497A JP 40210990 A JP40210990 A JP 40210990A JP 40210990 A JP40210990 A JP 40210990A JP H04215497 A JPH04215497 A JP H04215497A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- resin
- prepreg
- inner layer
- layer circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 13
- 229920005989 resin Polymers 0.000 claims abstract description 47
- 239000011347 resin Substances 0.000 claims abstract description 47
- 239000011521 glass Substances 0.000 claims abstract description 35
- 239000000463 material Substances 0.000 claims abstract description 24
- 239000004745 nonwoven fabric Substances 0.000 claims description 21
- 239000000155 melt Substances 0.000 claims description 10
- 239000002648 laminated material Substances 0.000 claims description 8
- 229910052751 metal Inorganic materials 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 7
- 239000011888 foil Substances 0.000 claims description 6
- 238000010438 heat treatment Methods 0.000 claims description 6
- 238000003825 pressing Methods 0.000 claims description 2
- 239000004744 fabric Substances 0.000 abstract description 5
- 238000010030 laminating Methods 0.000 abstract description 2
- 239000003822 epoxy resin Substances 0.000 description 9
- 229920000647 polyepoxide Polymers 0.000 description 9
- 238000000465 moulding Methods 0.000 description 7
- 239000002759 woven fabric Substances 0.000 description 7
- 208000002352 blister Diseases 0.000 description 5
- 230000000052 comparative effect Effects 0.000 description 5
- 230000007547 defect Effects 0.000 description 5
- 238000007747 plating Methods 0.000 description 4
- 229920001721 polyimide Polymers 0.000 description 4
- 239000009719 polyimide resin Substances 0.000 description 4
- 238000005476 soldering Methods 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 239000011889 copper foil Substances 0.000 description 3
- 238000001035 drying Methods 0.000 description 3
- 239000011256 inorganic filler Substances 0.000 description 3
- 229910003475 inorganic filler Inorganic materials 0.000 description 3
- 238000003475 lamination Methods 0.000 description 3
- 230000000149 penetrating effect Effects 0.000 description 3
- 239000000843 powder Substances 0.000 description 3
- 229920001187 thermosetting polymer Polymers 0.000 description 3
- 239000011800 void material Substances 0.000 description 3
- JYEUMXHLPRZUAT-UHFFFAOYSA-N 1,2,3-triazine Chemical compound C1=CN=NN=C1 JYEUMXHLPRZUAT-UHFFFAOYSA-N 0.000 description 2
- 239000003365 glass fiber Substances 0.000 description 2
- WNROFYMDJYEPJX-UHFFFAOYSA-K aluminium hydroxide Chemical compound [OH-].[OH-].[OH-].[Al+3] WNROFYMDJYEPJX-UHFFFAOYSA-K 0.000 description 1
- 235000013405 beer Nutrition 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- QGBSISYHAICWAH-UHFFFAOYSA-N dicyandiamide Chemical compound NC(N)=NC#N QGBSISYHAICWAH-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- -1 etc. are layered Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000002966 varnish Substances 0.000 description 1
- 238000009941 weaving Methods 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【０００１】0001
【産業上の利用分野】本発明は、インナービアホールを
形成した多層回路板の製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a multilayer circuit board having inner via holes formed therein.
【０００２】0002
【従来の技術】近年、プリント回路板について配線の高
密度化、高性能化等の要求が強くなっており、回路の多
層化が進んでいる。このように回路の多層化が進むと、
各層間の回路の接続は回路板の表裏に貫通するスルーホ
ールだけでは確保することができず、インナービアホー
ルによっても接続をおこなう必要がある。2. Description of the Related Art In recent years, there has been a strong demand for higher wiring density and higher performance for printed circuit boards, and circuits are becoming more multi-layered. As circuits become more multilayered,
The circuit connection between each layer cannot be ensured only by through holes penetrating the front and back of the circuit board, but also needs to be connected by inner via holes.
【０００３】図３は多層回路板Ａの一例を示すものであ
り、多層回路板Ａの表裏に貫通するスルーホールＢを設
けると共に内層ＣにインナービアホールＤを設け、スル
ーホールＢの内周に設けたメッキ層Ｇで外層Ｅ及び一部
の内層Ｃに形成した回路Ｆを電気的に導通接続し、また
インナービアホールＤの内周のメッキ層Ｈでこのインナ
ービアホールＤを設けた内層Ｃに形成した回路Ｆ同士を
導通接続するようにしてある。FIG. 3 shows an example of a multilayer circuit board A, in which a through hole B penetrating the front and back sides of the multilayer circuit board A is provided, an inner via hole D is provided in an inner layer C, and an inner via hole D is provided on the inner periphery of the through hole B. A plating layer G formed on the outer layer E and a part of the inner layer C was electrically connected to the circuit F, and a plating layer H on the inner periphery of the inner via hole D was formed on the inner layer C in which the inner via hole D was provided. The circuits F are electrically connected to each other.
【０００４】そして上記のようなインナービアホールを
有する多層回路板の製造は、ビアホール（スルーホール
と称されることもある）を表裏に貫通させて設けた内層
回路板にプリプレグを介して他の内層回路板や外層回路
板、金属箔等の積層材を重ね、これを加熱加圧して多層
成形することによっておこなうことができる。[0004] In manufacturing a multilayer circuit board having inner via holes as described above, an inner layer circuit board having via holes (sometimes called through holes) penetrating the front and back sides is connected to other inner layers via prepreg. This can be done by stacking laminated materials such as circuit boards, outer layer circuit boards, metal foils, etc., and heating and pressurizing them to form multilayers.
【０００５】[0005]
【発明が解決しようとする課題】しかしこのようにして
多層回路板を製造するにあたって、内層回路板のビアホ
ール内には加熱加圧成形をおこなう際にプリプレグの樹
脂が溶融流動して充填されることになるが、プリプレグ
からビアホールに流れる樹脂量が不足するとビアホール
内に空隙が発生するおそれがある。そしてこのように空
隙が発生すると完成された多層回路板の耐熱性等に問題
が生じるものである。すなわち、多層回路板を製造する
工程で半田付け等の際に高温（約２６０〜３００℃）が
作用することになるが、多層回路板の内部に空隙が存在
するとこの部分でフクレ等の欠陥が生じることになるの
である。[Problem to be Solved by the Invention] However, when manufacturing a multilayer circuit board in this manner, prepreg resin melts and flows and fills the via holes of the inner layer circuit board during heating and pressure molding. However, if the amount of resin flowing from the prepreg to the via hole is insufficient, there is a risk that voids will occur within the via hole. When such voids occur, problems arise in the heat resistance of the completed multilayer circuit board. In other words, high temperatures (approximately 260 to 300 degrees Celsius) are applied during soldering, etc. in the process of manufacturing multilayer circuit boards, but if there are voids inside the multilayer circuit board, defects such as blisters may occur in these areas. This is what will happen.
【０００６】本発明は上記の点に鑑みてなされたもので
あり、耐熱性に優れた多層回路板の製造方法を提供する
ことを目的とするものである。The present invention has been made in view of the above points, and it is an object of the present invention to provide a method for manufacturing a multilayer circuit board with excellent heat resistance.
【０００７】[0007]
【課題を解決するための手段】本発明に係る多層回路板
の製造方法は、ビアホール１を設けた内層回路板２に複
数枚のプリプレグ３を介して他の内層回路板や外層回路
板、金属箔等の積層材４を重ね、これを加熱加圧して多
層成形することによって多層回路板を製造するにあたっ
て、上記複数枚のプリプレグ３のうち内層回路板２に接
するよう配置されるプリプレグ３ａとしてガラス不織布
を基材として樹脂含浸して作成されたものを用いること
を特徴とするものである。[Means for Solving the Problems] A method for manufacturing a multilayer circuit board according to the present invention is to connect an inner layer circuit board 2 provided with a via hole 1 with other inner layer circuit boards, outer layer circuit boards, and metals via a plurality of prepregs 3. In manufacturing a multilayer circuit board by stacking laminated materials 4 such as foils and heating and pressurizing them to form a multilayer, glass is used as the prepreg 3a arranged so as to be in contact with the inner layer circuit board 2 among the plurality of prepregs 3. It is characterized by using a nonwoven fabric as a base material impregnated with resin.
【０００８】以下、本発明を詳細に説明する。内層回路
板２としては常法で作成されたものを用いることができ
る。すなわち、ガラス基材等にエポキシ樹脂やポリイミ
ド樹脂、トリアジン樹脂等の熱硬化性樹脂を含浸乾燥し
て調製したプリプレグを複数枚重ねると共にその両側に
銅箔等の金属箔を重ねて加熱加圧成形することによって
、金属箔張り積層板を作成し、この金属箔をエッチング
加工等して表裏面に回路１０の形成をおこなうことによ
って内層回路板２を作成することができる。そして本発
明ではビアホール１を設けた内層回路板２を用いる。
ビアホール１は内層回路板２の表裏に貫通するように形
成されているものであり、その内周にはスルーホールメ
ッキ処理によってメッキ層１１を設けて表裏の回路１０
を導通接続するようにしてある。The present invention will be explained in detail below. As the inner layer circuit board 2, one made by a conventional method can be used. In other words, multiple sheets of prepreg prepared by impregnating and drying a thermosetting resin such as epoxy resin, polyimide resin, or triazine resin into a glass base material, etc. are layered, and metal foil such as copper foil is layered on both sides, followed by heating and pressure molding. By doing this, a metal foil-clad laminate is created, and the inner layer circuit board 2 can be created by etching the metal foil and forming the circuit 10 on the front and back surfaces. In the present invention, an inner layer circuit board 2 provided with via holes 1 is used. The via hole 1 is formed so as to penetrate the front and back sides of the inner layer circuit board 2, and a plating layer 11 is provided on the inner periphery by through-hole plating to connect the circuit 10 on the front and back sides.
It is designed to connect for continuity.
【０００９】上記のようにビアホール１を設けた内層回
路板２を用いて多層回路板を製造するにあたっては、図
１に示すように名内層回路板２の表裏両面に複数枚のプ
リプレグ３を重ねると共にこのプリプレグ３を介して積
層材４を重ねる。積層材４としては、他の内層回路板や
外層回路板、銅箔等の金属箔などを用いることができる
。In manufacturing a multilayer circuit board using the inner layer circuit board 2 provided with the via holes 1 as described above, a plurality of prepregs 3 are stacked on both the front and back surfaces of the inner layer circuit board 2, as shown in FIG. At the same time, a laminated material 4 is stacked with this prepreg 3 interposed therebetween. As the laminated material 4, other inner layer circuit boards, outer layer circuit boards, metal foils such as copper foils, etc. can be used.
【００１０】プリプレグ３としては、基材にエポキシ樹
脂やポリイミド樹脂、トリアジン樹脂等の熱硬化性樹脂
を含浸乾燥して作成したものを用いることができるが、
本発明ではこの複数枚のプリプレグ３のうち、内層回路
板２に接するよう配置されるプリプレグ３ａは、基材と
してガラス不織布を用いてこのガラス不織布に上記熱硬
化性樹脂のワニスを含浸乾燥して作成したものを使用す
る。プリプレグ３の基材としては一般的にガラス織布が
使用されるが、ガラス織布はガラス繊維の糸を織成して
形成されているために布の組織が緻密であって樹脂を多
量に含浸させることが難しく、また加圧されてもガラス
織布はあまり圧縮されないために含浸された樹脂は容易
に流れ出していかないが、これに対してガラス不織布は
ガラス繊維が絡み合った状態の組織で織成されていない
ために布の組織は粗の状態にあり、樹脂を多量に含浸さ
せることが容易であると共に、ガラス不織布は加圧され
ると容易に圧縮されるために含浸された樹脂は容易に流
れ出していくものである。このプリプレグ３ａのガラス
不織布基材としては単重が２０〜１５０ｇ／ｍ２の範囲
のものが好ましく、樹脂の含浸量はガラス不織布７０ｇ
に対して樹脂固形分で８０〜２００ｇ程度の範囲が好ま
しい。従ってプリプレグ３ａはレジンコテントが５０重
量％以上になるように多量の樹脂を含浸して作成するの
が好ましい。またこのプリプレグ３ａに含浸する樹脂は
その溶融粘度が５０〜５０００ＰＳ（ポイズ：測定温度
１３０℃−以下同じ）、特に１００〜３０００ＰＳの範
囲になるように調整するのが好ましく、溶融粘度は少な
くとも５０００ＰＳ以下に設定するのが良い。またこの
プリプレグ３ａの樹脂にはガラス粉や水酸化アルミニウ
ムなどの無機質充填剤を配合することができる。樹脂に
無機質充填剤を配合してもガラス不織布の基材には容易
に含浸させることができるものであり、７０ｇのガラス
不織布基材に対して無機質充填剤は４０〜１５０ｇ程度
の範囲で使用するのが好ましい。The prepreg 3 can be made by impregnating and drying a thermosetting resin such as epoxy resin, polyimide resin, or triazine resin into a base material.
In the present invention, among the plurality of prepregs 3, the prepreg 3a arranged so as to be in contact with the inner layer circuit board 2 is made by using a glass nonwoven fabric as a base material, impregnating the glass nonwoven fabric with the above-mentioned thermosetting resin varnish and drying it. Use what you create. Glass woven fabric is generally used as the base material for prepreg 3, but since woven glass fabric is formed by weaving glass fiber threads, the fabric has a dense structure and is impregnated with a large amount of resin. Glass woven fabrics do not compress much even when pressurized, so the impregnated resin does not flow out easily. On the other hand, glass nonwoven fabrics are woven with a structure in which glass fibers are intertwined. The structure of the fabric is rough because it is not made of glass, so it is easy to impregnate a large amount of resin, and since glass nonwoven fabric is easily compressed when pressurized, the impregnated resin easily flows out. It's something to do. The glass nonwoven fabric base material of this prepreg 3a preferably has a unit weight in the range of 20 to 150 g/m2, and the amount of resin impregnated is 70 g of the glass nonwoven fabric.
The resin solid content is preferably in the range of about 80 to 200 g. Therefore, it is preferable that the prepreg 3a be impregnated with a large amount of resin so that the resin content is 50% by weight or more. Further, the resin to be impregnated into this prepreg 3a is preferably adjusted to have a melt viscosity of 50 to 5000 PS (poise: measurement temperature 130°C - the same is the same), particularly in the range of 100 to 3000 PS, and the melt viscosity is at least 5000 PS or less. It is better to set it to . Further, an inorganic filler such as glass powder or aluminum hydroxide may be added to the resin of the prepreg 3a. Even if an inorganic filler is blended with the resin, it can be easily impregnated into the glass nonwoven fabric base material, and the inorganic filler is used in the range of about 40 to 150 g for 70 g of the glass nonwoven fabric base material. is preferable.
【００１１】また、上記複数枚のプリプレグ３のうち、
内層回路板２に接するよう配置されるプリプレグ３ａ以
外のプリプレグ３ｂは、その基材としてガラス不織布を
用いて作成したものを使用する必要はなく、ガラス織布
を基材として作成されたものを用いることができる。そ
して内層回路板２に接するよう配置されるプリプレグ３
ａは、そのレジンコンテントがそれ以外のプリプレグ３
ｂよりも高く且つその含浸樹脂の溶融粘度がそれ以外の
プリプレグ３ｂよりも小さいものを用いるものである。[0011] Furthermore, among the plurality of prepregs 3,
The prepregs 3b other than the prepreg 3a arranged so as to be in contact with the inner layer circuit board 2 do not need to be made using glass non-woven fabric as their base material, but should be made using glass woven fabric as their base material. be able to. And a prepreg 3 arranged so as to be in contact with the inner layer circuit board 2
a is prepreg 3 whose resin content is other than that
The impregnated resin has a melt viscosity higher than that of prepreg 3b and smaller than that of the other prepregs 3b.
【００１２】しかしてこのように内層回路板２に複数枚
のプリプレグ３を介して積層材４を重ねた後に、これを
加熱加圧して多層積層成形することによって、図２のよ
うな、プリプレグ３によるボンディング層１２で内層回
路板２に積層材４を積層して多層に回路形成をした多層
回路板Ａを得ることができるものであり、多層回路板Ａ
の層内には内層回路板２に設けたビアホール１でインナ
ービアホールが形成されるものである。そして図２に示
すようにインナービアホールとなるビアホール１内には
プリプレグ３から流れ出る溶融樹脂が流入し、樹脂５で
充填されて埋められるものである。ここで、本発明では
、複数枚のプリプレグ３のうち内層回路板２に接するよ
う配置されるプリプレグ３ａとしてガラス不織布を基材
として作成したものを用いており、ガラス不織布には多
量の樹脂を含浸させてプリプレグ３ａのレジンコンテン
トを高く形成することができるために、積層成形時に内
層回路板２に接するプリプレグ３ａからは多量の樹脂が
ビアホール１に供給されることになり、ビアホール１内
を樹脂５で良好に充填させることができるものである。
特に内層回路板２に接するこのプリプレグ３ａの含浸樹
脂の溶融粘度を５０００ＰＳ以下に低く調整しておくこ
とによって、積層成形時に樹脂は容易に流動してビアホ
ール１内に容易に流入するとになる。従って、インナー
ビアホールとなるビアホール１の部分において多層回路
板Ａ内に空隙部が生じることを防ぐことができ、空隙の
存在による半田の際のフクレの発生を防止すると共に耐
熱性を高めることができるものである。After stacking the laminate material 4 on the inner layer circuit board 2 with a plurality of prepregs 3 interposed therebetween, this is heated and pressurized to form a multilayer laminate, thereby forming the prepreg 3 as shown in FIG. It is possible to obtain a multilayer circuit board A in which circuits are formed in multiple layers by laminating the laminated material 4 on the inner layer circuit board 2 with the bonding layer 12 according to the method.
An inner via hole is formed in the layer by the via hole 1 provided in the inner layer circuit board 2. As shown in FIG. 2, the molten resin flowing from the prepreg 3 flows into the via hole 1, which becomes the inner via hole, and is filled with resin 5. Here, in the present invention, among the plurality of prepregs 3, a prepreg 3a arranged so as to be in contact with the inner layer circuit board 2 is made of a glass nonwoven fabric as a base material, and the glass nonwoven fabric is impregnated with a large amount of resin. As a result, a large amount of resin is supplied to the via hole 1 from the prepreg 3a in contact with the inner layer circuit board 2 during lamination molding, and the inside of the via hole 1 is filled with resin 5. It can be filled satisfactorily. In particular, by adjusting the melt viscosity of the impregnated resin of this prepreg 3a in contact with the inner layer circuit board 2 to be low to 5000 PS or less, the resin easily flows during lamination molding and easily flows into the via hole 1. Therefore, it is possible to prevent a void from forming in the multilayer circuit board A in the portion of the via hole 1 which becomes an inner via hole, and it is possible to prevent blistering during soldering due to the presence of the void and to improve heat resistance. It is something.
【００１３】尚、複数枚のプリプレグ３のうち、内層回
路板２に接しないプリプレグ３ｂも内層回路板２に接す
るプリプレグ３ａと同じようにガラス不織布を基材とし
て作成してレジンコンテントを高くすると、各プリプレ
グ３の全体から多量の樹脂が流出して多層回路板Ａに板
厚のばらつきが発生することになり、また場合によって
は多量の樹脂の流れで成形時に積層の位置ずれ不良が発
生することになるために、好ましくない。また、プリプ
レグ３ａで内層回路板２の表裏両面を挟むようにして積
層することによって、樹脂５によるビアホール１の充填
は一層良好になる。[0013] Among the plurality of prepregs 3, if the prepreg 3b not in contact with the inner layer circuit board 2 is made of glass nonwoven fabric as a base material in the same manner as the prepreg 3a in contact with the inner layer circuit board 2, and the resin content is increased, A large amount of resin flows out from the entire prepreg 3, causing variations in the thickness of the multilayer circuit board A, and in some cases, the flow of a large amount of resin causes misalignment of the laminated layers during molding. Unfavorable in order to become. Further, by stacking the prepregs 3a so as to sandwich both the front and back surfaces of the inner layer circuit board 2, the filling of the via holes 1 with the resin 5 becomes even better.
【００１４】[0014]
【実施例】次に、本発明を実施例によって例証する。
実施例１ 直径０．９ｍｍのビアホール１を設けたエ
ポキシ樹脂系の厚み０．２ｍｍの内層回路板２を用い、
図１のように、この内層回路板２の表面と裏面にそれぞ
れ３枚づつプリプレグ３を重ねると共にさらにその外側
に銅箔４を重ねた。ここで内層回路板２に接するプリプ
レグ３ａは、基材として日本バイリーン社製ガラス不織
布（単量７５ｇ／ｍ２）を用い、溶融粘度を３００ＰＳ
に調整するようにエポキシ樹脂（油化シェル社製エピコ
ート５０５１Ｆ−硬化剤ジシアンジアミド−）を含浸さ
せて、ガラス不織布７５ｇ／ｍ２に対して２００ｇ／ｍ
２（レジンコンテント７４重量％）付着させて調製した
ものを用いた。また他の２枚のプリプレグ３ｂは基材と
して日東紡績社製ガラス織布ＷＥ１１６Ｅ（単量１０４
ｇ／ｍ２）を用い、溶融粘度を５００ＰＳに調整するよ
うにエポキシ樹脂を含浸させて、レジンコンテント５０
重量％に調製したものを用いた。そしてこれを１７０℃
、３０ｋｇ／ｃｍ２、９０分の条件で加熱加圧して多層
成形することによって、多層回路板を得た。EXAMPLES The present invention will now be illustrated by examples. Example 1 Using an epoxy resin-based inner layer circuit board 2 with a thickness of 0.2 mm and provided with a via hole 1 with a diameter of 0.9 mm,
As shown in FIG. 1, three prepregs 3 were stacked on each of the front and back surfaces of the inner layer circuit board 2, and a copper foil 4 was further stacked on the outside thereof. Here, the prepreg 3a in contact with the inner layer circuit board 2 uses a glass nonwoven fabric manufactured by Nippon Vilene Co., Ltd. (unit weight 75 g/m2) as a base material, and has a melt viscosity of 300 PS.
Impregnated with epoxy resin (Epicoat 5051F made by Yuka Shell Co., Ltd. - curing agent dicyandiamide) so as to adjust it to 200 g/m2 for 75 g/m2 of glass nonwoven fabric.
2 (resin content: 74% by weight) was used. In addition, the other two prepregs 3b are made of glass woven fabric WE116E manufactured by Nitto Boseki Co., Ltd. (unit weight 104
g/m2) and impregnated with epoxy resin to adjust the melt viscosity to 500 PS, and the resin content was 50
% by weight was used. And this at 170℃
A multilayer circuit board was obtained by heating and pressing under the conditions of , 30 kg/cm 2 and 90 minutes to form a multilayer.
【００１５】実施例２ 内層回路板２の表面と裏面に
それぞれ４枚づつプリプレグ３を重ねるようにし、内層
回路板２側の２枚をプリプレグ３ａとしてガラス不織布
基材で作成したものを用いると共に他の２枚をプリプレ
グ３ｂとしてガラス織布基材で作成したものを用いるよ
うにした他は、実施例１と同様にして多層回路板を得た
。 実施例３ エポキシ樹脂にガラス粉を混合して
用い、内層回路板２に接するプリプレグ３ａとして、ガ
ラス不織布７５ｇ／ｍ２に対してエポキシ樹脂を２００
ｇ／ｍ２、ガラス粉を１５０ｇ／ｍ２付着させて調製し
たものを使用するようにした他は、実施例１と同様にし
て多層回路板を得た。Embodiment 2 Four prepregs 3 are stacked on each of the front and back surfaces of the inner layer circuit board 2, and the two sheets on the inner layer circuit board 2 side are used as prepregs 3a made of a glass nonwoven fabric base material. A multilayer circuit board was obtained in the same manner as in Example 1, except that the two prepregs 3b were made of a glass woven fabric base material. Example 3 Using a mixture of epoxy resin and glass powder, the prepreg 3a in contact with the inner layer circuit board 2 was prepared by mixing 200 g/m2 of epoxy resin with 75 g/m2 of glass nonwoven fabric.
A multilayer circuit board was obtained in the same manner as in Example 1, except that a board prepared by adhering glass powder at 150 g/m2 was used.
【００１６】実施例４ 含浸樹脂としてエポキシ樹脂
を用いる代わりに、ポリイミド樹脂を用いるようにして
作成したプリプレグ３ａ，３ｂを使用するようにし、さ
らに多層積層条件を２００℃、４０ｋｇ／ｃｍ２、９０
分に設定するようにした他は、実施例１と同様にして多
層回路板を得た。
比較例１ 内層回路板２の表面と裏面にそれぞれ３枚
づつ重ねるプリプレグ３として、全てガラス織布を基材
としたエポキシ樹脂のプリプレグ３ｂを用いるようにし
た他は、実施例１と同様にして多層回路板を得た。Example 4 Instead of using epoxy resin as the impregnating resin, prepregs 3a and 3b made using polyimide resin were used, and the multilayer lamination conditions were set to 200°C, 40kg/cm2, and 90°C.
A multilayer circuit board was obtained in the same manner as in Example 1, except that the temperature was set at 10 minutes. Comparative Example 1 The same procedure as in Example 1 was carried out except that epoxy resin prepregs 3b having glass woven fabric as the base material were used as the prepregs 3 stacked on the front and back surfaces of the inner layer circuit board 2, three each. A multilayer circuit board was obtained.
【００１７】比較例２ 内層回路板２の表面と裏面に
それぞれ３枚づつ重ねるプリプレグ３として、全てガラ
ス織布を基材としたポリイミド樹脂のプリプレグ３ｂを
用いるようにした他は、実施例４と同様にして多層回路
板を得た。
比較例３ 実施例１においてプリプレグ３ａをその含
浸樹脂の溶融粘度が６０００ＰＳになるように調製する
ようにした他は、実施例１と同様にして多層回路板を得
た。Comparative Example 2 Same as Example 4, except that three prepregs 3, each of which is stacked on the front and back sides of the inner layer circuit board 2, were made of polyimide resin prepregs 3b, all of which were made of glass woven fabric as a base material. A multilayer circuit board was obtained in the same manner. Comparative Example 3 A multilayer circuit board was obtained in the same manner as in Example 1, except that prepreg 3a was prepared so that the melt viscosity of the impregnated resin was 6000 PS.
【００１８】上記のように実施例１〜４及び比較例１〜
３で得た多層回路板について、インナービアホールの空
隙発生率、オーブン耐熱温度を測定すると共に半田工程
でのフクレ不良の発生率を調べた。結果を次表に示す。As mentioned above, Examples 1 to 4 and Comparative Examples 1 to
Regarding the multilayer circuit board obtained in Step 3, the rate of occurrence of voids in the inner via holes and the oven temperature resistance were measured, and the rate of occurrence of blistering defects during the soldering process was investigated. The results are shown in the table below.
【００１９】[0019]
【表１】[Table 1]
【００２０】表にみられるように、内層回路板２に接す
るように配置されるプリプレグ３ａをガラス不織布を基
材として作成して樹脂の含有量を高くすることによって
、インナービアホールに空隙が発生することを低減して
耐熱性を高めることができると共にフクレ不良の発生率
を低減できることが確認される。また比較例３にみられ
るように、内層回路板２に接するように配置されるプリ
プレグ３ａの含浸樹脂の溶融粘度が高いと空隙が発生し
易くなって耐熱性が低下すると共にフクレ不良が発生し
易くなることも確認される。As shown in the table, voids are generated in the inner via hole by making the prepreg 3a, which is placed in contact with the inner layer circuit board 2, using a glass nonwoven fabric as a base material and increasing the resin content. It is confirmed that it is possible to improve heat resistance by reducing the occurrence of blistering defects, and to reduce the incidence of blistering defects. Furthermore, as seen in Comparative Example 3, if the melt viscosity of the impregnated resin of the prepreg 3a disposed in contact with the inner layer circuit board 2 is high, voids are likely to occur, resulting in decreased heat resistance and blistering defects. It is also confirmed that it becomes easier.
【００２１】[0021]
【発明の効果】上記のように本発明は、内層回路板に接
するよう配置されるプリプレグとしてガラス不織布を基
材として樹脂含浸して作成されたものを用いるようにし
たので、ガラス不織布は組織が粗であってこのガラス不
織布を基材とするプリプレグは樹脂を多量に含浸させる
ことが容易であると共に含浸された樹脂は加圧されると
容易に流れ出していくものであって、内層回路板に接す
るこのプリプレグからは多量の樹脂がビアホールに供給
されてビアホール内に良好に充填されることになり、イ
ンナービアホールとなるビアホールの部分において多層
回路板内に空隙部が生じることを防ぐことができ、空隙
の存在による半田の際のフクレの発生を防止すると共に
耐熱性を高めることができるものである。Effects of the Invention As described above, the present invention uses a prepreg made by impregnating a glass nonwoven fabric with a resin as a base material, which is placed in contact with the inner layer circuit board. The coarse prepreg, which is made of glass non-woven fabric as a base material, can be easily impregnated with a large amount of resin, and the impregnated resin easily flows out when pressurized, and does not affect the inner layer circuit board. A large amount of resin is supplied to the via hole from this prepreg that is in contact with the via hole, and the via hole is well filled, thereby preventing the formation of a void in the multilayer circuit board at the portion of the via hole that becomes the inner via hole. The presence of voids can prevent blisters from occurring during soldering and can improve heat resistance.
【図１】本発明の一実施例の多層成形の前の概略断面図
である。FIG. 1 is a schematic cross-sectional view of an embodiment of the present invention before multilayer molding.
【図２】本発明の一実施例の多層成形後の概略断面図で
ある。FIG. 2 is a schematic cross-sectional view after multilayer molding according to an embodiment of the present invention.
【図３】多層回路板の断面図である。FIG. 3 is a cross-sectional view of a multilayer circuit board.
１ ビアホール ２ 内層回路板 ３ プリプレグ ４ 積層材 1 Beer hall 2 Inner layer circuit board 3 Prepreg 4 Laminated materials
Claims (2)
枚のプリプレグを介して他の内層回路板や外層回路板、
金属箔等の積層材を重ね、これを加熱加圧して多層成形
することによって多層回路板を製造するにあたって、上
記複数枚のプリプレグのうち内層回路板に接するよう配
置されるプリプレグとしてガラス不織布を基材として樹
脂含浸して作成されたものを用いることを特徴とする多
層回路板の製造方法。Claim 1: An inner layer circuit board provided with via holes is connected to other inner layer circuit boards, outer layer circuit boards, etc. via a plurality of prepregs.
When manufacturing a multilayer circuit board by stacking laminated materials such as metal foils and heating and pressing them to form a multilayer, a glass nonwoven fabric based prepreg is used as the prepreg placed in contact with the inner layer circuit board among the plurality of prepregs described above. A method for manufacturing a multilayer circuit board, characterized in that a material impregnated with a resin is used.
リプレグの含浸樹脂の溶融粘度が５０００ＰＳ以下であ
ることを特徴とする請求項１に記載の多層回路板の製造
方法。2. The method of manufacturing a multilayer circuit board according to claim 1, wherein the impregnating resin of the prepreg disposed in contact with the inner layer circuit board has a melt viscosity of 5000 PS or less.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2402109A JP2533689B2 (en) | 1990-12-14 | 1990-12-14 | Method for manufacturing multilayer circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2402109A JP2533689B2 (en) | 1990-12-14 | 1990-12-14 | Method for manufacturing multilayer circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04215497A true JPH04215497A (en) | 1992-08-06 |
| JP2533689B2 JP2533689B2 (en) | 1996-09-11 |
Family
ID=18511923
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2402109A Expired - Fee Related JP2533689B2 (en) | 1990-12-14 | 1990-12-14 | Method for manufacturing multilayer circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2533689B2 (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54163360A (en) * | 1978-06-16 | 1979-12-25 | Hitachi Ltd | Method of producing multiilayer printed circuit board |
| JPS54163359A (en) * | 1978-06-16 | 1979-12-25 | Hitachi Ltd | Method of producing multiilayer printed circuit board |
| JPS61174796A (en) * | 1985-01-30 | 1986-08-06 | 新神戸電機株式会社 | Manufacture of multilayer circuit board |
| JPH0212990A (en) * | 1988-06-30 | 1990-01-17 | Shin Kobe Electric Mach Co Ltd | Multilayer printed circuit board |
| JPH02177498A (en) * | 1988-12-28 | 1990-07-10 | Shin Kobe Electric Mach Co Ltd | Multilayer printed wiring board |
-
1990
- 1990-12-14 JP JP2402109A patent/JP2533689B2/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54163360A (en) * | 1978-06-16 | 1979-12-25 | Hitachi Ltd | Method of producing multiilayer printed circuit board |
| JPS54163359A (en) * | 1978-06-16 | 1979-12-25 | Hitachi Ltd | Method of producing multiilayer printed circuit board |
| JPS61174796A (en) * | 1985-01-30 | 1986-08-06 | 新神戸電機株式会社 | Manufacture of multilayer circuit board |
| JPH0212990A (en) * | 1988-06-30 | 1990-01-17 | Shin Kobe Electric Mach Co Ltd | Multilayer printed circuit board |
| JPH02177498A (en) * | 1988-12-28 | 1990-07-10 | Shin Kobe Electric Mach Co Ltd | Multilayer printed wiring board |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2533689B2 (en) | 1996-09-11 |
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