JP2917579B2 - Multilayer printed wiring board - Google Patents

Multilayer printed wiring board

Info

Publication number
JP2917579B2
JP2917579B2 JP14910191A JP14910191A JP2917579B2 JP 2917579 B2 JP2917579 B2 JP 2917579B2 JP 14910191 A JP14910191 A JP 14910191A JP 14910191 A JP14910191 A JP 14910191A JP 2917579 B2 JP2917579 B2 JP 2917579B2
Authority
JP
Japan
Prior art keywords
layer
circuit
printed wiring
wiring board
multilayer printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP14910191A
Other languages
Japanese (ja)
Other versions
JPH04372194A (en
Inventor
繁 伊藤
一紀 光橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Shin Kobe Electric Machinery Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Kobe Electric Machinery Co Ltd filed Critical Shin Kobe Electric Machinery Co Ltd
Priority to JP14910191A priority Critical patent/JP2917579B2/en
Publication of JPH04372194A publication Critical patent/JPH04372194A/en
Application granted granted Critical
Publication of JP2917579B2 publication Critical patent/JP2917579B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、外層と内層に回路を有
する多層プリント配線板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board having circuits in an outer layer and an inner layer.

【0002】[0002]

【従来の技術】多層プリント配線板は、内層回路板の絶
縁層がエポキシ樹脂やポリイミド樹脂を含浸したガラス
織布で構成されており、内層回路板同士の接着層や外層
回路の絶縁層も前記のガラス織布で構成されるのが一般
的である。ガラス織布を一部ガラス不織布に置き換えた
コンポジットタイプの多層プリント配線板も提案されて
いる。
2. Description of the Related Art In a multilayer printed wiring board, an insulating layer of an inner circuit board is made of a glass woven cloth impregnated with an epoxy resin or a polyimide resin. Is generally made of a glass woven fabric. A composite type multilayer printed wiring board in which a glass woven fabric is partially replaced with a glass nonwoven fabric has also been proposed.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、ガラス
織布を使用したものでは、内層回路板表面の回路のある
部分と回路のない部分によってできる凹凸を樹脂で埋め
ることが十分にできず、ボイドが発生しやすい。また、
すべての層がガラス織布で構成されているために、ドリ
ル穴明けをしたときに位置ずれを起こしやすく、ドリル
刃の摩耗が著しいことから、穴壁が粗くなってスルホー
ル導通信頼性の低下を招くおそれがある。コンポジット
タイプのものでは、このような問題はないものの平面方
向の熱膨張が大きく、部品を表面実装するプリント配線
板としては信頼性にかける。本発明が解決しようとする
課題は、多層プリント配線板の内層のボイドの発生を抑
制すること、ドリル加工性をよくすること、平面方向の
熱膨張を小さくすることである。
However, in the case of using glass woven fabric, it is not possible to satisfactorily fill the unevenness formed by a portion with a circuit and a portion without a circuit on the surface of the inner circuit board with a resin, and voids are formed. Likely to happen. Also,
Since all layers are made of glass woven fabric, misalignment is likely to occur when drilling holes, and the wear of the drill blades is significant. May be invited. Although the composite type does not have such a problem, it has a large thermal expansion in the plane direction, and thus the reliability as a printed wiring board on which components are surface-mounted is put. The problem to be solved by the present invention is to suppress the generation of voids in the inner layer of the multilayer printed wiring board, improve the drill workability, and reduce the thermal expansion in the plane direction.

【0004】[0004]

【課題を解決するための手段】上記課題を解決するため
に、本発明に係る多層プリント配線板は、外層回路1の
絶縁層(a)が熱硬化性樹脂含浸ガラス織布2であり、
内層回路板3を構成する絶縁層(b)、ならびに内層回
路板3と前記絶縁層(a)との接着層が熱硬化性樹脂含
浸ガラス繊維/芳香族ポリアミド繊維混抄不織布4であ
ることを特徴とする(図1,4層回路の配線板)。ま
た、回路が4層を越えるものとしては、図2に示すよう
に、外層回路1の絶縁層(a)が熱硬化性樹脂含浸ガラ
ス織布2であり、内層回路板3を構成する絶縁層
(b)、内層回路板3と前記絶縁層(a)との接着層な
らびに内層回路板同士の接着層が熱硬化性樹脂含浸ガラ
ス繊維/芳香族ポリアミド繊維混抄不織布4であること
を特徴とする。
In order to solve the above problems, in a multilayer printed wiring board according to the present invention, the insulating layer (a) of the outer layer circuit 1 is a glass woven fabric 2 impregnated with a thermosetting resin,
The insulating layer (b) constituting the inner layer circuit board 3 and the adhesive layer between the inner layer circuit board 3 and the insulating layer (a) are made of a thermosetting resin impregnated glass fiber / aromatic polyamide fiber mixed nonwoven fabric 4. (FIG. 1, wiring board of four-layer circuit). As for the circuit having more than four layers, as shown in FIG. 2, the insulating layer (a) of the outer layer circuit 1 is a glass woven fabric 2 impregnated with a thermosetting resin and the insulating layer constituting the inner layer circuit board 3 (B) The adhesive layer between the inner circuit board 3 and the insulating layer (a) and the adhesive layer between the inner circuit boards are a thermosetting resin-impregnated glass fiber / aromatic polyamide fiber mixed nonwoven fabric 4. .

【0005】[0005]

【作用】本発明に係る多層プリント配線板は、内層には
不織布を使用しているのでドリル加工性がよく、不織布
には多量の樹脂を保持させることができるので回路によ
ってできる凹凸を樹脂で埋めてボイドの発生を抑制する
ことができる。不織布の構成材料である芳香族ポリアミ
ド繊維は負の線膨張係数をもち、配線板の平面方向の熱
膨張を小さく抑える作用をしている。
The multilayer printed wiring board according to the present invention uses a non-woven fabric for the inner layer, so that it has good drill workability. Since a large amount of resin can be held in the non-woven fabric, the unevenness formed by the circuit is filled with the resin. Thus, generation of voids can be suppressed. Aromatic polyamide fiber, which is a constituent material of the nonwoven fabric, has a negative coefficient of linear expansion and acts to suppress thermal expansion in the planar direction of the wiring board.

【0006】[0006]

【実施例】【Example】

実施例1 41g/m2の混抄不織布(重量比でガラス繊維/芳香族
ポリアミド繊維=9/1)に、ビスフェノール型エポキ
シ樹脂を含浸乾燥してプリプレグAを得た。また、21
5g/m2のガラス織布に同様に含浸乾燥してプリプレグ
Bを得た。プリプレグA4プライの両側に35μ厚さの
銅箔を載置して、加熱加圧成形により0.8mm厚さの両
面銅張り板を得た。これを常法によりエッチング加工し
て回路を形成し、内層回路板とした。回路表面には、次
の接着工程のための化学処理を施しておく。内層回路板
の両側にプリプレグAを1プライ、さらにプリプレグB
を1プライ載置し、最表面には18μ厚さの銅箔を載置
して、加熱加圧成形により一体化した。総厚さは1.6m
mである。所定の位置にドリル穴明けをしてスルホール
メッキを施し、外層回路をエッチングにより形成して4
層の配線板とした。その特性を表1に示す。
Example 1 A prepreg A was obtained by impregnating and drying 41 g / m 2 of a mixed nonwoven fabric (glass fiber / aromatic polyamide fiber = 9/1 by weight ratio) with a bisphenol-type epoxy resin. Also, 21
A prepreg B was obtained by impregnating and drying a 5 g / m 2 glass woven fabric in the same manner. A 35 μm thick copper foil was placed on both sides of the prepreg A4 ply, and a 0.8 mm thick double-sided copper-clad board was obtained by heating and pressing. This was processed by etching in a conventional manner to form a circuit, which was used as an inner circuit board. The circuit surface is subjected to a chemical treatment for the next bonding step. One ply of prepreg A on both sides of the inner layer circuit board, and further prepreg B
Was placed on one ply, a copper foil having a thickness of 18 μm was placed on the outermost surface, and integrated by heat and pressure molding. 1.6m in total thickness
m. Drill holes are drilled at predetermined positions, plated with through holes, and outer layer circuits are formed by etching.
It was a layered wiring board. The characteristics are shown in Table 1.

【0007】従来例1 41g/m2のガラス不織布に、ビスフェノール型エポキ
シ樹脂を含浸乾燥してプリプレグCを得た。プリプレグ
C4プライの両側に35μ厚さの銅箔を載置して、加熱
加圧成形により0.8mm厚さの両面銅張り板を得た。こ
れを常法によりエッチング加工して回路を形成し、内層
回路板とした。回路表面には、次の接着工程のための化
学処理を施しておく。内層回路板の両側にプリプレグC
を1プライ、さらにプリプレグBを1プライ載置し、最
表面には18μ厚さの銅箔を載置して、加熱加圧成形に
より一体化した。総厚さは1.6mmである。所定の位置
にドリル穴明けをしてスルホールメッキを施し、外層回
路をエッチングにより形成して4層の配線板とした。そ
の特性を表1に示す。
Conventional Example 1 A prepreg C was obtained by impregnating and drying bisphenol-type epoxy resin on a 41 g / m 2 glass nonwoven fabric. A copper foil having a thickness of 35 μm was placed on both sides of the prepreg C4 ply, and a double-sided copper-clad board having a thickness of 0.8 mm was obtained by heating and pressing. This was processed by etching in a conventional manner to form a circuit, which was used as an inner circuit board. The circuit surface is subjected to a chemical treatment for the next bonding step. Pre-preg C on both sides of the inner circuit board
Was placed on one ply, prepreg B was further placed on one ply, and a copper foil having a thickness of 18 μm was placed on the outermost surface, and integrated by heating and pressing. The total thickness is 1.6 mm. Drill holes were drilled at predetermined positions, through-hole plating was performed, and outer layer circuits were formed by etching to obtain four-layer wiring boards. The characteristics are shown in Table 1.

【0008】従来例2 プリプレグB4プライの両側に35μ厚さの銅箔を載置
して、加熱加圧成形により0.8mm厚さの両面銅張り板
を得た。これを常法によりエッチング加工して回路を形
成し、内層回路板とした。回路表面には、次の接着工程
のための化学処理を施しておく。内層回路板の両側にプ
リプレグBを2プライ載置し、最表面には18μ厚さの
銅箔を載置して、加熱加圧成形により一体化した。総厚
さは1.6mmである。所定の位置にドリル穴明けをして
スルホールメッキを施し、外層回路をエッチングにより
形成して4層の配線板とした。その特性を表1に示す。
Conventional Example 2 A copper foil having a thickness of 35 μm was placed on both sides of a prepreg B4 ply, and a double-sided copper-clad board having a thickness of 0.8 mm was obtained by heating and pressing. This was processed by etching in a conventional manner to form a circuit, which was used as an inner circuit board. The circuit surface is subjected to a chemical treatment for the next bonding step. Two layers of prepreg B were placed on both sides of the inner circuit board, and a copper foil having a thickness of 18 μm was placed on the outermost surface, and integrated by heating and pressing. The total thickness is 1.6 mm. Drill holes were drilled at predetermined positions, through-hole plating was performed, and outer layer circuits were formed by etching to obtain four-layer wiring boards. The characteristics are shown in Table 1.

【0009】[0009]

【表1】 [Table 1]

【0010】表1において、ドリル穴明けの条件は、ド
リル径1.0mm,6000rpm,50μ/revである。ドリル摩耗
は、多層プリント配線板を3枚重ねてドリル穴明けを
し、ヒット数1500後に測定したものである。ドリル
穴位置精度は、3枚重ねで穴明けをしたときの1枚目と
3枚目の所定位置からの位置ずれの程度で示した。熱膨
張係数は、30〜80℃におけるものであり、TMA法
で測定した。
In Table 1, the conditions for drilling are a drill diameter of 1.0 mm, 6000 rpm, and 50 μ / rev. Drill wear is measured after three multilayer printed wiring boards are drilled and 1500 holes are hit. The drill hole position accuracy was indicated by the degree of positional deviation from a predetermined position of the first and third sheets when three holes were drilled. The coefficient of thermal expansion is from 30 to 80 ° C., and was measured by the TMA method.

【0011】[0011]

【発明の効果】表1から明らかなように、本発明に係る
多層プリント配線板は、ドリル加工時のドリル摩耗が少
なく明けた穴の壁面粗さが小さいのでスルホールメッキ
を均一に付着させることができる。内層のボイド発生も
抑制できるので、内層回路の高密度化に対し信頼性を高
めることができる。平面方向の熱膨張が小さいので、表
面実装した部品の半田付け部分の熱衝撃によるクラック
の発生を抑制することができる。さらに、ガラス繊維/
芳香族ポリアミド繊維混抄不織布は、ガラス織布、ガラ
ス不織布のいずれよりも軽く、多層プリント配線板の軽
量化が可能である。
As is clear from Table 1, the multilayer printed wiring board according to the present invention has low drill wear during drilling and small hole wall roughness, so that through-hole plating can be uniformly applied. it can. Since the occurrence of voids in the inner layer can also be suppressed, the reliability can be improved with respect to the increase in the density of the inner layer circuit. Since the thermal expansion in the plane direction is small, it is possible to suppress the occurrence of cracks due to the thermal shock of the soldered portion of the surface mounted component. In addition, glass fiber /
The aromatic polyamide fiber mixed nonwoven fabric is lighter than any of the glass woven fabric and the glass nonwoven fabric, and can reduce the weight of the multilayer printed wiring board.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る実施例を示す断面説明図である。FIG. 1 is an explanatory sectional view showing an embodiment according to the present invention.

【図2】本発明に係る他の実施例を示す断面説明図であ
る。
FIG. 2 is an explanatory sectional view showing another embodiment according to the present invention.

【符号の説明】[Explanation of symbols]

1は外層回路 2はガラス織布 3は内層回路板 4は混抄不織布 1 is an outer layer circuit 2 is a glass woven cloth 3 is an inner layer circuit board 4 is a mixed nonwoven fabric

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】内層および外層に回路を有する多層プリン
ト配線板において、外層回路の絶縁層(a)が熱硬化性
樹脂含浸ガラス織布であり、内層回路板を構成する絶縁
層(b)、ならびに内層回路板と前記絶縁層(a)との
接着層が熱硬化性樹脂含浸ガラス繊維/芳香族ポリアミ
ド繊維混抄不織布である多層プリント配線板。
1. A multilayer printed wiring board having a circuit in an inner layer and an outer layer, wherein the insulating layer (a) of the outer layer circuit is a woven glass impregnated with a thermosetting resin, and the insulating layers (b) constituting the inner layer circuit board; And a multilayer printed wiring board in which an adhesive layer between the inner circuit board and the insulating layer (a) is a nonwoven fabric made of a thermosetting resin-impregnated glass fiber / aromatic polyamide fiber.
【請求項2】内層および外層に回路を有する多層プリン
ト配線板において、外層回路の絶縁層(a)が熱硬化性
樹脂含浸ガラス織布であり、内層回路板を構成する絶縁
層(b)、内層回路板と前記絶縁層(a)との接着層な
らびに内層回路板同士の接着層が熱硬化性樹脂含浸ガラ
ス繊維/芳香族ポリアミド繊維混抄不織布である多層プ
リント配線板。
2. A multilayer printed wiring board having a circuit in an inner layer and an outer layer, wherein the insulating layer (a) of the outer layer circuit is a glass woven fabric impregnated with a thermosetting resin, and the insulating layers (b) constituting the inner layer circuit board; A multilayer printed wiring board, wherein the adhesive layer between the inner circuit board and the insulating layer (a) and the adhesive layer between the inner circuit boards are nonwoven fabrics mixed with a thermosetting resin-impregnated glass fiber / aromatic polyamide fiber.
JP14910191A 1991-06-21 1991-06-21 Multilayer printed wiring board Expired - Fee Related JP2917579B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14910191A JP2917579B2 (en) 1991-06-21 1991-06-21 Multilayer printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14910191A JP2917579B2 (en) 1991-06-21 1991-06-21 Multilayer printed wiring board

Publications (2)

Publication Number Publication Date
JPH04372194A JPH04372194A (en) 1992-12-25
JP2917579B2 true JP2917579B2 (en) 1999-07-12

Family

ID=15467721

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14910191A Expired - Fee Related JP2917579B2 (en) 1991-06-21 1991-06-21 Multilayer printed wiring board

Country Status (1)

Country Link
JP (1) JP2917579B2 (en)

Also Published As

Publication number Publication date
JPH04372194A (en) 1992-12-25

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