JP2503630B2 - Method for manufacturing multilayer printed circuit board - Google Patents

Method for manufacturing multilayer printed circuit board

Info

Publication number
JP2503630B2
JP2503630B2 JP1036675A JP3667589A JP2503630B2 JP 2503630 B2 JP2503630 B2 JP 2503630B2 JP 1036675 A JP1036675 A JP 1036675A JP 3667589 A JP3667589 A JP 3667589A JP 2503630 B2 JP2503630 B2 JP 2503630B2
Authority
JP
Japan
Prior art keywords
printed circuit
resin
circuit board
multilayer printed
epoxy resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1036675A
Other languages
Japanese (ja)
Other versions
JPH02215192A (en
Inventor
恭文 福本
正人 松尾
伸仁 細木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP1036675A priority Critical patent/JP2503630B2/en
Publication of JPH02215192A publication Critical patent/JPH02215192A/en
Application granted granted Critical
Publication of JP2503630B2 publication Critical patent/JP2503630B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電子機器、電気機器、コンビューター、通信
機器等に用いられる多層プリント基板の製造方法に関す
るものである。
TECHNICAL FIELD The present invention relates to a method for manufacturing a multilayer printed circuit board used in electronic devices, electric devices, computers, communication devices and the like.

〔従来の技術〕[Conventional technology]

従来の多層プリント基板はエポキシ樹脂系にあっては
175〜180℃で積層成形されるのが一般的で、樹脂の硬
化、冷却により内層材の回路パターンが表面に浮き上が
り表面粗度が大となりドリル穴明け時の位置精度を低下
させている。
Conventional multilayer printed circuit boards are not based on epoxy resin
It is generally laminated and molded at 175 to 180 ° C, and the circuit pattern of the inner layer material floats on the surface due to hardening and cooling of the resin, and the surface roughness becomes large, which lowers the positional accuracy when drilling holes.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

従来の技術で述べたように多層プリント基板の表面粗
度は多層化される程悪く、最近のフアインパターン化で
は問題になっている。本発明は従来の技術における上述
の問題点に鑑みてなされたもので、その目的とするとこ
ろは表面粗度、穴明け時の位置精度のよい多層プリント
基板の製造方法を提供することにある。
As described in the related art, the surface roughness of a multilayer printed circuit board is so bad that it is multilayered, which is a problem in recent fine patterning. The present invention has been made in view of the above problems in the prior art, and an object of the present invention is to provide a method for manufacturing a multilayer printed circuit board having good surface roughness and high positional accuracy during drilling.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は所要枚数の内層材の上面及び又は下面に所望
枚数のエポキシ樹脂系のプリプレグを配し、最外層に外
層材を配設した積層体を、このエポキシ樹脂系プリプレ
グ樹脂のガラス転移温度より5〜30℃高温で積層一体化
することを特徴とする多層プリント基板の製造方法のた
め、樹脂硬化、一体化を充分にし且つ過剰な樹脂の収縮
を防止し表面粗度、穴明け時の位置精度を向上させるこ
とができたもので、以下本発明を詳細に説明する。
According to the present invention, a desired number of epoxy resin-based prepregs are arranged on the upper surface and / or the lower surface of a required number of inner layer materials, and a laminate having an outer layer material as the outermost layer is formed from the glass transition temperature of the epoxy resin-based prepreg resin. Due to the method of manufacturing a multilayer printed circuit board, which is characterized by laminating and integrating at a high temperature of 5 to 30 ° C., the resin is cured and integrated sufficiently, and the excessive shrinkage of the resin is prevented, and the surface roughness and the position at the time of punching Now that the accuracy has been improved, the present invention will be described in detail below.

本発明に用いる内層材はフエノール樹脂、エポキシ樹
脂、不飽和ポリエステル樹脂、ポリイミド樹脂、フツ素
樹脂、ポリフエニレンオキサイド樹脂等の熱硬化性樹脂
や熱可塑性樹脂の積層板の片面又は両面に電気回路を形
成したものである。本発明に用いるプリプレグは、エポ
キシ樹脂を主成分とするエポキシ樹脂系のプリプレグで
ある。このプリプレグの基材としてはガラス、アスベス
ト等の無機繊維やポリエステル、ポリアミド、ポリビニ
ルアルコール、アクリル等の有機合成繊維や木綿等の天
然繊維からなる織布、不織布、マット或は紙又はこれら
の組合せ基材等である。基材への樹脂含浸量は乾燥後樹
脂量で40〜60重量%(以下単に%と記す)が好ましい。
外層材としては内層材に用いられる積層板の片面金属張
積層板や厚みが18〜105ミクロンの銅、アルミニウム、
ニッケル、亜鉛、鉄等の単独、合金、複合箔を用いるこ
とができ、必要に応じてその片面又は両面に化学的処
理、物理的処理を施したり、片面に接着剤層を設けた金
属箔である。積層成形時の温度はプリプレグ樹脂のガラ
ス転移温度より5〜30℃高温であることが必要である。
即ち5℃未満では樹脂の硬化、一体化が不充分となり、
30℃をこえると樹脂の収縮が大となるためである。な
お、ガラス転移温度は、DSC(示差走査熱量計)法によ
り測定されたものである。
The inner layer material used in the present invention is an electric circuit on one side or both sides of a laminate of thermosetting resin or thermoplastic resin such as phenol resin, epoxy resin, unsaturated polyester resin, polyimide resin, fluorine resin, and polyphenylene oxide resin. Is formed. The prepreg used in the present invention is an epoxy resin-based prepreg containing an epoxy resin as a main component. The base material of this prepreg is woven fabric, non-woven fabric, mat or paper made of inorganic fibers such as glass and asbestos, organic synthetic fibers such as polyester, polyamide, polyvinyl alcohol and acrylic, and natural fibers such as cotton, or a combination thereof. Material. The amount of resin impregnated into the base material is preferably 40 to 60% by weight (hereinafter simply referred to as%) in terms of the amount of resin after drying.
As the outer layer material, the one-sided metal-clad laminate of the laminate used for the inner layer material or the thickness of copper of 18 to 105 microns, aluminum,
A single, alloy, or composite foil of nickel, zinc, iron, etc. can be used, and a metal foil having an adhesive layer provided on one side with chemical treatment or physical treatment on one side or both sides as necessary. is there. It is necessary that the temperature during the lamination molding is 5 to 30 ° C. higher than the glass transition temperature of the prepreg resin.
That is, if the temperature is less than 5 ° C, curing and integration of the resin will be insufficient,
This is because when the temperature exceeds 30 ° C, the resin shrinks greatly. The glass transition temperature is measured by the DSC (differential scanning calorimeter) method.

以下本発明を実施例にもとづいて説明する。 The present invention will be described below based on examples.

実施例1乃至3と比較例 先ず厚さ0.15mmのガラス布に、エポキシ樹脂(シエル
化学株式会社製、エピコート828)100重量部(以下単に
部と記す)に対しジアミノジフエニルメタン28部、ベン
ジルジメチルアミン0.2部、メチルオキシトール50部を
加えてなるエポキシ樹脂ワニス(硬化後のガラス転移温
度140℃、DSC法、20℃/分で測定)を乾燥後の樹脂量が
50%になるように含浸、乾燥してプリプレグを得た。次
に厚さ0.8mmの両面銅張積層板の両面に電気回路を形成
した内層材の上下面に上記プリプレグを夫々2枚づつ介
在させてから厚さ0.018mmの銅箔を配設した積層体を成
形圧力50Kg/cm2、成形温度は実施例1については155
℃、実施例2については160℃、実施例3については165
℃、比較例については180℃で夫々90分間積層成形して
4層プリント基板を得た。
Examples 1 to 3 and Comparative Example First, on a glass cloth having a thickness of 0.15 mm, 28 parts of diaminodiphenylmethane and benzyl were added to 100 parts by weight of epoxy resin (Epicote 828 manufactured by Shell Chemical Co., Ltd.) (hereinafter simply referred to as “part”). The amount of resin after drying an epoxy resin varnish made by adding 0.2 parts of dimethylamine and 50 parts of methyl oxytol (glass transition temperature after curing 140 ° C, measured by DSC method, 20 ° C / min)
It was impregnated to 50% and dried to obtain a prepreg. Next, a laminated body in which two of the above prepregs are provided on each of the upper and lower surfaces of an inner layer material having electric circuits formed on both sides of a 0.8-mm-thick double-sided copper clad laminate, and then a copper foil of 0.018 mm thickness is arranged. The molding pressure is 50 Kg / cm 2 , and the molding temperature is 155 for Example 1.
C., 160 ° C. for Example 2 and 165 for Example 3.
And a comparative example was laminated and molded at 180 ° C. for 90 minutes each to obtain a four-layer printed circuit board.

実施例1乃至3と比較例の多層プリント基板の性能は
第1表のようである。
The performance of the multilayer printed circuit boards of Examples 1 to 3 and Comparative Example is shown in Table 1.

〔発明の効果〕 本発明は上述した如く構成されている。特許請求の範
囲第1項に記載した構成を有する多層プリント基板の製
造方法においては表面粗度、穴明け時の位置精度を向上
する効果がある。
[Advantages of the Invention] The present invention is configured as described above. In the method for manufacturing a multilayer printed circuit board having the structure described in claim 1, there is an effect of improving the surface roughness and the positional accuracy at the time of punching.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】所要枚数の内層材の上面及び又は下面に所
要枚数のエポキシ樹脂系のプリプレグを配し、最外層に
外層材を配設した積層体を、このエポキシ樹脂系プリプ
レグ樹脂のガラス転移温度より5〜30℃高温で積層一体
化することを特徴とする多層プリント基板の製造方法。
1. A laminated body in which a required number of epoxy resin-based prepregs are arranged on the upper surface and / or lower surface of a required number of inner layer materials and an outer layer material is disposed as the outermost layer, and a glass transition of the epoxy resin-based prepreg resin is performed. A method for manufacturing a multilayer printed circuit board, which comprises laminating and integrating at a temperature of 5 to 30 ° C. higher than the temperature.
JP1036675A 1989-02-15 1989-02-15 Method for manufacturing multilayer printed circuit board Expired - Lifetime JP2503630B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1036675A JP2503630B2 (en) 1989-02-15 1989-02-15 Method for manufacturing multilayer printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1036675A JP2503630B2 (en) 1989-02-15 1989-02-15 Method for manufacturing multilayer printed circuit board

Publications (2)

Publication Number Publication Date
JPH02215192A JPH02215192A (en) 1990-08-28
JP2503630B2 true JP2503630B2 (en) 1996-06-05

Family

ID=12476430

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1036675A Expired - Lifetime JP2503630B2 (en) 1989-02-15 1989-02-15 Method for manufacturing multilayer printed circuit board

Country Status (1)

Country Link
JP (1) JP2503630B2 (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3032931C2 (en) * 1980-09-02 1982-07-29 Robert Bürkle GmbH & Co, 7290 Freudenstadt Method and arrangement for the production of multilayer printed circuit boards
JPS6112732A (en) * 1984-06-28 1986-01-21 Hitachi Chem Co Ltd Preparation of prepreg for printed circuit board
JPS6172018A (en) * 1984-09-17 1986-04-14 Matsushita Electric Works Ltd Epoxy resin composition

Also Published As

Publication number Publication date
JPH02215192A (en) 1990-08-28

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