JPH0221694A - Multilayer printed circuit board - Google Patents

Multilayer printed circuit board

Info

Publication number
JPH0221694A
JPH0221694A JP17160688A JP17160688A JPH0221694A JP H0221694 A JPH0221694 A JP H0221694A JP 17160688 A JP17160688 A JP 17160688A JP 17160688 A JP17160688 A JP 17160688A JP H0221694 A JPH0221694 A JP H0221694A
Authority
JP
Japan
Prior art keywords
circuit board
printed circuit
resin
printed wiring
impregnated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17160688A
Other languages
Japanese (ja)
Inventor
Koji Sato
光司 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP17160688A priority Critical patent/JPH0221694A/en
Publication of JPH0221694A publication Critical patent/JPH0221694A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H05K3/4676Single layer compositions

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To decrease a coefficient of thermal expansion for facilitating fine patterning by disposing a printed circuit board on one face of another printed circuit board through aramid fiber cloth impregnated with resin and integrating them. CONSTITUTION:A printed circuit board is disposed on one face of another printed circuit board through cloth of aramid fibers impregnated with resin and they are integrated. For example, a double-sided printed circuit board consisting of a laminate of glass fabric base material impregnated with epoxy resin is disposed on one face of a double-sided printed circuit board consisting of a laminate of glass fabric base material impregnated with epoxy resin while three sheets of aramid fiber cloth impregnated with epoxy resin are interposed therebetween and they are integrated together so that four-layer printed circuit board is produced. Since a coefficient of thermal expansion is decreased in such multilayer circuit board, fine patterning can be performed easily.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電気機器、電子機器、通信機器、計算機器等に
用いられる多層プリント配線板に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a multilayer printed wiring board used in electrical equipment, electronic equipment, communication equipment, computing equipment, etc.

〔従来の技術〕[Conventional technology]

従来、両面プリント配線板、多層プリント配線板には耐
熱性の点で基材としてガラス布が用いられている。しか
しガラス布け#熱性はよいが熱膨張性が大きく最近のフ
ァインパターン化に際して問題になることがあった。
Conventionally, glass cloth has been used as a base material for double-sided printed wiring boards and multilayer printed wiring boards because of its heat resistance. However, although glass cloth has good thermal properties, it has large thermal expansion properties, which has caused problems in recent fine patterning.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の技術で述べたようにガラス布を基材とするプリン
ト配線板では熱膨張性が大きい。本発明は従来の技術に
おける上述の問題点に鑑みてなされたもので、その目的
とするところは部品実装数が多く、且つ低熱膨張性の多
層プリント配線板を提供することにある。
As described in the related art section, printed wiring boards based on glass cloth have high thermal expansion. The present invention has been made in view of the above-mentioned problems in the conventional technology, and its purpose is to provide a multilayer printed wiring board with a large number of mounted components and low thermal expansion.

〔問題点を解決するための手段〕[Means for solving problems]

本発明はプリント配線板の片面に、樹脂含浸アラミド繊
維布を介してプリント配線板を配設−像化してなること
を特徴とする多層プリント配線板のため、上記目的を達
成することができたもので、以下本発明の詳細な説明す
る。
The present invention was able to achieve the above object because it is a multilayer printed wiring board characterized in that a printed wiring board is arranged and imaged on one side of the printed wiring board through a resin-impregnated aramid fiber cloth. The present invention will now be described in detail.

本発明に用いるプリント配線板としては、両面プリント
配線板、多層プリント配線板等が用いられ、プリント配
線板を構成する樹脂、基材の種類は特に限定するもので
はない。プリント配線板の回路形成についても銅箔等の
金属箔をエツチング処理して形成したもの、アディティ
ブ法等で鍍金によって回路を形成したもの、或は導電材
料等の印刷によって回路を形成したもの等で特に限定す
るものではない。ただ好ましくは上下のデリント配線板
は類似構成のものを用いることが反り、ネジレの点でよ
く好ましいことである。樹脂含浸アラミド繊維布に用い
る樹脂としてはフェノール樹脂・クレゾール樹脂、エポ
キシ樹脂、不飽和ポリエステル樹脂、ポリイミド樹脂、
ポリブタジェン樹脂、ポリアミド樹脂、51% 化m脂
、ボリフエ3レンオキサイド樹脂、ポリフェニレンスル
ファイド樹脂等の単独、変性物、混合物が用いられ、基
材はアラミドlamからなる織布、不織布、マット、ベ
ーパー、寒冷紗、ネット等である。樹脂含浸アラミド繊
維布は必要に応じ工〜複数枚を用いる仁とができ、特に
限定するものではない。−像化手段についてはプレス法
、多段プレス法、真空プレス法、マルチロール法、ダプ
ルペ〃ト法等が用いられ特に限定するものではない。
As the printed wiring board used in the present invention, a double-sided printed wiring board, a multilayer printed wiring board, etc. are used, and the types of resin and base material that constitute the printed wiring board are not particularly limited. Regarding circuit formation on printed wiring boards, there are circuits formed by etching metal foil such as copper foil, circuits formed by plating using additive methods, or circuits formed by printing conductive materials, etc. It is not particularly limited. However, it is preferable to use upper and lower delinted wiring boards of similar construction in order to prevent warping and twisting. Resins used for resin-impregnated aramid fiber cloth include phenolic resin/cresol resin, epoxy resin, unsaturated polyester resin, polyimide resin,
Polybutadiene resin, polyamide resin, 51% molar resin, polyphenylene oxide resin, polyphenylene sulfide resin, etc. alone, modified products, and mixtures are used, and the base material is woven fabric, nonwoven fabric, mat, vapor, etc. made of aramid lam. These include cheesecloth, net, etc. The resin-impregnated aramid fiber cloth can be fabricated as required, and is not particularly limited. - The imaging method may be a press method, a multistage press method, a vacuum press method, a multi-roll method, a double paste method, etc., and is not particularly limited.

以下本発明を実施例にもとづいて説明する。The present invention will be explained below based on examples.

実施例 厚み1.6ffのがフス布基材エポキシ樹脂積層板から
なる両面プリント配線板の片面に、厚み0.1鱈のエポ
キシ樹脂含浸アラミド繊維布3枚を介して厚み1.6 
flのがラス布基材エポキシ樹脂積層板からなる両面プ
リント配線板を配設した積層体を成形圧力40 k(1
/cd 、 165°Cで90分間積層成形 して4層
回路プリント配線板を得た。
Example: On one side of a double-sided printed wiring board made of a 1.6 ff thick epoxy resin laminate with a fuss cloth base, a 1.6 ff thick epoxy resin-impregnated aramid fiber cloth with a thickness of 0.1 ff was interposed on one side.
A laminate with a double-sided printed wiring board made of an epoxy resin laminate with a lath cloth base material was molded under a molding pressure of 40 k (1
/cd for 90 minutes at 165°C to obtain a four-layer circuit printed wiring board.

比較例 樹脂含浸基材として厚み0.1gのエポキシ樹脂含浸が
フス布3枚を用いた以外は実施例と同様に処理して4層
回路プリント配線板を得九。
Comparative Example A four-layer circuit printed wiring board was obtained in the same manner as in the example except that three sheets of epoxy resin-impregnated cloth with a thickness of 0.1 g were used as the resin-impregnated base material.

実施例及び比較例の多層プリント配線板の性能は第1表
のようである。
The performances of the multilayer printed wiring boards of Examples and Comparative Examples are shown in Table 1.

第1表 〔発明の効果〕 本発明は上述した如く構成されている。特許請求の範囲
第1項に記載した構成を有する多層プリント配線板にお
いては熱膨張率が低下する効果を有している。
Table 1 [Effects of the Invention] The present invention is constructed as described above. The multilayer printed wiring board having the structure described in claim 1 has the effect of reducing the coefficient of thermal expansion.

Claims (1)

【特許請求の範囲】[Claims] (1) プリント配線板の片面に、樹脂含浸アラミド繊
維布を介してプリント配線板を配設一体化してなること
を特徴とする多層プリント配線板。
(1) A multilayer printed wiring board characterized in that a printed wiring board is integrally arranged on one side of the printed wiring board via a resin-impregnated aramid fiber cloth.
JP17160688A 1988-07-08 1988-07-08 Multilayer printed circuit board Pending JPH0221694A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17160688A JPH0221694A (en) 1988-07-08 1988-07-08 Multilayer printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17160688A JPH0221694A (en) 1988-07-08 1988-07-08 Multilayer printed circuit board

Publications (1)

Publication Number Publication Date
JPH0221694A true JPH0221694A (en) 1990-01-24

Family

ID=15926283

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17160688A Pending JPH0221694A (en) 1988-07-08 1988-07-08 Multilayer printed circuit board

Country Status (1)

Country Link
JP (1) JPH0221694A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH047895A (en) * 1990-04-25 1992-01-13 Shin Kobe Electric Mach Co Ltd Multilayer printed wiring board
JPH0456342U (en) * 1990-09-25 1992-05-14

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH047895A (en) * 1990-04-25 1992-01-13 Shin Kobe Electric Mach Co Ltd Multilayer printed wiring board
JPH0456342U (en) * 1990-09-25 1992-05-14

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