JPS61174796A - Manufacture of multilayer circuit board - Google Patents

Manufacture of multilayer circuit board

Info

Publication number
JPS61174796A
JPS61174796A JP1607985A JP1607985A JPS61174796A JP S61174796 A JPS61174796 A JP S61174796A JP 1607985 A JP1607985 A JP 1607985A JP 1607985 A JP1607985 A JP 1607985A JP S61174796 A JPS61174796 A JP S61174796A
Authority
JP
Japan
Prior art keywords
circuit board
multilayer circuit
punching
manufacture
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1607985A
Other languages
Japanese (ja)
Other versions
JPH0240234B2 (en
Inventor
倉橋 尭男
喜義 大坂
雅之 野田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Shin Kobe Electric Machinery Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Kobe Electric Machinery Co Ltd filed Critical Shin Kobe Electric Machinery Co Ltd
Priority to JP1607985A priority Critical patent/JPS61174796A/en
Publication of JPS61174796A publication Critical patent/JPS61174796A/en
Publication of JPH0240234B2 publication Critical patent/JPH0240234B2/ja
Granted legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、打抜きによるスルホールの形成が可能な、内
層に回路を有する多層回路板の製造法に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for producing a multilayer circuit board having circuits in its inner layers, in which through-holes can be formed by punching.

従来の技術 近年、プリント回路板については高密度化、高性能化の
要求が強(なる反面、価格競争が激しく、特に多層回路
板にとっては加工費の比率が高いためその低減が大きな
課題となっている。
Conventional technology In recent years, there has been a strong demand for higher density and higher performance for printed circuit boards (on the other hand, price competition is fierce, and especially for multilayer circuit boards, the processing cost ratio is high, so reducing costs has become a major issue. ing.

通常の多層回路板としては、電気的信頼性が必要なこと
から、ガラス布基材エポキシ樹脂が使用され、厚さ0.
1〜1.0 mmの片面または両面回路板を接着用プリ
プレグ(ガラス布基材エポキシ樹脂)を介して2枚以上
重ね、熱圧着して形成される。そして、これらの多層の
回路のあけが施こされた後、スルホールメッキが施こさ
れる。
Since electrical reliability is required for ordinary multilayer circuit boards, glass cloth-based epoxy resin is used, and the thickness is 0.
It is formed by stacking two or more single-sided or double-sided circuit boards with a thickness of 1 to 1.0 mm with an adhesive prepreg (glass cloth base epoxy resin) interposed therebetween and bonding them under heat. After opening these multilayer circuits, through-hole plating is applied.

しかるに、この穴あけ条件はスルホールメッキ部の電気
的信頼性に関連するため、穴部及びその周辺に亀裂、剥
離が入らないような条件を設定する必要がある。このよ
うな穴あけ作業は作業時間がかかり加工費を上げる要因
となり、近年要求の多い単価引き下げに逆行している。
However, since this drilling condition is related to the electrical reliability of the through-hole plating portion, it is necessary to set conditions that will prevent cracks and peeling from occurring in the hole portion and its surroundings. This type of drilling work takes time and increases processing costs, going against the trend of unit price reductions that have been increasingly requested in recent years.

発明が解決しようとする問題点 以上のように、多層回路板の場合、電気的信頼性が必要
なことから、通常ガラスクロスを基材とするエポキシ樹
脂が用いられており、これらの基材は材質的に硬(、ド
リル加工が用いられている。穴あけ作業の能率をあげる
ために、通常スルホールとして使用される0、8〜1.
2φの穴を打抜加工によって得ようとすると、層間に亀
裂を生じてしまう。
Problems to be Solved by the Invention As mentioned above, in the case of multilayer circuit boards, since electrical reliability is required, epoxy resins based on glass cloth are usually used. The material is hard (drilling is used. In order to improve the efficiency of drilling work, 0, 8 to 1.
If an attempt is made to obtain a 2φ hole by punching, cracks will occur between the layers.

一方、増感剤入り積層板を用いて無電解メッキによる回
路加工を行なう所請アディティブ法の場合、穴あけを打
抜加工で行なうことがあるが、対象となる基材は紙基材
エポキシ樹脂又は紙基材フェノール樹脂であり、不透明
であるため多層回路板で重欠陥とされるボイドの発見に
不利である。
On the other hand, in the case of the additive method in which circuit processing is performed by electroless plating using a laminate containing a sensitizer, holes may be punched by punching, but the target substrate is paper-based epoxy resin or Since it is a paper-based phenolic resin and is opaque, it is disadvantageous for finding voids, which are considered to be serious defects in multilayer circuit boards.

本発明は、これらの欠点に対し、層内部のクラック、ボ
イドが容易に発見出来る程度の透明性を有し且つスルホ
ールを打抜加工によって形成し得る安価な多層回路板を
提供するものである。
The present invention solves these drawbacks by providing an inexpensive multilayer circuit board that has transparency to the extent that cracks and voids inside the layers can be easily detected and that allows through-holes to be formed by punching.

問題点を解決するための手段 すなわち、本発明は、内層に回路を設けた多層板の製造
において、基材として単重30〜150g / m2の
ガラス不織布を用いることを特徴とするものである。
Means for solving the problem, that is, the present invention is characterized in that a glass nonwoven fabric with a unit weight of 30 to 150 g/m2 is used as a base material in the production of a multilayer board with a circuit provided in the inner layer.

作用 これにより、ガラス布基材の場合と電気的信頼性を大き
く変えることなく、厚さ1.2 mm以下であれば打抜
加工によってスルホールメッキ穴を形成出来、通常のス
ルホールメッキ加工工程により高品位のスルホール信頼
性が得られる。
As a result, through-hole plating holes can be formed by punching if the thickness is 1.2 mm or less without significantly changing the electrical reliability compared to the case of glass cloth substrates, and high-quality through-hole plating can be formed using the normal through-hole plating process. High-quality through-hole reliability can be obtained.

また、この回路板は半透明であり、層内の亀裂、剥離を
容易に発見が出来る。
Additionally, this circuit board is translucent, making it easy to detect cracks and peeling within the layers.

ガラス不織布としては、単重が30g /m2〜150
g/m2の範囲のものを用いる必要がある。ガラス不織
布の単重が、30g 7m2未満の場合、引張り強度が
弱く、樹脂の塗工工程で基材切れを生じ塗工出来ず、単
重が、150 g 7m2を越える場合には、塗工乾燥
工程で基材内部に含浸された溶剤が十分飛散せず除去出
来ないため、多層回路板とした時にボイドを生じる。
As a glass non-woven fabric, the unit weight is 30g/m2~150
It is necessary to use a material in the range of g/m2. If the unit weight of the glass nonwoven fabric is less than 30g 7m2, the tensile strength will be weak and the base material will break during the resin coating process, making it impossible to coat.If the unit weight exceeds 150g 7m2, the coating will not dry. The solvent impregnated inside the base material during the process cannot be sufficiently scattered and removed, resulting in voids when it is made into a multilayer circuit board.

実施例 本発明では、打抜きピンの材質としてハイス鋼、金型材
質として5KD−12程度を用いれば、厚さ1.2mm
までは打抜加工によってスルホールを形成し得る多層回
路板を提供出来る。
Example In the present invention, if high-speed steel is used as the material of the punching pin and about 5KD-12 is used as the material of the mold, the thickness is 1.2 mm.
Until now, it is possible to provide a multilayer circuit board in which through holes can be formed by punching.

回路板の各眉間の接合に使用する接着用プリプレグにも
、当然打抜加工の観点から同様にガラス不織布基材が用
いられるが、ガラス不織布基材に含浸する樹脂量として
は50〜8596が推奨出来る。また、ガラス不織布は
、ガラス繊維のみからなるもののほか、セルローズ繊維
等を混合したものである。
Of course, a glass nonwoven fabric base material is also used for the adhesive prepreg used to join each glabella of the circuit board from the viewpoint of punching processing, but the recommended amount of resin to be impregnated into the glass nonwoven fabric base material is 50 to 8596. I can do it. Furthermore, the glass nonwoven fabric is not only made of glass fibers, but also contains a mixture of cellulose fibers and the like.

次に、本発明の実施例について述べる。Next, examples of the present invention will be described.

実施例1 (1)  ビスフェノール型エポキシ樹脂(住友化学製
、商品名E S A −001)を80重量部、可撓性
エポキシ樹脂(シェル化学製、商品名EP−872)を
20重量部に対し、ジシアンジアミド4重量部、2−エ
チル4−メチルイミダゾール0.3重量部の混合物にア
セトンを加えてフェスとした。
Example 1 (1) 80 parts by weight of bisphenol-type epoxy resin (manufactured by Sumitomo Chemical, trade name ESA-001) and 20 parts by weight of flexible epoxy resin (manufactured by Shell Chemical, trade name EP-872) Acetone was added to a mixture of 4 parts by weight of dicyandiamide and 0.3 parts by weight of 2-ethyl-4-methylimidazole to prepare a face.

(2)  このフェスを、ポリメチロール化フェノール
で前処理した単重100g/m”のセルローズ繊維混抄
ガラス不織に含浸し、加熱乾燥してプリプレグA(樹脂
ft 5096)および接着用のプリプレグB(樹脂f
f16596)を得た。
(2) This face is impregnated with cellulose fiber-mixed glass nonwoven with a unit weight of 100 g/m'' that has been pretreated with polymethylolated phenol, and heated and dried to prepare prepreg A (resin ft 5096) and adhesive prepreg B ( resin f
f16596) was obtained.

(3)  このプリプレグA2枚の両面にそれぞれ35
ングし、両面回路板とした。
(3) 35% on each side of these two sheets of prepreg A
and made a double-sided circuit board.

(4)上記(3)で得た回路板2枚の間にプリプレグB
を1枚はさみ、加熱加工して1.1 mm厚の多層回路
板を得た。
(4) Prepreg B between the two circuit boards obtained in (3) above
One sheet was sandwiched and heated to obtain a 1.1 mm thick multilayer circuit board.

上記回路板のスルホールメッキ信頼性を確認するため、
スルホール部を一度に打抜くことの出来る金型(ビン材
質はハイス鋼、金型材質は5KD−12)を用い、打抜
温度50°Cにおいて80’ff油圧プレスで打抜いた
。これに、通常の方法でスルホールメッキしくメッキ厚
25〜35μ)、スルホールメッキ信頼性試験用パター
ン(110X 115 mm、穴数293個)を得た。
In order to confirm the reliability of through-hole plating on the above circuit board,
Using a die (bottle material: high-speed steel, die material: 5KD-12) capable of punching out the through-hole portion at once, punching was performed with an 80'ff hydraulic press at a punching temperature of 50°C. This was subjected to through-hole plating using a conventional method (plating thickness: 25 to 35 μm), and a pattern for through-hole plating reliability testing (110×115 mm, number of holes: 293) was obtained.

比較例1 実施例1において両面回路板を3枚使用し、同様にして
1.5mm厚の6層の回路板を得た。
Comparative Example 1 Three double-sided circuit boards were used in Example 1, and a six-layer circuit board with a thickness of 1.5 mm was obtained in the same manner.

これを用い、実施例1と同一金型でスルホールの打抜を
試みた。
Using this, punching of through holes was attempted using the same mold as in Example 1.

比較例2 (1)実施例1と同様のフェスを、エポキシシランで前
処理した厚さ0119 mmのガラスクロスに含浸し、
加熱乾燥してプリプレグC(+1脂量45%)を得、同
様にして厚さ0.10 mmのガラスクロスを用い接着
用プリプレグD(樹脂量55%)を作製した。
Comparative Example 2 (1) A glass cloth with a thickness of 0119 mm pretreated with epoxy silane was impregnated with the same fabric as in Example 1,
Prepreg C (+1 fat content: 45%) was obtained by heating and drying, and adhesive prepreg D (resin content: 55%) was produced in the same manner using glass cloth with a thickness of 0.10 mm.

(2)次に、実施例−1と同様にして両面回路板を得、
さらにこれを2枚用いて4層回路板を作製した。この回
路板について実施例1と同一金型でスルホールの打抜を
試みた。
(2) Next, a double-sided circuit board was obtained in the same manner as in Example-1,
Furthermore, a four-layer circuit board was produced using two of these sheets. An attempt was made to punch through holes on this circuit board using the same mold as in Example 1.

比較例3 実施例1において、スルホールをドリル加工で形成(穴
あけ条件二回転数55.00Orpm、送り速度0.0
5rev、多層回路板3枚重ね0.9φ超硬ドリル)シ
、スルホールメッキ信頼性試験用ハターンを作製した。
Comparative Example 3 In Example 1, through holes were formed by drilling (drilling conditions: 2 rotations 55.00 rpm, feed rate 0.0
5rev, three stacked multilayer circuit boards (0.9φ carbide drill), and a through-hole plating reliability test pattern were prepared.

上記各積層板の打抜加工性を第1表に示す。Table 1 shows the punching workability of each of the above laminates.

=−−ニー□ また、第1図に、実施例1と比較例3のスルホールメッ
キ信頼性の試験結果を示す。この信頼性試験は、260
°Cシリコン油浸漬5秒−20°C雰囲気20秒を1サ
イクルとして繰返し、スルホール導通抵抗の経時変化を
測定した。スルホール径は1 mmである。
=--knee □ Further, FIG. 1 shows the test results of through-hole plating reliability of Example 1 and Comparative Example 3. This reliability test is 260
A cycle of immersion in silicone oil at 5 seconds at 20 degrees Celsius and 20 seconds at 20 degrees Celsius was repeated as one cycle, and changes over time in through-hole conduction resistance were measured. The through hole diameter is 1 mm.

発明の効果 第1表から明らかなように、従来品では打抜加工時に亀
裂が入り使用不能であるが、本発明では外観良好であり
、その効果が顕著である。
Effects of the Invention As is clear from Table 1, the conventional product cracks during punching and is unusable, but the present invention has a good appearance and its effects are remarkable.

また、スルホールメッキの信頼性は、第1図に示すごと
くドリル加工の場合と同等であり、十分多層回路板とし
て使用可能である。
Furthermore, the reliability of through-hole plating is equivalent to that of drilling as shown in FIG. 1, and it can be used sufficiently as a multilayer circuit board.

尚、多層回路板の板厚は、本発明の構成でも厚くなると
、打抜時に剥離が発生するので制約が必要である。
Note that the thickness of the multilayer circuit board must be limited even in the configuration of the present invention because if it becomes thick, peeling will occur during punching.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、スルホール導通抵抗の信頼性試験における導
通抵抗の変化を示す曲線図である。
FIG. 1 is a curve diagram showing changes in conduction resistance in a reliability test of through-hole conduction resistance.

Claims (1)

【特許請求の範囲】[Claims] 内層に回路を設けた多層回路板の製造において、基材と
して単重30〜150g/m^2のガラス不織布を用い
ることを特徴とする多層回路板の製造法。
A method for manufacturing a multilayer circuit board, characterized in that a glass nonwoven fabric having a unit weight of 30 to 150 g/m^2 is used as a base material in manufacturing a multilayer circuit board with a circuit provided on the inner layer.
JP1607985A 1985-01-30 1985-01-30 Manufacture of multilayer circuit board Granted JPS61174796A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1607985A JPS61174796A (en) 1985-01-30 1985-01-30 Manufacture of multilayer circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1607985A JPS61174796A (en) 1985-01-30 1985-01-30 Manufacture of multilayer circuit board

Publications (2)

Publication Number Publication Date
JPS61174796A true JPS61174796A (en) 1986-08-06
JPH0240234B2 JPH0240234B2 (en) 1990-09-10

Family

ID=11906546

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1607985A Granted JPS61174796A (en) 1985-01-30 1985-01-30 Manufacture of multilayer circuit board

Country Status (1)

Country Link
JP (1) JPS61174796A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02177498A (en) * 1988-12-28 1990-07-10 Shin Kobe Electric Mach Co Ltd Multilayer printed wiring board
JPH04215497A (en) * 1990-12-14 1992-08-06 Matsushita Electric Works Ltd Manufacture of multilayer circuit board

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5521204A (en) * 1978-08-01 1980-02-15 Sumitomo Bakelite Co Thermal hardening resin laminated structure and its preparation
JPS56165397A (en) * 1980-05-24 1981-12-18 Mitsubishi Gas Chemical Co Method of producing multilayer printed board
JPS5719587A (en) * 1980-07-09 1982-02-01 Shinagawa Refractories Co Protection of metalic structure in ceramic kiln
JPS5751998A (en) * 1980-07-08 1982-03-27 Mannesmann Ag Apparatus for regulating axial compressor
JPS5823498A (en) * 1981-08-04 1983-02-12 三菱瓦斯化学株式会社 Glass cloth board
JPS58115880A (en) * 1981-12-28 1983-07-09 三菱瓦斯化学株式会社 Glass woven fabric base material
JPS5974698A (en) * 1982-10-21 1984-04-27 日立化成工業株式会社 Method of producing 3-layer printed circuit board
JPS61117883A (en) * 1984-11-14 1986-06-05 松下電工株式会社 Multilayer printed wiring board

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5521204A (en) * 1978-08-01 1980-02-15 Sumitomo Bakelite Co Thermal hardening resin laminated structure and its preparation
JPS56165397A (en) * 1980-05-24 1981-12-18 Mitsubishi Gas Chemical Co Method of producing multilayer printed board
JPS5751998A (en) * 1980-07-08 1982-03-27 Mannesmann Ag Apparatus for regulating axial compressor
JPS5719587A (en) * 1980-07-09 1982-02-01 Shinagawa Refractories Co Protection of metalic structure in ceramic kiln
JPS5823498A (en) * 1981-08-04 1983-02-12 三菱瓦斯化学株式会社 Glass cloth board
JPS58115880A (en) * 1981-12-28 1983-07-09 三菱瓦斯化学株式会社 Glass woven fabric base material
JPS5974698A (en) * 1982-10-21 1984-04-27 日立化成工業株式会社 Method of producing 3-layer printed circuit board
JPS61117883A (en) * 1984-11-14 1986-06-05 松下電工株式会社 Multilayer printed wiring board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02177498A (en) * 1988-12-28 1990-07-10 Shin Kobe Electric Mach Co Ltd Multilayer printed wiring board
JPH04215497A (en) * 1990-12-14 1992-08-06 Matsushita Electric Works Ltd Manufacture of multilayer circuit board

Also Published As

Publication number Publication date
JPH0240234B2 (en) 1990-09-10

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