JPH0240234B2 - - Google Patents

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Publication number
JPH0240234B2
JPH0240234B2 JP60016079A JP1607985A JPH0240234B2 JP H0240234 B2 JPH0240234 B2 JP H0240234B2 JP 60016079 A JP60016079 A JP 60016079A JP 1607985 A JP1607985 A JP 1607985A JP H0240234 B2 JPH0240234 B2 JP H0240234B2
Authority
JP
Japan
Prior art keywords
circuit board
punching
holes
multilayer circuit
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60016079A
Other languages
Japanese (ja)
Other versions
JPS61174796A (en
Inventor
Akio Kurahashi
Kyoshi Oosaka
Masayuki Noda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Shin Kobe Electric Machinery Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Kobe Electric Machinery Co Ltd filed Critical Shin Kobe Electric Machinery Co Ltd
Priority to JP1607985A priority Critical patent/JPS61174796A/en
Publication of JPS61174796A publication Critical patent/JPS61174796A/en
Publication of JPH0240234B2 publication Critical patent/JPH0240234B2/ja
Granted legal-status Critical Current

Links

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

産業上の利用分野 本発明は、打抜きによるスルホールの形成が可
能な、内層に回路を有する多層回路板の製造法に
関する。 従来の技術 近年、プリント回路板については高密度化、高
性能化の要求が強くなる反面、価格競争が激し
く、特に多層回路板にとつては加工費の比率が高
いためその低減が大きな課題となつている。 通常の多層回路板としては、電気的信頼性が必
要なことから、ガラス布基材エポキシ樹脂が使用
され、厚さ0.1〜1.0mmの片面または両面回路板を
接着用プリプレグ(ガラス布基材エポキシ樹脂)
を介して2枚以上重ね、熱圧着して形成される。
そして、これらの多層の回路の導通を図るスルホ
ールメツキを形成するにあたつては、所定の回路
部にドリル加工によつて穴あけが施こされた後、
スルホールメツキが施こされる。 しかるに、この穴あけ条件はスルホールメツキ
部の電気的信頼性に関連するため、穴部及びその
周辺に亀裂、剥離が入らないような条件を設定す
る必要がある。このような穴あけ作業は作業時間
がかかり加工費を上げる要因となり、近年要求の
多い単価引き下げに逆行している。 発明が解決しようとする問題点 以上のように、多層回路板の場合、電気的信頼
性が必要なことから、通常ガラスクロスを基材と
するエポキシ樹脂が用いられており、これらの基
材は材質的に硬く、ドリル加工が用いられてい
る。穴あけ作業の能率をあげるために、通常スル
ホールとして使用される0.8〜1.2φの穴を打抜加
工によつて得ようとすると、層間に亀裂を生じて
しまう。 一方、増感剤入り積層板を用いて無電解メツキ
による回路加工を行なう所謂アデイテイブ法の場
合、穴あけを打抜加工で行なうことがあるが、対
象となる基材は紙基材エポキシ樹脂又は紙基材フ
エノール樹脂であり、不透明であるため多層回路
板で重欠陥とされるボイドの発見に不利である。 本発明は、これらの欠点に対し、層内部のクラ
ツク、ボイドが容易に発見出来る程度の透明性を
有し且つスルホールを打抜加工によつて形成し得
る安価な多層回路板を提供するものである。 問題点を解決するための手段 すなわち、本発明は、内層に回路を設けた多層
回路板において、回路層間の樹脂含浸基材よりな
る絶縁層の基材として単重30〜150g/m2のガラ
ス不織布を用いることを特徴とするものである。
また、回路板の総厚さは1.2mm以下とする。 作 用 これにより、ガラス布基材の場合と電気的信頼
性を大きく変えることなく、厚さ1.2mm以下であ
れば打抜加工によつてスルホールメツキ穴を形成
出来、通常のスルホールメツキ加工工程により高
品位のスルホール信頼性が得られる。また、この
回路板は半透明であり、層内の亀裂、剥離を容易
に発見が出来る。 ガラス不織布としては、単重が30g/m2
150g/m2の範囲のものを用いる必要がある。ガ
ラス不織布の単重が、30g/m2未満の場合、引張
り強度が弱く、樹脂の塗工工程で基材切れを生じ
塗工出来ず、単重が、150g/m2を越える場合に
は、塗工乾燥工程で基材内部に含浸された溶剤が
十分飛散せず除去出来ないため、多層回路板とし
た時にポイドを生じる。 実施例 本発明では、打抜きピンの材質としてハイス
鋼、金型材質としてSKD―12程度を用いれば、
厚さ1.2mmまでは打抜加工によつてスルホールを
形成し得る多層回路板を提供出来る。 回路板の各層間の接合に使用する接着用プリプ
レグにも、当然打抜加工の観点から同様にガラス
不織布基材が用いられるが、ガラス不織布基材に
含浸する樹脂量としては50〜85%が推奨出来る。
また、ガラス不織布は、ガラス繊維のみからなる
もののほか、セルローズ繊維等を混合したもので
ある。 次に、本発明の実施例について述べる。 実施例 1 (1) ビスフエノール型エポキシ樹脂(住友化学
製、商品名ESA―001)を80重量部、可撓性エ
ポキシ樹脂(シエル化学製、商品名EP―872)
を20重量部に対し、ジシアンジアミド4重量
部、2―エチル4―メチルイミダゾール0.3重
量部の混合物にアセトンを加えてワニスとし
た。 (2) このワニスを、ポリメチロール化フエノール
で前処理した単重100g/m2のセルローズ繊維
混抄ガラス不織に含浸し、加熱乾燥してプリプ
レグA(樹脂量50%)および接着用のプリプレ
グB(樹脂量65%)を得た。 (3) このプリプレグA2枚の両面にそれぞれ35μ厚
銅箔1枚を重ね、加熱加圧して積層板を製作し
た。次に、この積層板の銅箔をエツチングし、
両面回路板とした。 (4) 上記(3)で得た回路板2枚の間にプリプレグB
を1枚はさみ、加熱加工して1.1mm厚の多層回
路板を得た。 上記回路板のスルホールメツキ信頼性を確認す
るため、スルホール部を一度に打抜くことの出来
る金型(ピン材質はハイス鋼、金型材質はSKD
―12)を用い、打抜温度50℃において80〓油圧プ
レスで打抜いた。これに、通常の方法でスルホー
ルメツキし(メツキ厚25〜35μ)、スルホールメ
ツキ信頼性試験用パターン(110×115mm、穴数
293個)を得た。 比較例 1 実施例1において両面回路板を3枚使用し、同
様にして1.5mm厚の6層の回路板を得た。 これを用い、実施例1と同一金型でスルホール
の打抜を試みた。 比較例 2 (1) 実施例1と同様のワニスを、エポキシシラン
で前処理した厚さ0.19mmのガラスクロスに含浸
し、加熱乾燥してプリプレグC(樹脂量45%)
を得、同様にして厚さ0.10mmのガラスクロスを
用い接着用プリプレグD(樹脂量55%)を作製
した。 (2) 次に、プリプレグCを用い、実施例1と同様
にして両面回路板を得、さらにこれを2枚とプ
リプレグDを用いて4層回路板を作製した。こ
の回路板について実施例1と同一金型でスルホ
ールの打抜を試みた。 比較例 3 実施例1において、スルホールをドリル加工で
形成(穴あけ条件:回転数55000rpm、送り速度
0.05rev、多層回路板3枚重ね0.9φ超硬ドリル)
し、スルホールメツキ信頼性試験用パターンを作
製した。 上記各積層板の打抜加工性を第1表に示す。ま
た、第1図に、実施例1と比較例3のスルホール
メツキ信頼性の試験結果を示す。この信頼性試験
は、260℃シリコン油浸漬5秒−20℃雰囲気20秒
を1サイクルとして繰返し、スルホール導通抵抗
の経時変化を測定した。スルホール径は1mmであ
る。
INDUSTRIAL APPLICATION FIELD The present invention relates to a method for manufacturing a multilayer circuit board having circuits in its inner layers, in which through holes can be formed by punching. Conventional technology In recent years, there has been a strong demand for higher density and higher performance for printed circuit boards, but on the other hand, price competition is fierce, and especially for multilayer circuit boards, the processing cost ratio is high, so reducing costs is a major issue. It's summery. Since electrical reliability is required for normal multilayer circuit boards, glass cloth-based epoxy resin is used, and adhesive prepreg (glass cloth-based epoxy resin resin)
It is formed by stacking two or more sheets together and bonding them under heat.
In order to form through-hole plating for electrical conduction of these multilayer circuits, holes are drilled in the predetermined circuit parts, and then
Through-hole plating is applied. However, since this drilling condition is related to the electrical reliability of the through-hole plating section, it is necessary to set conditions that will prevent cracks and peeling from occurring in the hole section and its surroundings. This type of drilling work takes time and increases processing costs, going against the trend of unit price reductions that have been increasingly requested in recent years. Problems to be Solved by the Invention As mentioned above, in the case of multilayer circuit boards, since electrical reliability is required, epoxy resins based on glass cloth are usually used. The material is hard and drill processing is used. In order to improve the efficiency of the drilling operation, if a hole of 0.8 to 1.2φ, which is normally used as a through hole, is attempted to be obtained by punching, cracks will occur between the layers. On the other hand, in the case of the so-called additive method, in which circuit processing is performed by electroless plating using a laminate containing a sensitizer, holes may be punched by punching, but the target substrate is paper-based epoxy resin or paper. The base material is phenolic resin, and because it is opaque, it is disadvantageous for finding voids, which are considered to be serious defects in multilayer circuit boards. The present invention addresses these drawbacks by providing an inexpensive multilayer circuit board that is transparent enough to allow cracks and voids inside the layers to be easily discovered, and in which through holes can be formed by punching. be. Means for Solving the Problems That is, the present invention provides a multilayer circuit board in which a circuit is provided in the inner layer, using glass having a unit weight of 30 to 150 g/m 2 as a base material for an insulating layer consisting of a resin-impregnated base material between circuit layers. It is characterized by the use of nonwoven fabric.
Additionally, the total thickness of the circuit board shall be 1.2mm or less. Function: As a result, through-hole plating holes can be formed by punching if the thickness is 1.2 mm or less, without significantly changing the electrical reliability compared to the case of glass cloth substrates, and by using the normal through-hole plating process. High quality through-hole reliability can be obtained. Additionally, this circuit board is translucent, making it easy to detect cracks and peeling within the layers. As a glass nonwoven fabric, the unit weight is 30g/m 2 ~
It is necessary to use one in the range of 150g/ m2 . If the unit weight of the glass nonwoven fabric is less than 30g/ m2 , the tensile strength will be weak and the base material will break during the resin coating process, making it impossible to coat.If the unit weight exceeds 150g/ m2 , The solvent impregnated inside the base material during the coating and drying process does not scatter sufficiently and cannot be removed, resulting in voids when it is made into a multilayer circuit board. Example In the present invention, if high-speed steel is used as the material of the punching pin and approximately SKD-12 is used as the material of the mold,
It is possible to provide multilayer circuit boards with thicknesses up to 1.2 mm in which through holes can be formed by punching. Naturally, a glass nonwoven fabric base material is also used for the adhesive prepreg used to bond each layer of a circuit board from the viewpoint of punching processing, but the amount of resin impregnated into the glass nonwoven fabric base material is 50 to 85%. I can recommend it.
Furthermore, the glass nonwoven fabric is not only made of glass fibers, but also contains a mixture of cellulose fibers and the like. Next, examples of the present invention will be described. Example 1 (1) 80 parts by weight of bisphenol epoxy resin (manufactured by Sumitomo Chemical, trade name ESA-001), flexible epoxy resin (manufactured by Ciel Chemical, trade name EP-872)
A varnish was prepared by adding acetone to a mixture of 20 parts by weight, 4 parts by weight of dicyandiamide, and 0.3 parts by weight of 2-ethyl 4-methylimidazole. (2) This varnish is impregnated into a cellulose fiber-mixed glass nonwoven with a unit weight of 100 g/m 2 that has been pretreated with polymethylolated phenol, and heated and dried to form prepreg A (resin content 50%) and prepreg B for adhesion. (Resin amount: 65%) was obtained. (3) One sheet of 35μ thick copper foil was placed on each side of two sheets of prepreg A, and a laminate was produced by heating and pressing. Next, the copper foil of this laminate is etched,
It was made into a double-sided circuit board. (4) Prepreg B is placed between the two circuit boards obtained in (3) above.
A single sheet was sandwiched and heat-processed to obtain a 1.1 mm thick multilayer circuit board. In order to confirm the reliability of through-hole plating on the above circuit board, we used a mold that can punch out the through-holes at once (pin material is high-speed steel, mold material is SKD).
-12), and was punched with an 80 mm hydraulic press at a punching temperature of 50°C. This was plated with through holes using the usual method (plating thickness 25 to 35μ), and a pattern for through hole plating reliability testing (110 x 115 mm, number of holes) was applied.
293 pieces) were obtained. Comparative Example 1 Three double-sided circuit boards were used in Example 1, and a six-layer circuit board with a thickness of 1.5 mm was obtained in the same manner. Using this, punching of through holes was attempted using the same mold as in Example 1. Comparative Example 2 (1) A glass cloth pretreated with epoxy silane with a thickness of 0.19 mm was impregnated with the same varnish as in Example 1, and heated and dried to form Prepreg C (resin amount 45%).
An adhesive prepreg D (resin content: 55%) was produced in the same manner using glass cloth with a thickness of 0.10 mm. (2) Next, a double-sided circuit board was obtained using prepreg C in the same manner as in Example 1, and two of these and prepreg D were used to produce a four-layer circuit board. An attempt was made to punch through holes on this circuit board using the same mold as in Example 1. Comparative Example 3 In Example 1, through holes were formed by drilling (drilling conditions: rotation speed 55000 rpm, feed speed
0.05rev, 3-layer multilayer circuit board 0.9φ carbide drill)
Then, a pattern for through hole plating reliability test was prepared. Table 1 shows the punching workability of each of the above laminates. Further, FIG. 1 shows the test results of throughhole plating reliability of Example 1 and Comparative Example 3. In this reliability test, one cycle of immersion in silicone oil at 260° C. for 5 seconds and 20 seconds in an atmosphere at 20° C. was repeated, and changes over time in through-hole conduction resistance were measured. The through hole diameter is 1 mm.

【表】【table】

【表】 発明の効果 第1表から明らかなように、従来品では打抜加
工時に亀裂が入り使用不能であるが、本発明では
外観良好であり、その効果が顕著である。また、
スルホールメツキの信頼性は、第1図に示すごと
くドリル加工の場合と同等であり、十分多層回路
板として使用可能である。 尚、多層回路板の板厚は、本発明の構成でも厚
くなると、打抜時に剥離が発生するので制約が必
要である。
[Table] Effect of the Invention As is clear from Table 1, the conventional product cracks during punching and is unusable, but the present invention has a good appearance and its effects are remarkable. Also,
As shown in FIG. 1, the reliability of through-hole plating is equivalent to that of drilling, and it can be used sufficiently as a multilayer circuit board. Note that the thickness of the multilayer circuit board must be limited even in the configuration of the present invention because if it becomes thick, peeling will occur during punching.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、スルホール導通抵抗の信頼性試験に
おける導通抵抗の変化を示す曲線図である。
FIG. 1 is a curve diagram showing changes in conduction resistance in a reliability test of through-hole conduction resistance.

Claims (1)

【特許請求の範囲】[Claims] 1 内層に回路を設けた多層回路板において、回
路層間の樹脂含浸基材よりなる絶縁層の基材とし
て単重30〜150g/m2のガラス不織布を用い、回
路板総厚さが1.2mm以下であることを特徴とする
多層回路板。
1. In a multilayer circuit board with a circuit on the inner layer, a glass nonwoven fabric with a unit weight of 30 to 150 g/ m2 is used as the base material for the insulating layer consisting of a resin-impregnated base material between the circuit layers, and the total thickness of the circuit board is 1.2 mm or less. A multilayer circuit board characterized by:
JP1607985A 1985-01-30 1985-01-30 Manufacturing method of multilayer circuit board Granted JPS61174796A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1607985A JPS61174796A (en) 1985-01-30 1985-01-30 Manufacturing method of multilayer circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1607985A JPS61174796A (en) 1985-01-30 1985-01-30 Manufacturing method of multilayer circuit board

Publications (2)

Publication Number Publication Date
JPS61174796A JPS61174796A (en) 1986-08-06
JPH0240234B2 true JPH0240234B2 (en) 1990-09-10

Family

ID=11906546

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1607985A Granted JPS61174796A (en) 1985-01-30 1985-01-30 Manufacturing method of multilayer circuit board

Country Status (1)

Country Link
JP (1) JPS61174796A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02177498A (en) * 1988-12-28 1990-07-10 Shin Kobe Electric Mach Co Ltd Multilayer printed wiring board
JP2533689B2 (en) * 1990-12-14 1996-09-11 松下電工株式会社 Method for manufacturing multilayer circuit board

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5521204A (en) * 1978-08-01 1980-02-15 Sumitomo Bakelite Co Thermal hardening resin laminated structure and its preparation
JPS56165397A (en) * 1980-05-24 1981-12-18 Mitsubishi Gas Chemical Co Method of producing multilayer printed board
DE3025753A1 (en) * 1980-07-08 1982-01-28 Mannesmann AG, 4000 Düsseldorf DEVICE FOR CONTROLLING AXIAL COMPRESSORS
JPS5937432B2 (en) * 1980-07-09 1984-09-10 品川白煉瓦株式会社 How to protect the metal structure inside a kiln
JPS5823498A (en) * 1981-08-04 1983-02-12 三菱瓦斯化学株式会社 glass woven fabric base material
JPS58115880A (en) * 1981-12-28 1983-07-09 三菱瓦斯化学株式会社 glass woven fabric base material
JPS5974698A (en) * 1982-10-21 1984-04-27 日立化成工業株式会社 Method of producing 3-layer printed circuit board
JPS61117883A (en) * 1984-11-14 1986-06-05 松下電工株式会社 Multilayer printed wiring board

Also Published As

Publication number Publication date
JPS61174796A (en) 1986-08-06

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