JPH03155190A - Multilayer interconnection board - Google Patents

Multilayer interconnection board

Info

Publication number
JPH03155190A
JPH03155190A JP29540689A JP29540689A JPH03155190A JP H03155190 A JPH03155190 A JP H03155190A JP 29540689 A JP29540689 A JP 29540689A JP 29540689 A JP29540689 A JP 29540689A JP H03155190 A JPH03155190 A JP H03155190A
Authority
JP
Japan
Prior art keywords
resin
layer material
glass
layer
nonwoven fabric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29540689A
Other languages
Japanese (ja)
Inventor
Nobuhito Hosoki
細木 伸仁
Shigeaki Kojima
小島 甚昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP29540689A priority Critical patent/JPH03155190A/en
Publication of JPH03155190A publication Critical patent/JPH03155190A/en
Pending legal-status Critical Current

Links

Landscapes

  • Laminated Bodies (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To improve a drill straight-drive property and a boiling heat resistance by forming an inner-layer material and an outer-layer material including a specific nonwoven fabric in one piece through a resin. CONSTITUTION:An external-layer material is provided and formed in one piece on the upper surface and/or lower surface of a required number of inner-layer materials including a glass nonwoven fabric through a resin layer. The inner- layer material consists of an electrical circuit which is formed on a single- surface or a double-surface metal-clad laminated plate consisting of a resin such as a phenol resin, a cresol resin, an epoxy resin, and a fluoric resin, an inorganic fiber such as glass and asbestos, an organic synthetic fiber such as polyester, a natural fiber such as cotton, and paper base. But, the glass non- woven cloth is always used for the base. It is desirable to add a filling agent such as alumina, silica, talc, synthetic resin chip, pulp, and cotton powder to a resin which is dipped into the resin. Individuals such as copper, aluminum, iron, nickel, and zinc or a metal foil consisting of an alloy or a single-side metal clad laminate plate is used as the outer-layer material.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電子機器、電気機器、コンピューター、通信機
器等に用いられる多層配線基板に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a multilayer wiring board used in electronic equipment, electrical equipment, computers, communication equipment, etc.

〔従来の技術〕[Conventional technology]

従来の多層配線基板に用すられてbる基材はガラス布で
あるため、スルホール加工時等のドリル加工におりて、
ドリル直進性が悪く、これに起因して煮沸耐熱性も悪く
なるという問題があった。
The base material used for conventional multilayer wiring boards is glass cloth, so it is difficult to drill during through-hole processing.
There was a problem in that the straightness of the drill was poor and the boiling heat resistance was also poor due to this.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の技術で述べたように、多層配線基板の基材にガラ
ス布のみを用Aるとドリル直進性、煮沸耐熱性が悪くな
る問題がある。本発明は従来の技術における上述の問題
点に鑑みてなされたもので、その目的とするところはド
リル直進性、煮沸耐熱性に優れた多層配線基板を提供す
ることにある。
As described in the prior art section, if only glass cloth is used as the base material of a multilayer wiring board, there is a problem that the drill straightness and boiling heat resistance deteriorate. The present invention has been made in view of the above-mentioned problems in the prior art, and its purpose is to provide a multilayer wiring board that is excellent in straight-line drilling performance and boiling heat resistance.

〔問題点を解決するための手段〕[Means for solving problems]

本発明はガラス不織布を含む所要枚数の内層材の上面及
び又は下面に、樹脂層を介して外層材を配役一体化した
ことを特徴とする多層配線基板のため、ガラス船織禰は
ガラス布よりドリルに対し柔らか論ため、ドリル直進性
、煮沸耐熱性を向上させることができたもので、以下本
発明の詳細な説明する。
The present invention is a multilayer wiring board characterized in that an outer layer material is integrated with the upper and/or lower surfaces of a required number of inner layer materials including a glass nonwoven fabric via a resin layer. Since it is soft compared to a drill, it is possible to improve the straightness of the drill and the boiling heat resistance.The present invention will be described in detail below.

本発明に用いる内層材としてはフェノール樹脂クレゾー
ル樹脂、エポキシ樹脂、不tj!和ポリニスデル樹脂、
ポリイミド樹脂、ポリブタジェン樹脂、ポリフェニレン
サルファイド樹脂、ポリブチレンテレフタレート樹脂、
ポリエチレンテレフタレート樹脂、弗化樹脂等の樹脂と
ガラス、アスベスト等の無機繊維やポリエステル、ポリ
アクリルポリアミド、ポリビニルアルコール等の有機合
成繊維や木綿等の天然繊維、紙基材とからなる片面又は
両面金属張積層板に電気回路を形成したものであるが、
基材の所要数故には必らずガラス不織布を用論ることが
必要で、ガラス不織布とはガラスベーパー全も包含する
ものである。基材にガラス不織布を用いた場合は好まし
くは基材に含浸させる樹暗にアルミナ、ミリ力、タルク
、炭酸カルシウム、水酸化アルミニウム、クレー ガラ
ス粉、ガラス繊維チーlプ、合成繊維チ・Iプ。パルプ
綿粉等の有機或は無機充填剤を添加しておくことが望ま
しい。この際樹脂と充填剤との比率は樹脂100重這部
(以下単に部と記す)に対し充填剤50〜200部が好
ましh0即ち50皿朱溝では吸湿後耐熱性が向上せず、
200部をこえると層間接檜性が低下するためである。
Inner layer materials used in the present invention include phenolic resin, cresol resin, epoxy resin, and Futj! Japanese polynisdel resin,
Polyimide resin, polybutadiene resin, polyphenylene sulfide resin, polybutylene terephthalate resin,
Single-sided or double-sided metal cladding made of resin such as polyethylene terephthalate resin or fluorinated resin, glass, inorganic fiber such as asbestos, organic synthetic fiber such as polyester, polyacrylic polyamide, or polyvinyl alcohol, natural fiber such as cotton, or paper base material. An electric circuit is formed on a laminated board.
Because of the required number of base materials, it is necessary to use a glass nonwoven fabric, and the glass nonwoven fabric includes all glass vapors. When a glass non-woven fabric is used as the base material, it is preferable to impregnate the base material with alumina, milium, talc, calcium carbonate, aluminum hydroxide, clay glass powder, glass fiber cheap, synthetic fiber chip. . It is desirable to add an organic or inorganic filler such as pulp cotton powder. At this time, the ratio of the resin to the filler is preferably 50 to 200 parts of the filler to 100 parts of the resin (hereinafter simply referred to as "parts").
This is because if it exceeds 200 parts, interlayer cypress properties will deteriorate.

檜ン脂層として内層材に用いたような樹脂の塗布層、樹
脂シート層或は樹脂と基材とからなる樹脂含浸基材層で
あり単独或は併用して用因ることができるが、好ましく
は厚み均一性を確保するため樹脂含浸基材を所要枚数用
いることが望ましい。外層材としては銅、アルミニウム
、鉄、ニーJケル、亜鉛等の単独、合金、複合からなる
金属箔や片面金属張積層板を用粘ることができる。一体
化手段としては多段プレス法、真空多段プレス法、マル
チロール法、タプルベルト法、ドラム法、無圧連続加熱
法等で積層一体化するものである。
A resin coating layer, a resin sheet layer, or a resin-impregnated base material layer consisting of a resin and a base material, such as the one used for the inner layer material as the cypress oil layer, can be used alone or in combination, but Preferably, in order to ensure thickness uniformity, it is desirable to use a required number of resin-impregnated base materials. As the outer layer material, metal foils or single-sided metal-clad laminates made of copper, aluminum, iron, aluminum, zinc, etc. alone, alloys, or composites can be used. Examples of the integration method include a multi-stage press method, a vacuum multi-stage press method, a multi-roll method, a tuple belt method, a drum method, a pressureless continuous heating method, and the like.

以下本発明を実施例にもとづ−て説明する。The present invention will be explained below based on examples.

実施例 硬化剤含有エポキシ樹脂100部に対し、水酸化アルミ
ニウム100部を加えた樹脂フェスをガラス不織布(日
本バイリーン株式会社製、品番E p m。
Example A resin face made by adding 100 parts of aluminum hydroxide to 100 parts of epoxy resin containing a curing agent was made of a glass nonwoven fabric (manufactured by Nippon Vilene Co., Ltd., product number E p m).

単重60g/♂)に樹脂量か5oN量優(以下単にチと
記す)になるように含浸、乾燥して樹脂含浸不織布基材
を得た。別に硬化剤含有エポキシ樹脂フェスをガラス布
(日東紡績株式会社製、品番116E)に樹脂量が45
優になるように含浸、乾燥して樹脂含浸基材を得た。次
に上記樹脂含浸不織布基材1枚の上下面に、上記樹脂含
浸基材を夫々1枚づつ介して厚み0,035 txの銅
箔を配設した積層体を成形圧力3QjQq/d 、 1
65℃で120分間積層成形して得た両面鋼張積層板の
両面に電気回路を形成して内層材とした。次に該内層材
の上下面に上記樹脂含浸基材を夫々2枚づつ介して厚み
Q、03511の銅箔を配設した積層体を成形圧力ao
Kq/d。
A resin-impregnated nonwoven fabric base material was obtained by impregnating a resin (unit weight 60 g/male) in an amount of 5 oN (hereinafter simply referred to as "chi") and drying. Separately, apply a curing agent-containing epoxy resin face to glass cloth (manufactured by Nittobo Co., Ltd., product number 116E) with a resin amount of 45
A resin-impregnated base material was obtained by impregnating and drying the resin to a smooth consistency. Next, a laminate in which copper foil with a thickness of 0,035 tx was disposed on the upper and lower surfaces of one resin-impregnated nonwoven fabric base material through one resin-impregnated base material was molded under a molding pressure of 3QjQq/d, 1.
Electric circuits were formed on both sides of a double-sided steel-clad laminate obtained by lamination molding at 65° C. for 120 minutes to obtain an inner layer material. Next, a laminate in which copper foil with a thickness of Q and 03511 was placed on the upper and lower surfaces of the inner layer material with two sheets of the above-mentioned resin-impregnated base material interposed therebetween was formed under a molding pressure of ao.
Kq/d.

165℃で120分間積層成形して4層回路配線基板を
得た。
Lamination molding was performed at 165° C. for 120 minutes to obtain a four-layer circuit wiring board.

比較例 実施例と同じ樹脂含浸基材6枚を重ねた上下面に、厚み
0.035111の銅箔を配設した積層体全成形圧力3
0Kq/d、 165℃で120分間積層成形して得た
両面銅張積層板の両面に電気回路を形成して得た内層材
を用すた以外は実施例と同様に処理して4層回路配線基
板を得た。
Comparative Example A laminate in which copper foil with a thickness of 0.035111 was placed on the upper and lower surfaces of six resin-impregnated substrates stacked together as in the example Total molding pressure 3
A 4-layer circuit was prepared in the same manner as in Example except that an inner layer material obtained by forming electric circuits on both sides of a double-sided copper-clad laminate obtained by lamination molding at 0 Kq/d and 165°C for 120 minutes was used. A wiring board was obtained.

実施例及び比較例の4層回路配線基板の性能は!!1表
のようである。
What is the performance of the 4-layer circuit wiring board of the example and comparative example? ! It looks like Table 1.

注 1111[14層回路配線基板1に2枚重ね、直径0.
35flのドリルで800Or、 p、 m、 12V
/vevで50  穴を開穴し、1枚目表(ドリル入口
)と2枚目裏(ドリル出口)の比較でみる。
Note 1111 [2 sheets stacked on 14-layer circuit wiring board 1, diameter 0.
800Or, p, m, 12V with 35fl drill
Drill 50 holes with /vev and compare the front of the first sheet (drill entrance) and the back of the second sheet (drill exit).

毫2 水で2時間、3時間、4時間煮沸し、煮沸後26
0℃の溶融ハンダに20秒間浸漬し、ふくれのないもの
を○、ふくれの発生するものを×とした。
2. Boil in water for 2 hours, 3 hours, 4 hours, 26 hours after boiling.
It was immersed in molten solder at 0° C. for 20 seconds, and those with no blisters were rated ◯, and those with blisters were rated ×.

〔発明の効果〕〔Effect of the invention〕

本発明は上述したaO<構成されて論る。特許請求の範
囲に記載した多層配線基板は、ドリル直進性、煮沸耐熱
性が向上する効果がある。
The present invention will be discussed as constructed above. The multilayer wiring board described in the claims has the effect of improving drill straightness and boiling heat resistance.

Claims (1)

【特許請求の範囲】[Claims] (1)ガラス不織布を含む所要枚数の内層材の上面及び
又は下面に、樹脂層を介して外層材を配設一体化したこ
とを特徴とする多層配線基板。
(1) A multilayer wiring board characterized in that an outer layer material is integrated with the upper and/or lower surfaces of a required number of inner layer materials including a glass nonwoven fabric via a resin layer.
JP29540689A 1989-11-14 1989-11-14 Multilayer interconnection board Pending JPH03155190A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29540689A JPH03155190A (en) 1989-11-14 1989-11-14 Multilayer interconnection board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29540689A JPH03155190A (en) 1989-11-14 1989-11-14 Multilayer interconnection board

Publications (1)

Publication Number Publication Date
JPH03155190A true JPH03155190A (en) 1991-07-03

Family

ID=17820197

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29540689A Pending JPH03155190A (en) 1989-11-14 1989-11-14 Multilayer interconnection board

Country Status (1)

Country Link
JP (1) JPH03155190A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5888627A (en) * 1996-05-29 1999-03-30 Matsushita Electric Industrial Co., Ltd. Printed circuit board and method for the manufacture of same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5888627A (en) * 1996-05-29 1999-03-30 Matsushita Electric Industrial Co., Ltd. Printed circuit board and method for the manufacture of same

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