JPH02277289A - Manufacture of printed wiring board - Google Patents

Manufacture of printed wiring board

Info

Publication number
JPH02277289A
JPH02277289A JP9834489A JP9834489A JPH02277289A JP H02277289 A JPH02277289 A JP H02277289A JP 9834489 A JP9834489 A JP 9834489A JP 9834489 A JP9834489 A JP 9834489A JP H02277289 A JPH02277289 A JP H02277289A
Authority
JP
Japan
Prior art keywords
copper
layer material
bismuth
circuit
inner layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9834489A
Other languages
Japanese (ja)
Inventor
Kunihiro Tsurumaru
鶴丸 邦浩
Sunao Ikoma
生駒 直
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP9834489A priority Critical patent/JPH02277289A/en
Publication of JPH02277289A publication Critical patent/JPH02277289A/en
Pending legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To improve interlayer adhesion and halo resistance by forming a laminate in which outer layer material is arranged at the outermost layer through a prepreg layer at the surface after applying bismuth-containing plating at the surface of circuit copper so as to precipitate eutectoid of bismuth and copper. CONSTITUTION:A laminate is formed in which outer layer material is arranged at the outermost layer through a prepreg layer at the surface of inner layer material after applying bismuth-containing copper plating on the surface of circuit copper of the inner layer material where electric circuits are formed at a single-sided or double-sided copper-clad laminate so as to precipitate the fine and uneven eutectoid of bismuth and copper at the surface of circuit copper. Hereby, the adhesion at the circuit surface of the inner layer material can be improved, and since there is no black copper oxide film at the surface, halo resistance can be improved.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電子機器、電気機器、コンピューター、通信機
器等に用いられるプリント配線板の製造方法に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing printed wiring boards used in electronic equipment, electrical equipment, computers, communication equipment, etc.

〔従来の技術〕[Conventional technology]

従来、プリント配線板は片面又は両面銅張積層板の銅箔
面に回路形成したものを内層材とし、内層材表面を粗化
、或は黒化処理等をおこなってからプリプレグ層を介し
、最外層に片面鋼張積層板や銀箔を外層材として配設し
た積層体を積層成形し一体化して得られるが、従来のパ
ターン回路間隔では上記方法でよいが、パターン回路間
隔が狭くなるファインパターンでは回路面積が増加し内
層材とプリプレグとの接着性が低下し、ドリル加工等の
穴あ行時の衝撃で開穴部周辺が層間剥離し耐ハロー性が
低下する問題があった。
Conventionally, printed wiring boards are made by forming a circuit on the copper foil surface of a single-sided or double-sided copper-clad laminate as an inner layer material, and after roughening or blackening the surface of the inner layer material, the final layer is bonded via a prepreg layer. It is obtained by laminating and integrally molding a laminate in which a single-sided steel-clad laminate or silver foil is arranged as an outer layer material.The above method is sufficient for conventional pattern circuit spacing, but for fine patterns where pattern circuit spacing is narrower. There was a problem in that the circuit area increased, the adhesiveness between the inner layer material and the prepreg decreased, and the impact during drilling etc. caused delamination in the vicinity of the hole, resulting in a decrease in halo resistance.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の技術で述べたように、内層材表面をサンドベーパ
ー サンドプラ、スト等で粗化する方法は均一な粗化が
できず回路を傷つける欠点があり、黒化処理では粗面表
面の黒色酸化銅皮膜のため、耐ハロー性が低下する欠点
がある。本発明は従来の技術における上述の問題点に鑑
みてなされたもので、その目的とするところは層間接着
性に優れ、且つ耐ハロー性のよいプリント配線板の製造
方法を提供することにある。
As mentioned in the conventional technology, the method of roughening the inner layer material surface with sand vapor, sand plastic, strike, etc. has the drawback of not being able to achieve uniform roughening and damaging the circuit. Because it is a film, it has the disadvantage of reduced halo resistance. The present invention has been made in view of the above-mentioned problems in the prior art, and its purpose is to provide a method for manufacturing a printed wiring board that has excellent interlayer adhesion and good halo resistance.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は内層材の回路銅表面にビスマス含有銅鍍金を施
し、ビスマスと銅との共折物を析出させた後、該内層材
表面にプリプレグ層を介し最外層に外層材を配設したr
Jt層体を積層成形し一体化することを特徴とするプリ
ント配線板の製造方法のため、内層材の回路表面の接着
性を向上させることができ、且つ表面に黒色酸化銅皮膜
がなりので耐ハロー性を向上させることができたもので
、以下本発明の詳細な説明する。
In the present invention, bismuth-containing copper plating is applied to the circuit copper surface of the inner layer material to precipitate a bismuth-copper eutectic product, and then an outer layer material is provided on the surface of the inner layer material through a prepreg layer as the outermost layer.
Since the printed wiring board manufacturing method is characterized by laminating and integrating Jt layers, it is possible to improve the adhesion of the circuit surface of the inner layer material, and the black copper oxide film on the surface makes it highly resistant. This invention was able to improve the halo property, and the present invention will be described in detail below.

本発明に用いる内層材としてはフェノール樹脂クレゾー
ル樹脂、エポキシ樹脂、不飽和ポリエステル樹脂、ポリ
イミド樹脂、ポリブタジェン樹脂、ポリフェニレンサル
ファイド樹脂、ポリブチレンテレフタレート樹脂、ポリ
エチレンテレフタレート樹脂、弗化樹脂等の樹脂と、ガ
ラス、アスベスト等の無機繊維やポリニスデル、ポリア
クリル、ポリアミド、ポリビニルアルコール等の有機合
成繊維や木綿等の天然繊維からなる織布、不織布、マー
Iト或は紙又はこれらの組合せ基材とからなる片面又は
両面銅張積層板に電気回路を形成したもので、回路銅表
面にビスマス含有銅鍍金を施し回路銅表面に微細凹凸状
のビスマスと銅との共折物を析出させてから、該内層材
表面に前記樹脂と基材とからなるプリプレグを所要枚数
介し、最外層に片面金属張積層板や金属箔からなる外層
材を配設した積層体を多段プレス法、マルチロール法、
ダブルベルト法、ドラム法、無圧連続加熱法等で積層成
形し一体化するものである。ビスマス含有鋼鍍金として
はビスマス酸水素カリウム、酒石酸ビスマス等のような
ビスマス化合物を含む銅鍍金を施すもので、ビスマスイ
オンをQ、0001〜0.03モル/l 含有するもの
が好まし込。
Inner layer materials used in the present invention include resins such as phenolic resin cresol resin, epoxy resin, unsaturated polyester resin, polyimide resin, polybutadiene resin, polyphenylene sulfide resin, polybutylene terephthalate resin, polyethylene terephthalate resin, and fluorinated resin, glass, Single-sided or non-woven fabric made of inorganic fibers such as asbestos, organic synthetic fibers such as polynisdel, polyacrylic, polyamide, polyvinyl alcohol, natural fibers such as cotton, paper, paper, or a combination thereof. An electric circuit is formed on a double-sided copper-clad laminate.The surface of the circuit copper is coated with bismuth-containing copper plating to precipitate a bismuth-copper symbiotic substance with fine irregularities on the surface of the circuit copper. A laminate in which a required number of prepregs made of the above-mentioned resin and base material are interposed and an outer layer material made of a single-sided metal-clad laminate or metal foil is provided as the outermost layer is prepared by a multi-stage pressing method, a multi-roll method,
They are laminated and integrated using a double belt method, drum method, pressureless continuous heating method, etc. The bismuth-containing steel plating includes copper plating containing a bismuth compound such as potassium bismuthate, bismuth tartrate, etc., and preferably contains bismuth ions in an amount of Q, 0001 to 0.03 mol/l.

以下本発明を実施例にもとづいて説明する。The present invention will be explained below based on examples.

実施例 厚み1mの両面銅張ガラス布エポキシ樹脂積層板の両面
に回路形成した内1−材をプラ・Iシング、脱脂してか
ら陰極とし、ビスマス酸水素カリウムをビスマスイオン
で0.Ol  モル/l含有する銅鍍金液で鍍金処理し
回路銅表面に微細凹凸状のビスマスと銅との共折物を析
出させた後、該内層材の上下面に厚さ0.1flのガラ
ス布エポキシ樹脂プリプレグを夫々2枚づつ介し最外層
に厚さ35ミクロンの銅箔を配設した積層体を40 K
9/d 、  165℃で60分間積層成形して4層回
路プリント配線板を得た。
Example A 1-meter-thick double-sided copper-clad glass cloth epoxy resin laminate with circuits formed on both sides was used as a cathode after being plasticized and degreased, and potassium hydrogen bismuthate was mixed with bismuth ions to form a cathode. After plating with a copper plating solution containing Ol mol/l to precipitate a bismuth-copper co-recipitate with fine irregularities on the surface of the circuit copper, a glass cloth with a thickness of 0.1 fl is placed on the upper and lower surfaces of the inner layer material. A laminate consisting of two epoxy resin prepregs each with a 35 micron thick copper foil on the outermost layer was heated at 40K.
9/d, laminate molding was performed at 165° C. for 60 minutes to obtain a four-layer circuit printed wiring board.

比較例 実施例と同じ回路形成した内層材をプラーlシングして
から90℃に加熱したアルカリ性亜塩素酸ナトリウム水
溶液に10分間浸漬して回路銅に酸化第2銅皮膜を形成
後、その上下面に厚さ0. i nのガラス布エポキシ
樹脂プリプレグを夫々2枚づつ介した以外は実施例と同
様に処理して4層回路プリント配線板を得た。
Comparative Example The inner layer material with the same circuit formed as in the example was plated and then immersed in an alkaline sodium chlorite aqueous solution heated to 90°C for 10 minutes to form a cupric oxide film on the circuit copper. thickness 0. A four-layer circuit printed wiring board was obtained in the same manner as in the example except that two sheets of each glass cloth epoxy resin prepreg were interposed.

実施例及び比較例のプリント配線板の性能は第1表のよ
うである。
The performances of the printed wiring boards of Examples and Comparative Examples are shown in Table 1.

求の範囲第1項に記載したプリント配線板の製造方法に
よって得られるプリント配線板は層間接着性及び耐へロ
ー性が向上する効果がある。
A printed wiring board obtained by the method for producing a printed wiring board described in Item 1 has the effect of improving interlayer adhesion and herrotation resistance.

Claims (1)

【特許請求の範囲】[Claims] (1)内層材の回路銅表面にビスマス含有銅鍍金を施し
、ビスマスと銅との共折物を析出させた後、該内層材表
面にプリプレグ層を介し最外層に外層材を配設した積層
体を積層成形し一体化することを特徴とするプリント配
線板の製造方法。
(1) Laminate in which bismuth-containing copper plating is applied to the circuit copper surface of the inner layer material to precipitate a bismuth-copper co-recipitate, and then the outer layer material is placed on the surface of the inner layer material through a prepreg layer and the outermost layer. A method for manufacturing a printed wiring board, characterized by laminating and integrating the body.
JP9834489A 1989-04-18 1989-04-18 Manufacture of printed wiring board Pending JPH02277289A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9834489A JPH02277289A (en) 1989-04-18 1989-04-18 Manufacture of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9834489A JPH02277289A (en) 1989-04-18 1989-04-18 Manufacture of printed wiring board

Publications (1)

Publication Number Publication Date
JPH02277289A true JPH02277289A (en) 1990-11-13

Family

ID=14217288

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9834489A Pending JPH02277289A (en) 1989-04-18 1989-04-18 Manufacture of printed wiring board

Country Status (1)

Country Link
JP (1) JPH02277289A (en)

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