JPH0419881Y2 - - Google Patents

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to a clamp circuit, and particularly to a feedback type clamp circuit.

(Prior Art) FIG. 1 is a diagram showing an example of a conventional feedback type clamp circuit.

In the figure, 1 is a level shift circuit to which an input signal is supplied, and its output terminal is connected to an output terminal 0 and a level comparison circuit 2. The level comparison circuit 2 compares the levels of the supplied input signal and the set reference voltage and outputs an error voltage, and its output terminal is connected to the level shift circuit 1, while the output terminal is connected to the clamp capacitor. Grounded via 3.

In a clamp circuit having such a configuration, an input signal is supplied to a level comparator circuit 2 via a level shift circuit 1, and the level comparator circuit 2 compares the supplied input signal with a set reference voltage (V ₂ ). After comparing the levels, an error voltage is output and supplied (feedback) to the level shift circuit 1.

At this time, for example, when handling a composite video signal as an input signal, it is necessary for the level comparison circuit 2 to perform the level comparison in the period of the pedestal part after the synchronization signal where there is no video signal component in the signal. Therefore, by supplying a clamp pulse to the level comparison circuit 2 at the timing of the period of the pedestal portion, the level comparison circuit 2 is configured to operate only during the pedestal period of the composite video signal.

The error voltage (current) output during this pedestal period charges and discharges the capacitor 3, converts the error voltage into a DC voltage, and further supplies (feedback) this DC voltage to the level shift circuit 1. , changes the level shift amount of the input signal to the level shift circuit 1, and operates so that the level of the output DC signal at the output terminal 0 becomes equal to the reference voltage.

FIG. 2a is a diagram showing a specific circuit of the level shift circuit 1 in the above-mentioned conventional clamp circuit.

In the same figure, transistor Q ₁ and resistor R ₁ constitute a current source circuit, and the transistor
The base of Q ₁ is supplied with an error voltage output from the level comparison circuit 2 in FIG. 1, and this error voltage changes the collector current of the transistor Q ₁ and changes the potential difference of the resistor R ₂ . Therefore,
_The input signal level (voltage) V ₁ supplied to the base _of the transistor _Q in the circuit of _{FIG .} (where I is the collector current of transistor Q ₁ constituting the current source circuit, V ₂ is the reference voltage, and V _BE is the base-emitter voltage of transistor Q).

Therefore, clamp operation is possible for the input signal level V ₁ only in the range of V ₁ ≧ V _BE + V ₂ (V ₂ ; reference voltage), and when the reference voltage V ₂ changes above and below the input DC level V ₁ . , or the input DC level V ₁ is the reference voltage V ₂
If the voltage changes above and below, V ₁ < V _BE + V ₂ may occur, and this circuit cannot be used.

Furthermore, in the level shift circuit shown in FIG. 2b, clamping operation is possible only when the input signal level V ₁ is within the range of V ₁ ≦V _BE + V ₂ , and clamping operation is not possible in other ranges. Figure 2a
Similar to the level shift circuit shown in , there is a limit to the clamp voltage.

Furthermore, as shown in Fig. 3, when a common emitter type variable gain amplifier is connected before the clamp circuit, changing the variable emitter resistor _R3 of the transistor _Q0 causes the collector voltage of the transistor _Q0 ( That is, the input voltage of the clamp circuit) V ₁
will change significantly. however,
In the case of this circuit, the clamp circuit can only operate within the range of V ₁ ≧V _BE +V ₂ and cannot operate within the range of V ₁ <V _BE +V ₂ .

As explained above, in conventional clamp circuits, there are considerable limitations on the variable range of the DC level (V ₁ ) and reference voltage (V ₂ ) settings of the input signal to the clamp circuit. When using the circuits shown in FIGS. 2a and 2b, there were problems such as deterioration of frequency characteristics due to the resistor _R2 shown in the same drawings.

(Purpose of the invention) The purpose of the invention is to solve the problems of the prior art described above, and to provide a clamp circuit that can set a wider clamp level than conventional clamp solutions and improves frequency characteristics. It's about doing.

(Means for Solving the Problems) In order to achieve the above object, the present invention provides a common emitter type amplifier having a first transistor whose base is supplied with an input signal, and a A level comparison in which the collector of the first transistor is connected to the input terminal, and the level of the signal from the collector of the first transistor is compared with a predetermined reference voltage during a period when a clamp pulse is supplied, and an error voltage is output. circuit and
A first current comprising a second transistor, the output terminal of the level comparison circuit is connected to the base of the second transistor, and the collector of the first transistor is connected to the collector of the second transistor. a source circuit, a clamping capacitor connected between the output terminal of the level comparison circuit and ground, and a third transistor having a polarity different from that of the second transistor; a second current source circuit, the collector of which is connected to the collector of the second transistor of the first current source circuit; The present invention provides a clamp circuit characterized in that the input signal is fed back to the collector of the first transistor, and the input signal is clamped to the predetermined reference voltage and outputted.

(Example) An example of the clamp circuit according to the present invention will be described below with reference to the drawings.

FIG. 4 is a diagram showing an embodiment of the clamp circuit according to the present invention. In the following figures, the same parts as those in the previous figures are given the same reference numerals, and the explanation thereof will be omitted.

In the figure, the input signal (V ₀ ) is supplied to the base of the NPN transistor Q ₃ , and this transistor Q ₃ and the resistor R ₄ together constitute _a common-emitter type amplifier. is connected to the base of NPN transistor _Q4 . Transistor _Q4 and current source I constitute an emitter follower circuit, and the transistor
The emitter of Q ₄ is connected to output terminal 0, while
Connected to the input terminal of the level comparison circuit 2. The output terminal of the level comparator circuit 2 is connected to the base of the NPN transistor _Q1 , and is grounded via a clamp capacitor 3.

Further, the transistor Q ₁ and the resistor R ₁ constitute a first current circuit. And transistor Q ₁
The collector of is a PNP transistor Q ₂ , a resistor R ₅ ,
It is connected to a second current source circuit composed of a resistor R ₆ , a resistor R ₇ and a diode D ₁ , and is also connected to the collector of the transistor Q ₃ . Since the NPN transistor Q ₁ and the PNP transistor Q ₂ configuring the first current source circuit and the second current source circuit have mutually different polarities, the current ( A current (I ₁ ) flows into the second current source circuit, and a current (I ₂ ) flows out from the second current source circuit.

The operation of one embodiment of the clamp circuit according to the present invention connected and configured as described above will be described below.

The input signal (V ₀ ) is applied to the base of transistor Q ₃ , and the input signal (V ₀ ) is applied to the base of transistor Q ₃ .
The signal V ₁ output from the collector of Q ₃ is output as an output signal (V ₂ ′) to the output terminal O via an emitter follower circuit composed of a transistor Q ₄ and a current source I, and at the same time, moreover,
This signal (V ₂ ') is supplied to the level comparison circuit 2, where the level is compared with the reference voltage V ₂ during the period when the clamp pulse is supplied, and the error voltage (current) charges and discharges the clamp capacitor 3. and outputs a DC error voltage _V3 .

Furthermore, this error voltage V ₃ is supplied to the base of transistor Q ₁ , and a collector current of I ₁ = (V ₃ − _{V BE1 )} /R ₁ flows through the collector of transistor Q 1 (first current source circuit). .
(However, V _BE1 is the base-emitter voltage of transistor Q _1. ) On the other hand, from the second current source circuit composed of transistor Q ₂ , resistor R ₅ , resistor R ₆ , resistor R ₇ and diode D ₁ A constant current I ₂ flows out from the collector of the transistor Q ₂ , and therefore the transistor
A current of I ₃ = I ₂ − _{I 1} flows into the collector of Q ₃ .
Furthermore, if the emitter current of transistor Q ₃ is I ₅ , then the current I ₄ flowing through load R ₄ is I ₄ = I ₅ − I ₃ = I ₅ − (I ₂ − I ₁ ), and the collector current of transistor Q ₃ is The voltage V ₁ becomes V ₁ =V _cc −R ₄ I ₄ =V _cc −R ₄ (I ₅ −I ₂ +I ₁ ). (However, V _cc is the power supply voltage.) Therefore, the output V ₂ ′ is V ₂ ′=V ₁ −V _BE4 =V _cc −V _BE4 −R ₄ ×(I ₅ −I ₂ +I ₁ ). (However, V _BE4 is the base-emitter voltage of transistor Q _4. ) Note that the error voltage that is the output of level comparison circuit 2
V ₃ is designed to increase as the output V ₂ ' increases. Therefore, at this time, the constant current I ₁ from the first current source circuit increases and the voltage V ₁ decreases. As a result, a negative feedback circuit is formed in which the output V ₂ ' becomes low.

Therefore, the output V ₂ ' converges to be equal to the reference voltage V ₂ , and the input V ₀ is finally clamped to the reference voltage V ₂ and output.

According to the clamp circuit of the embodiment in FIG. 4 as described above, the constant current I ₂ from the second current source circuit is
By setting _I2 = _I5 , the collector voltage _V1 of the transistor _Q3 becomes _V1 = _Vcc - _R4I1 , and the variable range of the voltage _V1 becomes _Vcc > _V1 > _{V0 .} Therefore, the clamp operation is possible for the output V ₂ ′ in the range of V _cc −V _BE4 <V ₂ ′<V ₀ −V _BE4 .

FIG. 5 is a diagram showing another embodiment of the clamp circuit according to the present invention.

Another embodiment of _the clamp circuit _shown in FIG _. 5 is an embodiment of the clamp circuit shown in FIG. A common-base transistor Q ₆ is additionally connected to form _a cascade _- connected emitter-grounded amplifier. This is designed to reduce the deterioration of frequency characteristics caused by _R4 .

Furthermore, for the current source circuit, the transistor
Q ₁ , transistor Q ₂ , transistor Q ₅ , diode D ₁ , resistor R ₅ and resistor R ₆ .
When a constant current I 1 flows through the collector of the transistor Q ₁ constituting the first _current source circuit in this current source circuit, a current I ₀ −I ₁ flows through the collector of the transistor Q ₅ , and therefore the second The constant current I ₂ flowing from the collector of the transistor Q ₂ constituting the current source circuit is I ₂ =(I ₀ −I ₁ )×(R ₆ /R ₅ ).

Here, by selecting the ratio of (R ₆ /R ₅ ) to be (I ₅ /I ₀ ), the current I ₂ flows with a maximum magnitude of I ₅ , and the clamp circuit shown in Fig. 4. It is possible to secure the same possible operating range of the clamp as in the first embodiment, and furthermore, it is possible to reduce the current.

In addition, in the clamp circuit according to the present invention,
As shown in the embodiments of FIGS. 4 and 5 above,
There is no need to provide a special emitter follower circuit consisting of the transistor _Q4 and the current source I, and the collector of the transistor _Q3 or the collector of the transistor _Q6 can be connected directly to the level comparator circuit 2.
It may also be connected to the input end of.

(Effects of the invention) Since the clamp circuit of the present invention has the above-described configuration, the variable range of the clamp level can be set wider than that of conventional clamp circuits, and there is no need to use a level shift circuit using a resistor. Therefore, it has features such as being able to improve frequency characteristics.

[Brief explanation of drawings]

Figure 1 is a diagram showing an example of a conventional feedback type clamp circuit, Figures 2a and 2b are diagrams showing specific circuits of a level shift circuit in the conventional clamp circuit, and Figure 3 is a clamp circuit. FIG. 4 is a diagram showing an embodiment of the clamp circuit according to the present invention, and FIG. 5 is a diagram showing another embodiment of the clamp circuit according to the present invention. FIG. 2...Level comparison circuit, 3...Clamp capacitor, _Q1 to _Q6 ...Transistor, _R1 , _R3 to
_R7 ...Resistor, _D1 ...Diode.

Claims (1)

[Claims for Utility Model Registration] (1) A common-emitter type amplifier having a first transistor whose base is supplied with an input signal, and a collector of the first transistor of the common-emitter type amplifier connected to the input terminal a level comparison circuit that is connected and compares the level of the signal from the collector of the first transistor with a predetermined reference voltage and outputs an error voltage during a period when a clamp pulse is supplied; and a second transistor; a first current source circuit in which the output end of the level comparison circuit is connected to the base of the second transistor, and the collector of the first transistor is connected to the collector of the second transistor; and the level comparison circuit a clamping capacitor connected between the output terminal of the circuit and ground; a third transistor having a polarity different from that of the second transistor; and a collector of the third transistor connected to the first current source circuit. a second current source circuit to which the collector of the second transistor is connected, and feeds back a constant current difference from the first and second current source circuits to the collector of the first transistor. . A clamp circuit, wherein the input signal is clamped to the predetermined reference voltage and outputted. (2) The clamp circuit according to claim 1, wherein the grounded emitter type amplifiers are cascade-connected.