JPH0564036A - Gamma offset adjustment circuit - Google Patents

Abstract

PURPOSE:To adequately execute gamma correction to an input signal by providing a buffer circuit with a control terminal capable of fixing gamma corrected output to a reference DC level determined in an IC at optional timing. CONSTITUTION:The buffer circuit 7 to be controlled by a control signal inputted to its control terminal 8 is connected in parallel with non-linear impedance 5. The input 9 of the buffer circuit 7 is connected to the junction point of the non-linear impedance 5 and reference power supply 6, and the output 10 of it is connected to an output terminal 4. Thus, the difference of output DC levels at the time when this circuit is operated and at the time when this circuit is not operated for certain fixed input level is read, and by adjusting this level difference so as to set it optionally, relation between a gamma correction curve and an input DC level can be determined adequately. Thus, the gamma correction can be executed to the input signal through very simple configuration.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gamma offset adjustment circuit for accurately setting an input reference DC level of a video signal with respect to a gamma correction curve of a gamma correction circuit in a video signal processing circuit of a liquid crystal TV, for example.

[0002]

2. Description of the Related Art FIG. 7 shows a conventional gamma correction circuit. This circuit is the non-inverting input of the current output amplifier 1 +
The input terminal 2 is connected to, the input reference power source 3 is connected to the inverting input −, the output terminal 4 is connected to the output, one end of the nonlinear impedance 5 is connected, and the other end of the nonlinear impedance 5 is connected to the reference power source 6. Connected.

FIG. 8 shows a specific structure of the nonlinear impedance 5 shown in FIG. To the output 4 side of the current output amplifier 1, the bases and collectors of the transistors Q9 and Q10 and one end of the resistor R5 are connected. Transistor Q9
The emitter of is connected to the positive electrode of the reference power source 11 via the resistor R6,
The emitter of the transistor Q10 is connected to the negative electrode of the reference power source 11 and the positive electrode of the reference power source 12 via the resistor R7. The other end of the resistor R5 is the negative electrode of the reference power source 12 and the reference electrode 6
Connect to.

The input / output characteristic of the circuit shown in FIG. 7 has a gamma correction curve shown in FIG. For example, if the pedestal level of the video signal of the input terminal 2 is to be taken as the origin of the gamma correction curve, the DC level of the input terminal 2 or the DC level of the input reference potential 3 is adjusted to obtain the desired DC level at the output terminal 4. It should be done.

However, when the above circuit is to be configured in an IC, in this method, the reference potential of the gamma correction curve varies from IC to IC and the output offset current of the current output amplifier 1 also exists, so that the gamma correction can be accurately performed at the output. Since the origin of the curve cannot be known, accurate adjustment cannot be performed. As one means of this adjustment, a method of performing pedestal clamp by input is considered. However, the pedestal level of the actual video signal may change according to the signal level due to DC transmission correction, etc.
It is not effective when such a signal is input.

[0006]

In the conventional gamma offset adjusting circuit described above, when the pedestal clamp circuit is not used for the input, the relative position of the input level with respect to the reference potential in the IC is not known, so the gamma correction curve is On the other hand, there is a problem that it is difficult to adjust the position to a desired position.

An object of the present invention is to provide a circuit capable of accurately adjusting an input DC level to a desired position with respect to a gamma correction curve without using an input pedestal clamp circuit.

[0008]

According to the present invention, a gamma-corrected output is provided with a buffer circuit having a control terminal capable of fixing the gamma-corrected output to a reference DC level defined in an IC at any timing.

[0009]

With the above-described means, the gamma correction is performed by reading the output DC level difference between when the circuit is operated and when it is not operated for a certain constant input level, and adjusting the level difference to be set arbitrarily. Input of curve D
The relationship with the C level can be appropriately determined.

[0010]

Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 shows an embodiment of the present invention. The same parts as those in FIG. 7 are designated by the same reference numerals, and different parts will be mainly described here.

In FIG. 1, this circuit is different from FIG. 7 in that a buffer circuit 7 controlled by a control signal input to a control terminal 8 is connected in parallel to the nonlinear impedance 5. The buffer circuit 7 connects the input 9 to the connection point between the non-linear impedance 5 and the reference power supply 6, and outputs 10
Is connected to the output terminal 4.

FIG. 2 specifically shows the buffer circuit 7 of FIG. That is, the transistors Q1, Q2,
Q3 and currant mirror CM1 form an operational amplifier. The base of the transistor Q1, which is the non-inverting input of the operational amplifier, is connected to the non-linear impedance 5 and the reference power supply 6 of FIG. 1 via the input 9 of the buffer circuit 7, and the output of the operational amplifier is connected to the output terminal 4. Transistors Q4, Q
5, the current source of the operational amplifier composed of the resistors R1 and R2 connects the bases of the transistors Q4 and Q5 which are current control inputs to the control terminal 8.

In this buffer circuit 7, when a collector current is made to flow through the transistors Q4 and Q5 under the control of the control terminal 8, the potential at the output terminal 4 is at the input 9 even if there is an output offset from the current output amplifier 1 shown in FIG. Is equal to the potential of.

In FIG. 1, for example, in FIG.
When a control pulse as shown in FIG. 3B which is turned on during the pedestal period is applied to the control terminal 8 when the video signal as shown in FIG. 3A is output, the output terminal 4 becomes as shown in FIG. Output waveform can be obtained. This means that the reference potential 6 of FIG. 1 is inserted in the output when the control pulse is ON. Therefore, if the amplitude of the reference potential inserted in the output terminal 5 is adjusted, the input signal DC level can be appropriately set for the gamma correction curve. By the way, if you want to adjust the pedestal of the input signal to the origin of the gamma correction curve, you can adjust it so that there is no step even when the reference potential is inserted.

In the above-mentioned embodiment, since the input conversion DC offset generated in the gamma correction circuit can be easily checked with a relatively simple structure, the input DC level can be set optimally.

FIG. 4 shows another embodiment of the present invention. In this embodiment, the input and output of the buffer circuit 7 in FIG. 1 are reversely connected, and the output 10 side of the buffer circuit 7 connected in parallel is connected to the connection point between the nonlinear impedance 5 and the reference power source 6 via the resistor R3. The input / output of the buffer circuit 7 is supplied to the differential amplifier 10, and the output 10 is connected to the output terminal 4.

In this embodiment, the output waveform of the current output amplifier 1 is as shown in FIG. 5 (a). When the buffer circuit 7 is activated by the control pulse from the control terminal 8, this output becomes as shown in FIG. 5 (b). As a result, the differential amplifier 10 subtracts the levels of the waveforms (a) and (b), and the final output is as shown in FIG. 5 (c). In this embodiment, since the input of the buffer circuit 7 is connected to the signal path, the effect of f characteristic deterioration due to this is negligible, which is extremely advantageous for widening the band.

The structure of the buffer circuit 7 of the embodiment described here is not particularly limited to that shown in FIG. For example,
An operational amplifier similar to that shown in FIG. 2 can be used as long as it can stop its function by turning off the current source, or a switch circuit as shown in FIG. In the circuit of FIG. 6, the bases of the transistors Q6 and Q7 are interconnected and also connected to the collector of the transistor Q8.
, The collector of Q7 is connected to the input 9, the emitter of the transistor Q6, the collector of Q7 is connected to the output terminal 4, the emitter of the transistor Q8 is grounded via the resistor R4, and the base is connected to the control terminal 8. ing.

In this circuit, when the collector current of the transistor Q8 is made to flow by the control of the control terminal 8, the transistors Q6 and Q7 enter into the saturation mode, and the impedance between the switch input 9 and the output terminal 4 becomes low to make them conductive. On the other hand, when the transistor Q8 is cut off, the switch input 9 and the output terminal 4 are open. The point is that, depending on the state of the control input, the DC level of the output terminal 4 should be equivalent to the DC level of the input 9 equivalently.

In this description, the reference level is set to an appropriate position with respect to the pedestal level of the video signal, but it does not matter if it is not the pedestal level.

[0021]

As described above, according to the gamma offset adjusting circuit of the present invention, the gamma correction can be appropriately applied to the input signal with a very simple structure.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram showing an embodiment of the present invention.

FIG. 2 is a circuit diagram specifically showing a main part of FIG.

FIG. 3 is a waveform diagram of a main part of FIG.

FIG. 4 is a circuit configuration diagram showing another embodiment of the present invention.

5 is a waveform diagram of a main part of FIG.

FIG. 6 is a circuit diagram specifically showing a main part of FIG.

FIG. 7 is a conventional circuit configuration diagram.

FIG. 8 is a circuit diagram specifically showing a main part of FIG.

9 is an input / output characteristic diagram of FIG.

[Explanation of symbols]

 1 ... Current output amplifier 2 ... Input terminal 4 ... Output terminal 5 ... Non-linear impedance 6 ... Reference power supply 7 ... Buffer circuit

Claims (2)

[Claims] 1. An input terminal for inputting a video signal, a current conversion circuit for converting the input signal input to the input terminal into a current, an output circuit connected to the output of the current conversion circuit, and an output reference potential, Non-linear impedance connected between the output reference potential and the output terminal, and means for connecting in parallel to the non-linear impedance, and setting the output level of the output terminal to the output reference potential only when a control signal is input. A gamma offset adjusting circuit characterized by being provided. 2. An input terminal for inputting a video signal, a current conversion circuit for converting an input signal input to the input terminal into a current, an output circuit connected to the output of the current conversion circuit, and an output reference potential. A non-linear impedance connected between the output reference potential and the output terminal, and a differential amplifier having a first input connected to the current conversion circuit and a second input connected from the output reference potential through a resistor. And between the output terminal connected to the output of the differential amplifier and the first and second inputs of the differential amplifier, the first input of the differential amplifier is connected only when a control signal is input. And a means for setting the level to the level of the second input of the differential amplifier.