JP2739953B2 - Video signal clamp device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clamp device used for DC reproduction of a video signal in a television receiver or the like.

2. Description of the Related Art A feedback clamp device for clamping and outputting a pedestal level of an input video signal to a reference level is the third type.
It is configured as shown in the figure. An input video signal 1 is input from a terminal 2 and applied to a control unit 4 through a capacitor 3. The control unit 4 controls the pedestal level of the DC level of the output video signal 6 according to the DC command voltage given to the control terminal 5. In the comparator 7, the output video signal 6 is compared with an externally supplied DC first reference voltage V1, and if they do not match, a current flows through the capacitor C1 to change the indicated voltage of the control terminal 5. The pedestal level of the output video signal 6 is controlled to match the level of the first reference voltage V1. The clamp pulse 8 is configured to make the switch means 9 conductive only during the pedestal period of the video signal. Even when the switch means 9 is non-conductive, the voltage held in the capacitor C1 is given to the control unit 4 as an instruction voltage. Have been.

In such a clamping device, the first reference voltage V1 is compared with the output video signal 6 by the comparator 7 and the switch means 9 and the like, and the holding voltage of the capacitor C1 is corrected so that the error voltage approaches zero. Feedback section 10
Is conventionally configured as shown in FIG.

Output video signal 6 is applied to the base of transistor Q1. The first reference voltage V1 is connected to the base of the transistor Q2.
Is given. The transistors Q1 and Q2 are differential amplifiers forming the comparator 7. The transistor Q3 and the resistor R1 are current sources, and a clamp pulse 8 is applied to the base of the transistor Q3. When a collector current flows through the transistor Q1, the capacitor C1 is charged through the current mirror circuit 11 formed by the transistors Q4 and Q5.

In such a conventional configuration, since the signal is supplied to the base of the transistor Q1 even when the transistor Q3 is non-conductive, the floating capacitor C0 is also supplied from the emitter of the transistor Q1 during this period. (Including the collector capacitance of the transistor Q3 and the emitter capacitance of the transistor Q2.) There is a problem that the charging current flows into the capacitor C1 through the current mirror circuit 11 and the voltage to be held fluctuates. I was

An object of the present invention is to provide a clamp device that prevents charging / discharging current to a capacitor during a voltage holding period of the capacitor regardless of a change in a video signal, stabilizes an instruction voltage applied to a control unit, and obtains a stable clamping characteristic. With the goal.

Means for Solving the Problems The clamp device of the present invention is a control unit that performs DC reproduction by clamping an input video signal to a level according to an instruction voltage,
A capacitor for holding the command voltage; and a feedback unit for comparing the first reference voltage with the output video signal of the control unit and correcting the holding voltage of the capacitor so that the error voltage approaches zero. Applying the output video signal to the base of a first transistor of the first and second transistors forming the differential amplifier, applying the first reference voltage to the base of a second transistor, 1,
Connecting a current source to the emitter of the second transistor;
The collector of the transistor is connected to the input of the current mirror circuit, the collector of the second transistor is connected to the output of the current mirror circuit and the capacitor,
The feedback unit is turned on by the switch means during the pedestal period of the video signal so that a current corresponding to the error voltage of the first reference voltage and the output video signal flows to the collector of the second transistor. And the collector of the third transistor is connected between the collector of the first transistor and the input of the current mirror circuit.
An emitter is interposed in series, and a second reference voltage is applied to a base of the third transistor.

According to this configuration, during the period in which the current source is conductive, the third transistor conducts when the base current flows at the second reference voltage, and the current flows from the current mirror circuit to the first transistor via the third transistor. Current flows to the second transistor. While the current source is off, the third transistor is turned off and no current flows to the first transistor. Therefore, during this non-conduction period, the first transistor takes advantage of the fact that the emitter resistance of the third transistor is large.
Since the current of the transistor is turned off, no charge / discharge current flows through the capacitor.

Embodiment An embodiment of the present invention will be described below with reference to FIGS. 1 and 2. Note that components having the same functions as those in FIG. 4 showing the conventional example are denoted by the same reference numerals and described.

FIG. 1 shows a clamping device according to the present invention, which differs from the conventional device shown in FIG. 3 only in the following points. That is,
A collector and an emitter of the transistor Q6 as the third transistor are interposed in series between the transistor Q1 as the first transistor and the input IN of the current mirror circuit 11, and the base of the transistor Q6 is connected to the second transistor. The second reference voltage V2 is higher than the first reference voltage V1 applied to the base of the transistor Q2 by the dynamic range (about 100 mV) of the transistors Q1 and Q2. OUT represents the output of the current mirror circuit 11.

First, consider the case where there is no transistor Q6. Assuming that the emitter voltage of the transistor Q1 changes from Va to Vb as shown in FIG. 2A by the base signal of the transistor Q1 while the transistor Q3 is non-conductive, the stray capacitance from the emitter of the transistor Q1 The charge Q charged to C0 is: Q = C0 · (Vb−Va) This charge passes through the current mirror circuit 11 and is
Charge C1. Due to this charge, the voltage of the capacitor C1 causes an error V.

V = Q / C1 = C0 · (Vb−Va) / C1 Next, consider the case where the transistor Q6 is provided as shown in the present invention. The control section 4 operates such that the base of the transistor Q1 has a pedestal period of the input video signal 1 equal to the first reference voltage V1. When the emitter potential of the transistor Q1 rises by about 100 mV and becomes equal to the emitter potential of the transistor Q6, the transistor Q6 is turned off.
Therefore, the current flowing from the emitter of the transistor Q1 to the stray capacitance C0 is blocked by the transistor Q6 and is not transmitted to the input of the current mirror circuit 11. Therefore, charging and discharging of the capacitor C1 during the period when the transistor Q3 is non-conductive can be prevented, and the pedestal level of the output video signal 6 can always be stably clamped at the first reference voltage V1.

As described above, according to the present invention, the collector and the emitter of the third transistor are interposed in series between the collector of the first transistor and the input of the current mirror circuit in the feedback section. Since the second reference voltage higher than the first reference voltage is applied to the base of the third transistor, the current charged in the stray capacitance does not flow through the voltage holding capacitor, thereby improving the video signal clamping characteristics. it can. In addition, the third transistor can be easily integrated with other transistors.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of a clamp device of the present invention, FIG. 2 is a waveform diagram of a video signal and a clamp pulse, FIG. 3 is a general block diagram of the clamp device, and FIG. It is a block diagram of an apparatus. 1 ... input video signal, 4 ... control unit, 5 ... control terminal, 6 ... output video signal, 8 ... clamp pulse, 9
... Switch means, 10 feedback section, 11 current mirror circuit, V1, V2, first and second reference voltages, Q1,
Q2: Transistor [first and second transistors], Q6 ...
... Transistor [third transistor], C1 ... Capacitor.

Claims (1)

(57) [Claims] 1. A control unit for performing DC reproduction by clamping an input video signal to a level corresponding to an instruction voltage, a capacitor for holding the instruction voltage, and comparing a first reference voltage with an output video signal of the control unit. And a feedback section for correcting the holding voltage of the capacitor so that the error voltage approaches zero, and is connected to the base of the first transistor of the first and second transistors forming the differential amplifier. Applying the output video signal, applying the first reference voltage to the base of a second transistor, connecting a current source to the emitters of the first and second transistors, and connecting the collector of the first transistor to a current mirror Connect to the input of the circuit and
The collector of the transistor is connected to the output of the current mirror circuit and the capacitor, and the current source is turned on by a switch means during the pedestal period of the video signal, and the first reference voltage and the first reference voltage are applied to the collector of the second transistor. The feedback section is configured to flow a current corresponding to an error voltage of an output video signal, and a collector-emitter of a third transistor is connected in series between a collector of the first transistor and an input of a current mirror circuit. A video signal clamping device interposed therebetween and applying a second reference voltage to the base of the third transistor.