JPH0412849B2 - - Google Patents
Info
- Publication number
- JPH0412849B2 JPH0412849B2 JP60104925A JP10492585A JPH0412849B2 JP H0412849 B2 JPH0412849 B2 JP H0412849B2 JP 60104925 A JP60104925 A JP 60104925A JP 10492585 A JP10492585 A JP 10492585A JP H0412849 B2 JPH0412849 B2 JP H0412849B2
- Authority
- JP
- Japan
- Prior art keywords
- code
- transistors
- signal
- conductors
- group
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
- G06F7/764—Masking
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Logic Circuits (AREA)
- Analogue/Digital Conversion (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/615,266 US4625130A (en) | 1984-05-30 | 1984-05-30 | Mask signal generator |
| US615266 | 2000-07-13 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6151237A JPS6151237A (ja) | 1986-03-13 |
| JPH0412849B2 true JPH0412849B2 (cg-RX-API-DMAC7.html) | 1992-03-05 |
Family
ID=24464690
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60104925A Granted JPS6151237A (ja) | 1984-05-30 | 1985-05-16 | 信号発生器 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4625130A (cg-RX-API-DMAC7.html) |
| EP (1) | EP0166523B1 (cg-RX-API-DMAC7.html) |
| JP (1) | JPS6151237A (cg-RX-API-DMAC7.html) |
| CA (1) | CA1260559A (cg-RX-API-DMAC7.html) |
| DE (1) | DE3587401T2 (cg-RX-API-DMAC7.html) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62283488A (ja) * | 1985-12-27 | 1987-12-09 | Nec Corp | デコ−ダ回路 |
| JPS63294124A (ja) * | 1987-05-27 | 1988-11-30 | Toshiba Corp | プログラマブル・ロジック・アレ− |
| US6693453B1 (en) * | 2002-04-23 | 2004-02-17 | Macronix International Co., Ltd. | Re-programmable logic array |
| KR101157224B1 (ko) * | 2004-05-03 | 2012-06-15 | 엘지디스플레이 주식회사 | 액정표시장치 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3157779A (en) * | 1960-06-28 | 1964-11-17 | Ibm | Core matrix calculator |
| DE2233164C3 (de) * | 1972-07-06 | 1978-03-09 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Schaltungsanordnung zur Übertragung von aufeinanderfolgenden Bitstellen zwischen zwei Registern |
| US4031379A (en) * | 1976-02-23 | 1977-06-21 | Intel Corporation | Propagation line adder and method for binary addition |
| FR2440657A1 (fr) * | 1978-10-31 | 1980-05-30 | Ibm France | Perfectionnement aux reseaux logiques programmables a fonctions multiples |
| US4430584A (en) * | 1980-05-29 | 1984-02-07 | Texas Instruments Incorporated | Modular input/output system |
| DE3120163A1 (de) * | 1981-05-21 | 1982-12-09 | Deutsche Itt Industries Gmbh, 7800 Freiburg | Cmos-auswahlschaltung |
| US4541067A (en) * | 1982-05-10 | 1985-09-10 | American Microsystems, Inc. | Combinational logic structure using PASS transistors |
-
1984
- 1984-05-30 US US06/615,266 patent/US4625130A/en not_active Expired - Lifetime
-
1985
- 1985-05-16 JP JP60104925A patent/JPS6151237A/ja active Granted
- 1985-05-21 EP EP85303557A patent/EP0166523B1/en not_active Expired - Lifetime
- 1985-05-21 DE DE8585303557T patent/DE3587401T2/de not_active Expired - Fee Related
- 1985-05-29 CA CA000482740A patent/CA1260559A/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6151237A (ja) | 1986-03-13 |
| US4625130A (en) | 1986-11-25 |
| DE3587401T2 (de) | 1993-09-23 |
| DE3587401D1 (de) | 1993-07-22 |
| EP0166523A3 (en) | 1989-09-06 |
| CA1260559A (en) | 1989-09-26 |
| EP0166523A2 (en) | 1986-01-02 |
| EP0166523B1 (en) | 1993-06-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2812262B2 (ja) | 連想記憶装置 | |
| US4785421A (en) | Normalizing circuit | |
| US4709226A (en) | Circuitry for complementing binary numbers | |
| US4845655A (en) | Carry circuit suitable for a high-speed arithmetic operation | |
| JPH07105726B2 (ja) | プライオリティ・エンコーダ | |
| US3970833A (en) | High-speed adder | |
| JPH0337715A (ja) | ビット順反転回路 | |
| KR970012778A (ko) | 반도체기억장치 | |
| JPH0412849B2 (cg-RX-API-DMAC7.html) | ||
| US4764749A (en) | CMOS encoder circuit | |
| JPH11239054A (ja) | コンパレータ | |
| EP0354534B1 (en) | Semiconductor logic circuit | |
| US5742187A (en) | Decoder with reduced architecture | |
| US5373291A (en) | Decoder circuits | |
| KR0119785Y1 (ko) | 2의 보수발생회로 | |
| JP3285910B2 (ja) | ビットサーチ回路 | |
| JP2922963B2 (ja) | シーケンスコントローラ | |
| KR100207651B1 (ko) | 메모리 엑세스 장치 | |
| KR100230399B1 (ko) | 입력값 특성을 이용한 덧셈기 | |
| JP3393966B2 (ja) | ダイナミック型プライオリティ・エンコーダ | |
| CA1091809A (en) | Combinatorial logic circuit | |
| JPH026683Y2 (cg-RX-API-DMAC7.html) | ||
| KR950004223B1 (ko) | 2진 보수 발생기 | |
| US5724302A (en) | High density decoder | |
| GB2251968A (en) | Decoder circuits |