JPH0410746B2 - - Google Patents
Info
- Publication number
- JPH0410746B2 JPH0410746B2 JP60033817A JP3381785A JPH0410746B2 JP H0410746 B2 JPH0410746 B2 JP H0410746B2 JP 60033817 A JP60033817 A JP 60033817A JP 3381785 A JP3381785 A JP 3381785A JP H0410746 B2 JPH0410746 B2 JP H0410746B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- film
- polycrystalline silicon
- conductivity type
- silicon film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/854—Complementary IGFETs, e.g. CMOS comprising arrangements for preventing bipolar actions between the different IGFET regions, e.g. arrangements for latchup prevention
Landscapes
- Element Separation (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60033817A JPS61194767A (ja) | 1985-02-22 | 1985-02-22 | 相補型mos半導体装置の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60033817A JPS61194767A (ja) | 1985-02-22 | 1985-02-22 | 相補型mos半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61194767A JPS61194767A (ja) | 1986-08-29 |
JPH0410746B2 true JPH0410746B2 (enrdf_load_stackoverflow) | 1992-02-26 |
Family
ID=12397029
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60033817A Granted JPS61194767A (ja) | 1985-02-22 | 1985-02-22 | 相補型mos半導体装置の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61194767A (enrdf_load_stackoverflow) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07112006B2 (ja) * | 1988-05-02 | 1995-11-29 | 日本電気株式会社 | 半導体装置の製造方法 |
DE3900769A1 (de) * | 1989-01-12 | 1990-08-09 | Fraunhofer Ges Forschung | Integrierte schaltung mit zumindest einem n-kanal-fet und zumindest einem p-kanal-fet |
JPH0779127B2 (ja) * | 1989-12-27 | 1995-08-23 | 株式会社半導体プロセス研究所 | 半導体装置の製造方法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57113248A (en) * | 1980-12-29 | 1982-07-14 | Fujitsu Ltd | Manufacture of semiconductor device |
JPS5864044A (ja) * | 1981-10-14 | 1983-04-16 | Toshiba Corp | 半導体装置の製造方法 |
JPS58197841A (ja) * | 1982-05-14 | 1983-11-17 | Toshiba Corp | 半導体装置及びその製造方法 |
JPS58220443A (ja) * | 1982-06-16 | 1983-12-22 | Toshiba Corp | 半導体装置の製造方法 |
JPS5984572A (ja) * | 1982-11-08 | 1984-05-16 | Nec Corp | 半導体装置 |
-
1985
- 1985-02-22 JP JP60033817A patent/JPS61194767A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS61194767A (ja) | 1986-08-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100227766B1 (ko) | 반도체 장치 및 그 제조 방법 | |
US5298450A (en) | Process for simultaneously fabricating isolation structures for bipolar and CMOS circuits | |
US5084402A (en) | Method of fabricating a semiconductor substrate, and semiconductor device, having thick oxide films and groove isolation | |
EP0055521B1 (en) | Method of filling a groove in a semiconductor substrate | |
EP0091507B1 (en) | Method of manufacturing a semi-conductor device comprising dielectric isolation regions | |
US6844223B2 (en) | Semiconductor device having silicon on insulator and fabricating method therefor | |
JPS6348180B2 (enrdf_load_stackoverflow) | ||
EP0884774A2 (en) | Method for manufacturing a semiconductor device with an isolation trench | |
US4609934A (en) | Semiconductor device having grooves of different depths for improved device isolation | |
US5065217A (en) | Process for simultaneously fabricating isolation structures for bipolar and CMOS circuits | |
JPH07106412A (ja) | 半導体装置およびその製造方法 | |
JP3173430B2 (ja) | 半導体装置の製造方法 | |
US6872632B2 (en) | Method of fabricating semiconductor device | |
JPH0410746B2 (enrdf_load_stackoverflow) | ||
JP3719854B2 (ja) | 半導体装置の製造方法 | |
JPS61289642A (ja) | 半導体集積回路装置の製造方法 | |
EP0236811B1 (en) | Method of manufacturing semiconductor device | |
KR100204418B1 (ko) | 반도체 소자 분리방법 | |
JPS62213258A (ja) | 半導体装置の製造方法 | |
JPS6025247A (ja) | 半導体装置の製造方法 | |
JP2004260151A (ja) | 半導体装置の製造方法 | |
JPS62120040A (ja) | 半導体装置の製造方法 | |
KR970009273B1 (ko) | 반도체소자의 필드산화막 제조방법 | |
JPS60244036A (ja) | 半導体装置とその製造方法 | |
JP5588162B2 (ja) | 半導体装置の製造方法 |