JPH0397740U - - Google Patents
Info
- Publication number
- JPH0397740U JPH0397740U JP447590U JP447590U JPH0397740U JP H0397740 U JPH0397740 U JP H0397740U JP 447590 U JP447590 U JP 447590U JP 447590 U JP447590 U JP 447590U JP H0397740 U JPH0397740 U JP H0397740U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- dsp
- sampling
- supplied
- interrupt
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005070 sampling Methods 0.000 claims 3
- 102100031577 High affinity copper uptake protein 1 Human genes 0.000 description 1
- 101710196315 High affinity copper uptake protein 1 Proteins 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
Description
第１図は考案のタイマ割り込み回路装置におけ
る構成の一実施例を示す論理回路図、第２図は第
１図に示す回路装置の動作を示すタイムチヤート
である。
１……ＣＴＲ１信号入力端子、２……ＣＴＲ０
信号入力端子、１１……出力ピン、１２……割込
レジスタ、１３……マスクレジスタ。
FIG. 1 is a logic circuit diagram showing one embodiment of the configuration of the timer interrupt circuit device of the invention, and FIG. 2 is a time chart showing the operation of the circuit device shown in FIG. 1. 1...CTR1 signal input terminal, 2...CTR0
Signal input terminal, 11...output pin, 12...interrupt register, 13...mask register.
Claims (1)
御するモード信号の内所定のモード信号とが供給
された場合、上記ＥＱ信号に同期してサンプリン
グタイミング信号を送出するサンプリングタイミ
ング信号発生部と、 上記ＥＱ信号が供給され上記サンプリングタイ
ミング信号とは別個に割込信号を発生する割込信
号発生部と、を備えたことを特徴とするＤＳＰの
タイマ割込回路装置。[Claims for Utility Model Registration] Sampling that sends out a sampling timing signal in synchronization with the EQ signal when an EQ signal with a predetermined period and a predetermined mode signal among the mode signals that control the operation mode of the DSP are supplied. A timer interrupt circuit device for a DSP, comprising: a timing signal generating section; and an interrupt signal generating section to which the EQ signal is supplied and generates an interrupt signal separately from the sampling timing signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP447590U JPH0397740U (en) | 1990-01-22 | 1990-01-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP447590U JPH0397740U (en) | 1990-01-22 | 1990-01-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0397740U true JPH0397740U (en) | 1991-10-08 |
Family
ID=31508218
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP447590U Pending JPH0397740U (en) | 1990-01-22 | 1990-01-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0397740U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5317122B2 (en) * | 1974-06-26 | 1978-06-06 | ||
| JPS5992621A (en) * | 1982-11-19 | 1984-05-28 | Ricoh Co Ltd | Sampling method of analog signal |
-
1990
- 1990-01-22 JP JP447590U patent/JPH0397740U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5317122B2 (en) * | 1974-06-26 | 1978-06-06 | ||
| JPS5992621A (en) * | 1982-11-19 | 1984-05-28 | Ricoh Co Ltd | Sampling method of analog signal |
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