JPH02148474U - - Google Patents
Info
- Publication number
- JPH02148474U JPH02148474U JP5744889U JP5744889U JPH02148474U JP H02148474 U JPH02148474 U JP H02148474U JP 5744889 U JP5744889 U JP 5744889U JP 5744889 U JP5744889 U JP 5744889U JP H02148474 U JPH02148474 U JP H02148474U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- output signal
- arming
- flip
- flop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 5
- 230000003111 delayed effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Manipulation Of Pulses (AREA)
Description
第１図は本考案の一実施例を示す回路図、第２
図および第３図は第１図の動作を示すタイミング
チヤート、第４図および第５図はそれぞれ従来の
回路例図である。
１……コンパレータ、２……アーミング信号発
生回路、３，４，７，８……フリツプフロツプ、
６……クロツク発生器、９……オアゲート。
Figure 1 is a circuit diagram showing one embodiment of the present invention, Figure 2 is a circuit diagram showing an embodiment of the present invention.
3 and 3 are timing charts showing the operation of FIG. 1, and FIGS. 4 and 5 are diagrams showing examples of conventional circuits, respectively. 1...Comparator, 2...Arming signal generation circuit, 3, 4, 7, 8...Flip-flop,
6...Clock generator, 9...Or gate.
Claims (1)
ロツク発生器が入力され、アーミング信号発生回
路の出力信号をクロツク周期に応じて遅延させる
フリツプフロツプで構成されたアーミング信号遅
延回路と、 入力信号のレベルが設定値を超えることにより
トリガ信号を出力するコンパレータと、 このコンパレータの出力信号がクロツク端子に
入力され、前記アーミング信号発生回路の出力信
号がデータ端子に入力される第１のフリツプフロ
ツプと、 この第１のフリツプフロツプ出力信号と前記ア
ーミング信号遅延回路の出力信号が入力されるオ
アゲートと、 このオアゲートの出力信号がクロツク端子に入
力され、データ端子に前記コンパレータの出力信
号が入力される第２のフリツプフロツプ、 を設けたことを特徴とするトリガ回路。[Claims for Utility Model Registration] An arming signal generation circuit, a clock generator, the output signals of these arming signal generation circuits and the clock generator are input, and the output signal of the arming signal generation circuit is delayed according to the clock cycle. an arming signal delay circuit composed of a flip-flop; a comparator that outputs a trigger signal when the level of the input signal exceeds a set value; the output signal of this comparator is input to a clock terminal, and the output signal of the arming signal generation circuit is a first flip-flop whose data terminal is inputted; an OR gate where the first flip-flop output signal and the output signal of the arming signal delay circuit are inputted; an output signal of the OR gate is inputted to a clock terminal, and a data terminal A trigger circuit comprising: a second flip-flop to which the output signal of the comparator is input.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989057448U JPH0648431Y2 (en) | 1989-05-18 | 1989-05-18 | Trigger circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989057448U JPH0648431Y2 (en) | 1989-05-18 | 1989-05-18 | Trigger circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02148474U true JPH02148474U (en) | 1990-12-17 |
| JPH0648431Y2 JPH0648431Y2 (en) | 1994-12-12 |
Family
ID=31582161
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989057448U Expired - Lifetime JPH0648431Y2 (en) | 1989-05-18 | 1989-05-18 | Trigger circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0648431Y2 (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6145974A (en) * | 1984-08-10 | 1986-03-06 | Iwatsu Electric Co Ltd | Sweep signal generating circuit |
| JPS6358170A (en) * | 1986-08-28 | 1988-03-12 | Iwatsu Electric Co Ltd | Synchronizing method and circuit therefor |
| JPH0196565A (en) * | 1987-10-08 | 1989-04-14 | Iwatsu Electric Co Ltd | Method and circuit for synchronization |
-
1989
- 1989-05-18 JP JP1989057448U patent/JPH0648431Y2/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6145974A (en) * | 1984-08-10 | 1986-03-06 | Iwatsu Electric Co Ltd | Sweep signal generating circuit |
| JPS6358170A (en) * | 1986-08-28 | 1988-03-12 | Iwatsu Electric Co Ltd | Synchronizing method and circuit therefor |
| JPH0196565A (en) * | 1987-10-08 | 1989-04-14 | Iwatsu Electric Co Ltd | Method and circuit for synchronization |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0648431Y2 (en) | 1994-12-12 |
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