JPS61136635U - - Google Patents
Info
- Publication number
- JPS61136635U JPS61136635U JP1804985U JP1804985U JPS61136635U JP S61136635 U JPS61136635 U JP S61136635U JP 1804985 U JP1804985 U JP 1804985U JP 1804985 U JP1804985 U JP 1804985U JP S61136635 U JPS61136635 U JP S61136635U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- rising edge
- clock pulse
- sawtooth wave
- reference signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 3
- 238000007493 shaping process Methods 0.000 claims description 3
- 230000000630 rising effect Effects 0.000 claims 3
- 238000003708 edge detection Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
Landscapes
- Pulse Circuits (AREA)
Description
第１図は本考案によるクロツクパルス整形回路
の一実施例のブロツク図、第２図は第１図の各部
の信号を示すタイムチヤート、第３図は従来のク
ロツクパルス整形回路におけるデユーテイサイク
ル５０％のクロツクパルスを得る方法を示す図で
ある。
１：立上り検出回路、２：積分回路、３：比較
回路、３ａ：比較部、３ｂ：レベル検出部、３ｃ
：帰還部。
Fig. 1 is a block diagram of an embodiment of the clock pulse shaping circuit according to the present invention, Fig. 2 is a time chart showing signals of each part in Fig. 1, and Fig. 3 is a duty cycle of 50% in a conventional clock pulse shaping circuit. FIG. 1: Rise detection circuit, 2: Integration circuit, 3: Comparison circuit, 3a: Comparison section, 3b: Level detection section, 3c
: Return part.
Claims (1)
回路と、 前記立上り検出回路の検出パルスにより鋸歯状
波信号を発生する積分回路と、 出力信号のレベルにより基準信号に帰還をかけ
、前記鋸歯状波信号と前記基準信号を比較する比
較回路を備えてなるクロツクパルス整形回路。[Claims for Utility Model Registration] A rising edge detection circuit that detects the rising edge of a clock pulse; an integrating circuit that generates a sawtooth wave signal based on the detection pulse of the rising edge detection circuit; and a feedback circuit that applies feedback to a reference signal depending on the level of the output signal; A clock pulse shaping circuit comprising a comparison circuit for comparing the sawtooth wave signal and the reference signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1804985U JPS61136635U (en) | 1985-02-12 | 1985-02-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1804985U JPS61136635U (en) | 1985-02-12 | 1985-02-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61136635U true JPS61136635U (en) | 1986-08-25 |
Family
ID=30506323
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1804985U Pending JPS61136635U (en) | 1985-02-12 | 1985-02-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61136635U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02262714A (en) * | 1988-12-28 | 1990-10-25 | Toshiba Corp | Duty control circuit device |
-
1985
- 1985-02-12 JP JP1804985U patent/JPS61136635U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02262714A (en) * | 1988-12-28 | 1990-10-25 | Toshiba Corp | Duty control circuit device |