JPH02840U - - Google Patents
Info
- Publication number
- JPH02840U JPH02840U JP7724188U JP7724188U JPH02840U JP H02840 U JPH02840 U JP H02840U JP 7724188 U JP7724188 U JP 7724188U JP 7724188 U JP7724188 U JP 7724188U JP H02840 U JPH02840 U JP H02840U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- reset
- timing
- opposite direction
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000000630 rising effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Pulse Circuits (AREA)
- Analogue/Digital Conversion (AREA)
Description
第１図は本考案によるＰＷＭ信号復号回路の一
実施例を示す図、第２図及び第３図は各々クロツ
クＣＫの周期が変わつた場合における第１図の各
部波形を示すタイミングチヤート、第４図は本考
案の他の実施例を示す図、第５図は第４図の各部
波形を示すタイミングチヤート、第６図は従来の
構成を示す図、第７図及び第８図は各々クロツク
ＣＫの周期が異なる場合における第６図の各部波
形を示すタイミングチヤートである。
１…リセツト回路、２…カウンタ回路、３…サ
ンプルパルス発生回路、４…サンプルホールド回
路。
FIG. 1 is a diagram showing an embodiment of the PWM signal decoding circuit according to the present invention, FIGS. 2 and 3 are timing charts showing waveforms of various parts of FIG. 1 when the period of the clock CK changes, and FIG. 5 is a timing chart showing waveforms of each part of FIG. 4, FIG. 6 is a diagram showing a conventional configuration, and FIGS. 7 and 8 are clock CK diagrams. 7 is a timing chart showing waveforms of various parts in FIG. 6 when the periods of the signals are different. 1...Reset circuit, 2...Counter circuit, 3...Sample pulse generation circuit, 4...Sample hold circuit.
Claims (1)
ツト信号を出力するリセツト回路と、 前記リセツト信号によつてクロツクに基づくカ
ウント動作を開始すると共に、リセツト信号出力
後のＰＷＭ信号の反転により逆方向にカウント動
作するカウンタ回路とを備え、 前記リセツト信号のタイミングと、前記カウン
タ回路のカウント値が前記逆方向のカウント動作
時において所定値となるタイミングとにより復号
信号を得るように構成した、 ことを特徴とするＰＷＭ信号復号回路。[Claims for Utility Model Registration] A reset circuit that detects the rising or falling edge of a PWM signal and outputs a reset signal; A counter circuit that performs a counting operation in the opposite direction by inversion of a signal is provided, and a decoded signal is obtained based on the timing of the reset signal and the timing at which the count value of the counter circuit reaches a predetermined value during the counting operation in the opposite direction. A PWM signal decoding circuit configured as follows.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7724188U JPH02840U (en) | 1988-06-13 | 1988-06-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7724188U JPH02840U (en) | 1988-06-13 | 1988-06-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02840U true JPH02840U (en) | 1990-01-05 |
Family
ID=31302238
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7724188U Pending JPH02840U (en) | 1988-06-13 | 1988-06-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02840U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02151119A (en) * | 1988-12-02 | 1990-06-11 | Yaskawa Electric Mfg Co Ltd | Pulse width modulation signal demodulation circuit |
| JPH03126818U (en) * | 1990-04-02 | 1991-12-20 | ||
| JPH0767191A (en) * | 1991-05-24 | 1995-03-10 | Rockwell Internatl Corp | Exchange interface system and communication method of synchronous digital data communication network |
-
1988
- 1988-06-13 JP JP7724188U patent/JPH02840U/ja active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02151119A (en) * | 1988-12-02 | 1990-06-11 | Yaskawa Electric Mfg Co Ltd | Pulse width modulation signal demodulation circuit |
| JPH03126818U (en) * | 1990-04-02 | 1991-12-20 | ||
| JPH0767191A (en) * | 1991-05-24 | 1995-03-10 | Rockwell Internatl Corp | Exchange interface system and communication method of synchronous digital data communication network |
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