JPS62106361U - - Google Patents
Info
- Publication number
- JPS62106361U JPS62106361U JP19887685U JP19887685U JPS62106361U JP S62106361 U JPS62106361 U JP S62106361U JP 19887685 U JP19887685 U JP 19887685U JP 19887685 U JP19887685 U JP 19887685U JP S62106361 U JPS62106361 U JP S62106361U
- Authority
- JP
- Japan
- Prior art keywords
- edge
- signal
- circuit
- detection circuit
- window
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 claims description 5
- 238000004458 analytical method Methods 0.000 claims description 4
- 238000003708 edge detection Methods 0.000 claims description 2
- 230000000630 rising effect Effects 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 4
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
Landscapes
- Tests Of Electronic Circuits (AREA)
- Manipulation Of Pulses (AREA)
- Optical Recording Or Reproduction (AREA)
Description
第1図は本考案の波形解析回路の一実施例を示
す構成図、第2図は第1図の波形解析回路の動作
を説明する波形図、第3図は従来の波形解析回路
における動作の一例を示す波形図である。
1…エツジ検出回路、2…ウインドウ信号発生
回路、3,4…エツジ信号検出回路、5…オア回
路。
Fig. 1 is a block diagram showing an embodiment of the waveform analysis circuit of the present invention, Fig. 2 is a waveform diagram explaining the operation of the waveform analysis circuit of Fig. 1, and Fig. 3 is a waveform diagram illustrating the operation of the conventional waveform analysis circuit. FIG. 3 is a waveform diagram showing an example. DESCRIPTION OF SYMBOLS 1... Edge detection circuit, 2... Window signal generation circuit, 3, 4... Edge signal detection circuit, 5... OR circuit.
Claims (1)
してエツジ信号を発生するエツジ検出回路と、前
記読出し信号における立上りおよび立下りの正常
範囲をそれぞれ規定する2つのウインドウ信号を
発生するウインドウ信号発生回路と、前記立上り
および立下りのウインドウ信号におけるそれぞれ
のウインドウ期間内に印加される前記エツジ信号
の有無を検出するエツジ信号検出回路と、このエ
ツジ信号検出回路の各検出出力を加算出力するオ
ア回路とを具備してなる波形解析回路。 an edge detection circuit that detects a rising edge and a falling edge of a read signal to generate an edge signal; a window signal generating circuit that generates two window signals that respectively define normal ranges of rising edges and falling edges of the read signal; The edge signal detection circuit includes an edge signal detection circuit that detects the presence or absence of the edge signal applied within each window period of rising and falling window signals, and an OR circuit that adds and outputs each detection output of this edge signal detection circuit. Waveform analysis circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19887685U JPH0633581Y2 (en) | 1985-12-24 | 1985-12-24 | Waveform analysis circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19887685U JPH0633581Y2 (en) | 1985-12-24 | 1985-12-24 | Waveform analysis circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62106361U true JPS62106361U (en) | 1987-07-07 |
JPH0633581Y2 JPH0633581Y2 (en) | 1994-08-31 |
Family
ID=31159974
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19887685U Expired - Lifetime JPH0633581Y2 (en) | 1985-12-24 | 1985-12-24 | Waveform analysis circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0633581Y2 (en) |
-
1985
- 1985-12-24 JP JP19887685U patent/JPH0633581Y2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0633581Y2 (en) | 1994-08-31 |
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