JPH0633581Y2 - Waveform analysis circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention is used for detecting how faithfully an input signal is recorded in an optical disc tester for examining the recording characteristics (performance) of an optical disc or the like. The present invention relates to improvement of a waveform analysis circuit.

[Conventional technology]

Generally, in order to inspect the recording characteristics of an optical disc, after writing with a constant reference signal (“1” “0” period waveform), this is read and the difference (error) between the read signal and the reference signal ) Is detected and its characteristics are determined by the number of errors (error rate). When detecting such an error, the waveform analysis circuit detects whether or not the read signal is within the normal waveform range of the reference signal.

Conventionally, a detection circuit to which an FM demodulation method is applied is often used for this type of waveform analysis circuit. FIG. 3 is a waveform diagram showing the detection principle in such a waveform analysis circuit. In the figure, (a) is a reference signal Ss used for writing,
(B) is a window signal Sw for observing a certain range of the pulse waveform by applying the FM demodulation method, (C) is an example of the read signal Sr, and (d) is the output signal So obtained according to the detection result. Shown respectively. As shown in the figure, the waveform analysis circuit of this method has a period (hereinafter, referred to as a window period) according to the window signal Sw,
The state change in the read signal Sr is observed. For example, when the fall of the read signal Sr is observed within this period, the output signal So (error signal) is generated because of insufficient pulse width.

[Problems to be solved by the invention]

However, in such a waveform analysis circuit, since the presence or absence of the change in the state of the read signal Sr is observed within the window period, the pulse width is extremely narrow or wide as shown in FIG. 3 (c). Even if the read signal Sr is obviously inappropriate, a signal whose state does not change within the window period cannot be detected as an error.

SUMMARY OF THE INVENTION The present invention is intended to eliminate the above-mentioned drawbacks of the conventional device and to realize a waveform analysis circuit capable of reliably detecting an error in any state in a read signal with a simple configuration. .

[Means for solving problems]

The waveform analysis circuit of the present invention provides a window signal for each of rising and falling of a read signal,
The read signal is determined to be normal only when a rising edge and a falling edge are observed within the period of these window signals.

[Action]

As described above, when the window signal is provided for each of the rising edge and the falling edge of the read signal, when the pulse width of the read signal is extremely narrow or wide, an error occurs in either window period. Since it is detected, it is possible to reliably detect an error in any state in the read signal.

〔Example〕

FIG. 1 is a block diagram showing an embodiment of the waveform analysis circuit of the present invention. In the figure, 1 is an edge detection circuit that detects the rising and falling edges of a read signal Sr and generates an edge signal Pe, and 2 is a rising edge and a falling edge of the read signal Sr based on a reference signal used for writing. A window signal generation circuit that generates window signals Sw1 and Sw2 that respectively define the normal range, and 3 and 4 are counters whose counting operations are controlled by rising and falling window signals Sw1 and Sw2, respectively. An edge signal detection circuit 5 for detecting the presence or absence of the edge signal Pe applied during the period is an AO circuit for adding and outputting the detection outputs P1, P2 of the edge signal detection circuits 3, 4.

The operation of the waveform analysis circuit configured as described above will be described below with reference to the waveform chart of FIG. Incidentally, FIG. 2B shows various waveform patterns of the read signal Sr.

The pattern (1) in the read signal Sr has a normal waveform state. The edge signal Pe is generated at the timing of t1 and t2. At this time, the edge signal Pe according to the rising edge
Since (t1) is within the window period of the window signal Sw1, the edge signal detection circuit 3 on the rising side receives the edge signal Pe.
The detection output P1 corresponding to (t1) is generated. Similarly, since the edge signal Pe (t2) corresponding to the falling edge is also within the window period of the window signal Sw2, the edge signal detection circuit 4 on the falling side generates the detection output P2 corresponding to the edge signal Pe (t2). To do. Therefore, the OR circuit 5 outputs two output signals (pulse signals) So corresponding to the rising and falling of the read signal Sr. Here, in the present waveform analysis circuit, when one output signal So is generated for each of the rising and falling of the read signal Sr, it is determined that the read signal Sr is in a normal waveform state. Is.

The patterns (2) to (4) in the read signal Sr each indicate an error state. That is, (2),
In the pattern of (3), the pulse width of the read signal Sr is narrow and the edge signal Pe corresponding to the trailing edge of the read signal Sr.
Since (t4) and (t6) are not applied to the edge signal detection circuit 4 within the window period of the window signal Sw2, the detection output P2 is not generated from the edge signal detection circuit 4 and the pulse number of the output signal So is 1 Therefore, the error of the read signal Sr is detected. In the pattern (4), the pulse width of the read signal Sr is wide, and the edge signal Pe corresponding to the trailing edge of the read signal Sr is not applied to the edge signal detection circuit 4 within the window period of the window signal Sw2. Similarly to the above, the detection output P2 is not generated from the edge signal detection circuit 4, and the error of the read signal Sr is detected.

In this way, the window signals Sw1 and Sw2 are provided for each of the rising edge and the falling edge of the read signal Sr, and the waveform state of the read signal Sr becomes normal only when the edge signal Pe is applied during each window period. Therefore, it is possible to reliably detect an error in any state in the read signal Sr.

In the above description, the pulse width of the rising and falling window signals Sw1 and Sw2 is the read signal Sr.
It is determined according to the allowable range of rising and falling in the above, and is not limited to the illustrated state. In addition, the read and write
When the period is 1/2 the period of Sr (reference signal Ss), the window signal generation circuit 2 can be configured by a simple circuit including, for example, a PLL (phase locked loop) circuit and a phase inversion circuit.

[Effect of device]

As described above, in the waveform analysis circuit of the present invention, the window signal is provided for each of the rising edge and the falling edge of the read signal, and only when the rising edge and the falling edge are observed within the period of these window signals, respectively. Since the read signal is judged to be normal, if the pulse width of the read signal is extremely narrow or wide, an error will be detected in either window period, and the read signal A waveform analysis circuit that can reliably detect an error in any state can be realized with a simple configuration.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the waveform analysis circuit of the present invention, FIG. 2 is a waveform diagram explaining the operation of the waveform analysis circuit of FIG. 1, and FIG. 3 is an operation of the conventional waveform analysis circuit. It is a wave form diagram which shows an example. 1 ... Edge detection circuit, 2 ... Window signal generation circuit, 3, 4 ... Edge signal detection circuit, 5 ... OR circuit.

Claims (1)

[Scope of utility model registration request] 1. An edge detection circuit for detecting a rising edge and a falling edge of a read signal to generate an edge signal, and a normal range of the rising edge and the falling edge of the read signal based on a reference signal used for writing. A window signal generation circuit for generating two prescribed window signals, an edge signal detection circuit for detecting the presence or absence of the edge signal applied within each window period of the rising and falling window signals, and the edge signal A waveform analysis circuit comprising an OR circuit for adding and outputting each detection output of the detection circuit.