JPH0369179B2 - - Google Patents

Info

Publication number
JPH0369179B2
JPH0369179B2 JP59261075A JP26107584A JPH0369179B2 JP H0369179 B2 JPH0369179 B2 JP H0369179B2 JP 59261075 A JP59261075 A JP 59261075A JP 26107584 A JP26107584 A JP 26107584A JP H0369179 B2 JPH0369179 B2 JP H0369179B2
Authority
JP
Japan
Prior art keywords
conductivity type
region
forming
base region
active base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59261075A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61139057A (ja
Inventor
Hideki Takada
Hiroshi Iwasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP59261075A priority Critical patent/JPS61139057A/ja
Publication of JPS61139057A publication Critical patent/JPS61139057A/ja
Publication of JPH0369179B2 publication Critical patent/JPH0369179B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP59261075A 1984-12-11 1984-12-11 半導体集積回路装置の製造方法 Granted JPS61139057A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59261075A JPS61139057A (ja) 1984-12-11 1984-12-11 半導体集積回路装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59261075A JPS61139057A (ja) 1984-12-11 1984-12-11 半導体集積回路装置の製造方法

Publications (2)

Publication Number Publication Date
JPS61139057A JPS61139057A (ja) 1986-06-26
JPH0369179B2 true JPH0369179B2 (enrdf_load_stackoverflow) 1991-10-31

Family

ID=17356727

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59261075A Granted JPS61139057A (ja) 1984-12-11 1984-12-11 半導体集積回路装置の製造方法

Country Status (1)

Country Link
JP (1) JPS61139057A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6245604B1 (en) * 1996-01-16 2001-06-12 Micron Technology Bipolar-CMOS (BiCMOS) process for fabricating integrated circuits
US7927948B2 (en) 2005-07-20 2011-04-19 Micron Technology, Inc. Devices with nanocrystals and methods of formation

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6052591B2 (ja) * 1981-02-14 1985-11-20 三菱電機株式会社 半導体集積回路装置の製造方法
JPS58225663A (ja) * 1982-06-23 1983-12-27 Toshiba Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
JPS61139057A (ja) 1986-06-26

Similar Documents

Publication Publication Date Title
US4927776A (en) Method of producing semiconductor integrated circuit device including bipolar transistor and insulated gate field effect transistor
US4818720A (en) Method for manufacturing a BiCMOS device
KR0133540B1 (ko) 섈로우 npn 에미터 및 mosfet 소오스/드레인을 형성하기 위한 bicmos 방법
JPH04226066A (ja) Ｂｉｃｍｏｓ装置及びその製造方法
US4931407A (en) Method for manufacturing integrated bipolar and MOS transistors
JPH0348457A (ja) 半導体装置およびその製造方法
JPH04226064A (ja) 半導体装置用の相互接続体及びその製造方法
KR0178551B1 (ko) 반도체 집적 회로 제조 방법
JP2953425B2 (ja) 半導体装置の製造方法
JPH0557741B2 (enrdf_load_stackoverflow)
JP2509690B2 (ja) 半導体装置
JP2776350B2 (ja) 半導体集積回路装置の製造方法
EP0337823A2 (en) MOS field effect transistor having high breakdown voltage
JP2504567B2 (ja) 半導体装置の製造方法
JPH0148661B2 (enrdf_load_stackoverflow)
JPH0369179B2 (enrdf_load_stackoverflow)
JP3165715B2 (ja) 半導体装置の製造方法
JP2575876B2 (ja) 半導体装置
JP2997123B2 (ja) 半導体装置の製造方法
JPH06295983A (ja) 半導体装置およびその製造方法
JP3043791B2 (ja) 半導体装置の製造方法
JP2708764B2 (ja) 半導体集積回路およびその製造方法
KR950012742B1 (ko) 2극성 및 상보 전계효과 트랜지스터들(BiCMOS)을 동시에 제조하는 방법
JP2915040B2 (ja) 半導体装置の製造方法
JP3121629B2 (ja) 半導体装置の製造方法

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term