JPH0367335B2 - - Google Patents
Info
- Publication number
- JPH0367335B2 JPH0367335B2 JP57151507A JP15150782A JPH0367335B2 JP H0367335 B2 JPH0367335 B2 JP H0367335B2 JP 57151507 A JP57151507 A JP 57151507A JP 15150782 A JP15150782 A JP 15150782A JP H0367335 B2 JPH0367335 B2 JP H0367335B2
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- resist
- mask
- forming
- dummy
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Drying Of Semiconductors (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57151507A JPS5941839A (ja) | 1982-08-31 | 1982-08-31 | パタ−ン形成方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57151507A JPS5941839A (ja) | 1982-08-31 | 1982-08-31 | パタ−ン形成方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5941839A JPS5941839A (ja) | 1984-03-08 |
JPH0367335B2 true JPH0367335B2 (enrdf_load_stackoverflow) | 1991-10-22 |
Family
ID=15520015
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57151507A Granted JPS5941839A (ja) | 1982-08-31 | 1982-08-31 | パタ−ン形成方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5941839A (enrdf_load_stackoverflow) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62194627A (ja) * | 1986-02-20 | 1987-08-27 | Fujitsu Ltd | 半導体装置の製造方法 |
JP4521694B2 (ja) * | 2004-03-09 | 2010-08-11 | Hoya株式会社 | グレートーンマスク及び薄膜トランジスタの製造方法 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5713180A (en) * | 1980-06-25 | 1982-01-23 | Fujitsu Ltd | Etching method |
-
1982
- 1982-08-31 JP JP57151507A patent/JPS5941839A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5941839A (ja) | 1984-03-08 |
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