JPH0359521A - Color liquid crystal display device - Google Patents

Abstract

PURPOSE:To prevent the peeling of a coloring base material by providing an insulating transparent inorganic film on a light shielding film provided on the surface of a transparent substrate and providing a color filter on the insulating transparent inorganic film. CONSTITUTION:The shielding film BM is provided on the surface of an upper transparent glass substrate SUB2 lest external light should be made incident on an i-type semiconductor layer AS which is used as a channel formed area, ad it has a constant pattern. The insulating transparent inorganic film IIT consisting of an SiO2 film is provided on the light shielding film BM. Furthermore, the color filter FIL is provided on the insulating transparent inorganic film IIT. Thus, the adhesive strength between the insulating transparent inorganic film IIT and the coloring base material of the color filter FIL is enhanced and the peeling of the coloring base material is prevented, thereby improving yield and reliability.

Description

[Detailed description of the invention]

(Industrial Application Field) The present invention relates to a color liquid crystal display device, and particularly to an active 7-trix color liquid crystal display device using thin film transistors and the like.

[Prior Art 1] An active matrix type liquid crystal display device is one in which a nonlinear element (switching element) is provided corresponding to each of a plurality of pixel electrodes arranged in a matrix. Theoretically, the liquid crystal in each pixel is constantly driven (duty ratio 1.0), so compared to the so-called simple matrix method, which uses a time-division drive method, the active method has better contrast, which is especially important for color. It is becoming an indispensable technology. A typical switching element is a thin film transistor (TPT). In a conventional active matrix color liquid crystal display device, a light shielding film made of a metal film such as chromium is provided on a glass substrate, and a color filter is provided on the light shielding film. Note that an active matrix liquid crystal display device using thin film transistors is described in, for example, "12.5-inch active matrix color liquid crystal display with redundant configuration," Nikkei Electronics, pp. 193-2.
10. Published by Nikkei McGraw-Hill on December 15, 1986, known for its publication. [Problems to be Solved by the Invention] However, in such a color liquid crystal display device, the adhesion between the dyed base material of the color filter and the light-shielding film is small, so when patterning the dyed base material, it is difficult to remove the dyed base material. The material may peel off from the surface of the light-shielding film, resulting in low yield and reliability. This invention was made to solve the above-mentioned problems, and an object thereof is to provide a color liquid crystal display device with high yield and reliability.

[Means to solve the problem]

In order to achieve this object, in the present invention, in a color liquid crystal display device having a light-shielding film made of a metal film between color filters, the light-shielding film is provided on the surface of a transparent substrate, and an insulating transparent inorganic film is provided on the light-shielding film. A film is provided, and the color filter is provided on the insulating transparent inorganic film.

[Effect]

In this color liquid crystal display device, the adhesion between the insulating transparent inorganic film and the dyed base material of the color filter is large;
The dyed base material will not peel off.

【Example】

Hereinafter, the structure of the present invention will be described together with an embodiment in which the present invention is applied to an active matrix color liquid crystal display device. In addition, in an attempt to explain the embodiments, parts having the same functions are given the same reference numerals, and repeated explanation thereof will be omitted. FIG. 2A is a nine-dimensional plan view showing one pixel and its surroundings of an active matrix color liquid crystal display device to which the present invention is applied, and FIG. 2B is a cross section taken along the line IIB-IIB in FIG. 2A and a seal on the display panel. FIG. 2C is a cross-sectional view taken along the NC-NC cutting line in FIG. 2A. Moreover, FIG. 3 (main part plan view) shows a plan view when a plurality of pixels shown in FIG. 2A are arranged. (Pixel Arrangement) As shown in Figure 2A, each pixel is connected to two adjacent scanning signal lines (gate signal lines or horizontal signal lines) GL and two adjacent video signal lines (drain signal lines or vertical signal lines). line) DL (in the area surrounded by four signal lines). Each pixel has a thin film transistor TPT, transparent pixel electrode IT○
1 and a storage capacitor element Cadd. Scanning signal @GL
extend in the column direction, and a plurality of them are arranged in the row direction. The video signal MDL extends in the row direction, and a plurality of video signals MDL are arranged in the column direction. (Overall cross-sectional structure of display section) As shown in FIG. 2B, a thin film transistor TPT and a transparent pixel electrode ITOI are formed on the lower transparent glass substrate 5UBI side with respect to the liquid crystal LC, and the upper transparent glass substrate 5
On the UB2 side, a color filter FIL and a light shielding film BM forming a light shielding black matrix pattern are formed. The lower transparent glass substrate 5UBI is, for example, 1.1 [m
m] thickness. The central part of Figure 2B shows a cross section of one pixel,
The left side shows the cross section of the left edge of the transparent glass substrates 5UBI and 5UB2 where external lead wiring exists, and the right side shows the cross section of the right edge of the transparent glass substrates 5UB1.5UB2 where no external lead wiring exists. It shows. The sealing material SL shown on the left and right sides of FIG. 2B is configured to seal the liquid crystal LC, and the transparent glass substrates 5UBI, 5 excluding the liquid crystal sealing opening (not shown)
It is formed along the entire edge of UB2. The sealing material SL is made of, for example, epoxy resin. Common transparent pixel electrode IT on the upper transparent glass substrate 5UB2 side
O2 is supplied to the silver paste material SI at least in one place.
L is connected to an external lead wiring formed on the UBI side of the lower transparent glass substrate 5. This external lead wiring includes a gate electrode GT, a source electrode SD1, and a drain electrode SD2.
are formed in the same manufacturing process as each. Orientation film ○RII, 0RI2. Transparent pixel electrode ITO1, common transparent pixel electrode IT○2, protective film psv1, PSV2,
Each layer of the insulating film GI is formed inside the sealing material SL. Polarizing plates POL1 and POL2 are respectively a lower transparent glass substrate 5UBI and an upper transparent glass substrate 5UB.
It is formed on the outer surface of 2. Liquid crystal LC has a lower alignment film ○RI that sets the direction of liquid crystal molecules.
It is sealed between I and the upper alignment film ○RI2, and the seal part S
It is sealed by L. The lower alignment film ○RII is formed on the protective film PSVI on the lower transparent glass substrate 5UBl side. A light shielding film BM, a color filter FIL, and a protective film P are provided on the inner surface (liquid crystal LC side) of the upper transparent glass substrate 5UB2.
SV2, common transparent pixel electrode IT◯2 (COM), and upper alignment film ◯RI2 are sequentially laminated. This liquid crystal display device is constructed by separately forming layers on the lower transparent glass substrate 5UBl side and the upper transparent glass substrate 5UB2 side, and then overlapping the upper and lower transparent glass substrates 5UBI and 5UB2, and sealing the liquid crystal LC between them. Can be assembled. (Thin film transistor TPT> The thin film transistor TPT operates in such a way that when a positive bias is applied to the gate electrode GT, the channel resistance between the source and drain becomes small, and when the bias is reduced to zero, the channel resistance becomes large.Thin film transistor of each pixel TPT is 3 within a pixel.
It is divided into two (plurality) of thin film transistors (divided thin film transistors) TFTI, TPT2, and TFT3. Each of the thin film transistors TPTI to TFT3 has substantially the same size (channel length and width are the same). Each of the divided thin film transistors TPT1 to TFT3 mainly has a gate electrode G.
T, gate insulating film GI, i type (intrinsic, 1ntrins
ic, a pair of source electrodes SDI and drain electrodes SD2. Note that the source and drain are originally determined by the bias polarity between them, and in the circuit of this liquid crystal display device, the polarity is reversed during operation, so it should be understood that the source and drain are interchanged during operation. However, even in the explanation below,
For convenience, one side is fixed as a source and the other as a drain. (Gate electrode GT> The gate electrode GT is shown in FIG. 4 (↓ conductive film g1 in FIG. 2A,
As shown in detail in the plan view depicting only the second conductive film g2 and the i-type semiconductor RAS, it has a shape that projects vertically from the scanning signal line GL (upward in FIGS. 2A and 4). (branched into a T-shape),
Gate electrode GT is thin film transistor TPTI~TFT3
It is configured to protrude to the respective formation areas. The respective gate electrodes GT of the thin film transistors TPT1 to TFT3 are integrally formed (as a common gate electrode) and are formed continuously to the scanning signal line GL. The gate electrode GT is made of a single-layer first layer so as not to create a large step in the formation region of the thin film transistor TPT.
It is composed of a conductive film GL. The first conductive film g1 is made of, for example, a chromium (Cr) film formed by sputtering.
λ]. As shown in FIGS. 2A, 2B, and 4, this gate electrode GT is formed to be thicker than the i-type semiconductor RAS so as to completely cover it (as viewed from below). Therefore, when a backlight BL such as a fluorescent lamp is attached below the lower transparent glass substrate 5UBI, the gate electrode GT made of opaque or ROM forms a shadow, and the backlight light does not shine on the i-type semiconductor layer AS. , a conductive phenomenon caused by light irradiation, that is, deterioration of the off-characteristics of the thin film transistor TPT, becomes less likely to occur. Note that the original size of the gate electrode GT is the minimum required size to span between the source electrode SDI and drain electrode SD2 (including the alignment margin between the gate electrode GT, the source electrode SDI, and the drain electrode SD2). ), and its depth and length that determine the channel @W are determined by the ratio of the distance (channel length) L between the source electrode SD1 and the drain electrode SD2, that is, the factor W/L that determines the mutual conductance gm. It depends on what you do. The size of the gate electrode GT in this liquid crystal display device is of course made larger than the original size mentioned above. Note that if we consider only from the gate and light shielding function of the gate electrode GT, the gate electrode GT and the scanning signal line GL
may be integrally formed in a single layer, in which case aluminum (Al) containing silicon is used as the opaque conductive material.
), pure aluminum. Aluminum containing palladium (Pd) can be selected. (Scanning Signal Line GL)> The scanning signal line OL is composed of a composite film including a first conductive film g1 and a second conductive film g2 provided on the first conductive film g1. The first conductive film gi of this scanning signal line GL is the gate electrode G.
It is formed in the same manufacturing process as the first conductive film g1 of T, and is configured integrally. The second conductive film g2 is formed using, for example, an aluminum film formed by sputtering, and has a thickness of about 1000 to 5500 [people]. The second conductive film g2 receives the scanning signal 11. The structure is such that the resistance value of the GL can be reduced and the signal transmission speed can be increased (improvement of writing characteristics of pixel information). Furthermore, the width of the second conductive film g2 of the scanning signal line OL is configured to be smaller than the width of the first conductive film g1. That is, the side wall of the scanning signal line GL has a gradual step shape. (Insulating film GI> The insulating film GI is used as a gate insulating film for each of the thin film transistors TPTI to TFT3. The insulating film GI is formed in the upper layer of the gate electrode GT and the scanning signal line GL. I!! Edge film GI For example, using a silicon nitride film formed by plasma CVD,
[Form the film with a film thickness that is about the same as that of the film. (I-type semiconductor layer AS> As shown in FIG. 4, the i-type semiconductor layer AS is used as a channel formation region for each of the thin film transistors TPTI to TFT3 divided into a plurality of parts.I-type semiconductor layer A
s is formed of an amorphous silicon film or a polycrystalline silicon film, and is formed to a thickness of about 1800 mm. This i-type semiconductor layer AS is made of Si by changing the components of the supplied gas.
N edge film G used as a gate insulating film consisting of 3N
Subsequently to the formation of I, it is formed in the same plasma CVD apparatus without being exposed to the outside from the plasma CVD apparatus. Further, a P-doped N+ type semiconductor layer do (FIG. 2B) for ohmic contact is similarly formed continuously to a thickness of about 400 mm. Thereafter, the lower transparent glass substrate 5UBI was taken out from the CVD apparatus, and the N+ type semiconductor layer dO and the i-type semiconductor layer As were separated by photo processing technology as shown in FIGS. 2A, 2B, and 4. Patterned into islands. As shown in detail in FIGS. 2A and 4, the i-type semiconductor layer AS is also provided between the scanning signal line GL and the video signal line DL at an intersection (crossover section). The i-type semiconductor MAS at this intersection is configured to reduce short circuits between the scanning signal line GL and the video signal line DL at the intersection. (Source electrode SDI, drain electrode SD2>The source electrode 1sD1 and drain electrode SD2 of each of the thin film transistors TPT1 to TFT3 divided into a plurality of
As shown in detail in FIGS. 2B, 2B, and 5 (a plan view depicting only the first to third conductive films d1 to d3 in FIG. 2A), they are provided separately on the i-type semiconductor layer AS. It is being Each of the source electrode SDI and drain electrode SD2 is
A first conductive film di, a second conductive film d2, and a third conductive film d3 are sequentially stacked one on top of the other from the lower layer side in contact with the N+ type semiconductor layer dO. First conductive film d of source electrode SDI
1. The second conductive film d2 and the third conductive film d3 are formed in the same manufacturing process as the first conductive film d1, second conductive film d2, and third conductive film d3 of the drain electrode SD2. The first conductive film d1 is a chromium film formed by sputtering,
The film thickness is approximately 500 to 100 cm (in this liquid crystal display device, the film thickness is approximately 600 cm). The thicker the chromium film is, the greater the stress will be, so
The film is formed within a range that does not exceed a film thickness of approximately 0 [A]. The chromium film has good contact with the N+ type semiconductor layer dO. The chromium film constitutes a so-called barrier layer that prevents aluminum of the second conductive film d2, which will be described later, from diffusing into the N+ type semiconductor WdO. As the first conductive film d1, in addition to the chromium film, high melting point gold m
(Mo, Ti, Ta, W) film, high melting point metal silicide (
It may be formed of a film of MoSi2, TiSi2, TaSi2, WSi, etc. After patterning the first conductive film d1 by photo processing, the N+ type semiconductor layer dO is removed using the same photo processing mask or using the first conductive film d1 as a mask. In other words, the N+ type semiconductor layer d remaining on the i type semiconductor layer AS
o, the portion other than the first conductive film d1 is removed by self-alignment. At this time, the N+ type semiconductor layer dO is etched to remove its entire thickness, so the i type semiconductor layer A
S is also etched to some extent on its surface, but the degree of etching can be controlled by the etching time. Thereafter, the second conductive film d2 is formed by aluminum sputtering to a thickness of 3000 to 5500 [lambda] (in this liquid crystal display device, a film thickness of about 3500 [λ]). Aluminum film has less stress than chrome film,
It is possible to form a thick film, and the source electrode SDI,
It is configured to reduce the resistance values of the drain electrode SD2 and the video signal line DL. The second conductive film d2 may be formed of an aluminum film containing silicon or copper (Cu) as an additive instead of an aluminum film. After patterning the second conductive film d2 using photo processing technology,
A third conductive film d3 is formed. This third conductive film d3 is a transparent conductive film (Induim-
It is made of Tin-Oxide ITO (NESA film) and is formed with a film thickness of 1000 to 2000 [A] (in this liquid crystal display device, a film thickness of about 1200 [A]). This third conductive film d3 connects the source electrode SD, the drain electrode SD2, and the video signal 4flDL, and
The transparent pixel electrode IT○1 is configured. First conductive film d1 of source electrode SDi, drain electrode SD
Each of the two first conductive films d1 has an upper second conductive film d1.
The conductive film d2 and the third conductive film d3 extend further inward (into the channel region). In other words, the first conductive film d1 in these parts is configured to be able to define the gate length of the thin film transistor TPT independently of the second conductive film d2 and the third conductive film d3. The source electrode SDI is connected to the transparent pixel electrode ITOI. The source electrode SDI has a step shape in the i-type semiconductor layer AS (a step corresponding to the sum of the thickness of the first conductive film g1, the thickness of the N+ type semiconductor NdO, and the thickness of the i-type semiconductor layer AS). It is structured along. Specifically, the source electrode SDI includes a first conductive film di formed along the step shape of the i-type semiconductor layer AS, and a transparent pixel electrode IT○1 above the first conductive film di. A second conductive film d2 whose connected side is formed in a small size, and a third conductive film di exposed from the second conductive film d2.
It is composed of a conductive film d3. The second conductive film d2 of the source electrode SDI cannot be formed thickly because the chromium film of the first conductive film d1 increases stress, and cannot overcome the stepped shape of the i-type semiconductor layer AS.
It is configured to overcome the type semiconductor layer AS. In other words, step coverage is improved by forming the second conductive film d2 thickly. Since the second conductive film d2 can be formed thickly, the resistance value of the source electrode SDI (drain electrode S
The same applies to D2 and the video signal line DL). Since the third conductive film d3 cannot overcome the step shape caused by the i-type semiconductor layer AS of the second conductive film d2, by reducing the size of the second conductive film d2, the exposed first conductive film d1 is configured to connect. The first conductive film d1 and the third conductive film d3 not only have good adhesion, but also have a small step shape at the connection between them, making it possible to reliably connect the source electrode SDI and the transparent pixel electrode ITOI. can. (Transparent pixel electrode ITOI> Transparent pixel electrode IT○1 is provided for each pixel and constitutes one of the pixel electrodes of the liquid crystal display section. The transparent pixel electrode ITOI is formed by thin film transistors TPTI to TFT3 that are divided into a plurality of pixels. 3 corresponding to each of
Two divided transparent element electrodes E1. It is divided into E2 and E3. The divided transparent pixel electrodes El to E3 are each connected to the source electrode SDI of the thin film transistor TPT. Each of the divided transparent pixel electrodes E1 to E3 is patterned to have substantially the same area. In this way, the thin film transistor TPT of one pixel is divided into a plurality of thin film transistors TPTI to TFT3, and each of the divided transparent pixel electrodes E1 to E3 is connected to each of the divided thin film transistors TPT1 to TFT3. Even if a part of the pixel (for example, thin film transistor TFTI) becomes a point defect, it is no longer a point defect when looking at the entire pixel (thin film transistor TFT2).
and thin film transistor TFT3 are not defective), so
The probability of point defects can be reduced, and defects can be made difficult to see. Moreover, by configuring each of the divided transparent pixel electrodes E1 to E3 with substantially the same area, the divided transparent pixel electrode E
It is possible to make the respective liquid crystal capacitances Cpix formed by each of the pixels 1 to E3 and the common transparent pixel electrode ITO2 uniform. (Protective film PSVI> A protective film PSVI is provided over the thin film transistor TPT and the transparent pixel electrode ITOI. The protective film PSVI is mainly formed to protect the thin film transistor TPT from moisture etc., and has high transparency and Use a material with good moisture resistance.The protective film PSVI is made of, for example, a silicon oxide film or a silicon nitride film formed by a plasma CVD device, and is formed with a film thickness of about 8000[λ]. (Light-shielding film BM> As shown in FIG. 1, the upper transparent glass substrate 5UB
A shielding film BM is provided on the surface of the shielding film B to prevent external light (light from above in FIG. 2B) from entering the i-type semiconductor layer AS used as a channel formation region.
M has a pattern as shown by hatching in FIG. Note that FIG. 6 is a plan view depicting only the third conductive film d3 made of the IT◯ film, the color filter FIL, and the light shielding film BM in FIG. 2A. The light shielding film BM is formed of a film having a high light shielding property, such as an aluminum film or a chromium film, and in this liquid crystal display device, the chromium film is formed by sputtering to a thickness of approximately 1300 mm. Therefore, i of thin film transistors TFT1 to TFT3
The type semiconductor layer As is sandwiched between the upper and lower light shielding films BM and the thick gate electrode GT, and that portion is not exposed to external natural light or backlight light. The light shielding film BM is formed around the pixel as shown by the hatched area in FIG. There is. Therefore, the outline of each pixel becomes clear due to the light shielding film BM, and the contrast is improved. In other words, the light shielding film BM has two functions: shielding the i-type semiconductor layer AS and serving as a black matrix. Note that it is also possible to attach the backlight to the upper transparent glass substrate 5UB2 side and make the lower transparent glass substrate 5UBI the viewing side (externally exposed side). (Insulating transparent inorganic film IIT> Insulating transparent inorganic film I consisting of 5in2 film on light shielding film BM
IT is provided. The thickness of this insulating transparent inorganic film IIT is 100 to 1000 [people], and the insulating transparent inorganic film IIT is provided by sputtering. (Color filter FIL> The color filter FIL is made up of a dyed base material made of a resin material such as acrylic resin, which is colored with dye.The color filter FIL is formed by applying a dot to each pixel at a position facing the pixel. formed (Fig. 7) and dyed separately (
Figure 7 shows the third conductive film layer d3 and color filter F in Figure 3.
Only the IL is drawn, and the R, G, and B color filters FIL are 45'], 356. (The hatch of the cross is an alms.) The color filter FIL has transparent pixel electrodes ITOI (El to E3) as shown in FIG.
), and the light shielding film BM is formed inside the peripheral edge of the transparent pixel electrode T○1 so as to overlap with the color filter FIL and the edge part of the transparent pixel electrode T○1. ing. Further, the color filter FIT is provided on the MA border transparent inorganic film IIT, and the color filter FIT is provided on the insulating transparent inorganic film IIT.
Since the adhesion between the color filter FIL and the dyed base material is strong, the dyed base material will not peel off, resulting in high yield and reliability. Color filter FIL can be formed as follows. First, a dyed base material is formed on the surface of the upper transparent glass substrate 5UB2, and the dyed base material other than the red filter forming area is removed using photolithography technology. Thereafter, the dyed base material is dyed with a red dye and subjected to a fixing treatment to form a red filter R. Next, a green filter G and a blue filter B are sequentially formed by performing similar steps. (Protective film PSV2> The protective film PSV2 is provided to prevent the dyes that dye the color filter FIL into different colors from leaking into the liquid crystal LC.The protective film PSV2 is made of a transparent resin material such as acrylic resin or epoxy resin. (Common transparent pixel electrode IT○2) The common transparent pixel electrode ITO2 is formed of the lower transparent glass substrate 5U.
Opposing the transparent pixel electrode ITOI provided for each pixel on the BI side, the optical state of the liquid crystal LC changes in response to the potential difference (electric field) between each pixel electrode ITOI and the common transparent pixel electrode ITO2. The configuration is such that a common voltage Vcow is applied to this common transparent pixel electrode ITO2. The common voltage V cow is an intermediate potential between the low level drive voltage V d win and the high level opening voltage V d maX applied to the video signal mDL. (Pixel Arrangement) As shown in FIGS. 3 and 7, a plurality of pixels of the liquid crystal display section are arranged in the same column direction as the direction in which the scanning signal line OL extends, and are arranged in pixel columns Xi, X2°X3. X4. It consists of each of... Each pixel column Xi, X2. X3. X
4. Each pixel of... is a thin film transistor TF
The arrangement positions of TI to TFT3 and divided transparent pixel electrodes E1 to E3 are configured to be the same. In other words, odd pixel row Xi
, Odd pixel columns XI, X3. . . , adjacent even-numbered pixel columns X2 . X4. . . are arranged in odd-numbered pixel columns Xi, X3 . . . . each pixel is made up of pixels that are symmetrically turned upside down with respect to the extending direction of the video signal line DL. That is, pixel row X2.
X4. Each pixel of... is a thin film transistor T
The arrangement positions of PT1 to TFT3 are on the right side, transparent pixel electrode El
-E3 is arranged on the left side. Then, pixel row X2. Each pixel of X4°... is a pixel column Xi
,X3. ... are shifted (shifted) by half a pixel interval in the column direction. In other words, if each pixel interval of one pixel column X is 1.0 (1,0 pitch), then the next pixel column
0.5 pixel interval (0,
5 pitch) is off. The video signal line DL extending in the row direction between each pixel is configured to extend in the column direction by a half pixel interval (0.5 pitch) between each pixel column X. As a result, as shown in FIG. 7, the pixel in the previous pixel row The pixels on which the same color filter is formed (for example, the pixel on which the red filter R of pixel row X4 is formed) are separated by 1.5 pixel intervals (1.5 pitches), and
The color filter FIL of B has a triangular arrangement. The RGB triangular arrangement structure of the color filter FIL can improve the mixing of each color, and therefore can improve the resolution of a color image. Moreover, since the video signal line DL extends in the column direction by only half a pixel interval between each pixel column X, it does not intersect with the adjacent video signal line DL. Therefore, video signal line D
It is possible to eliminate the routing of the L, thereby reducing the area occupied by the L, and it is also possible to eliminate the detour of the video signal line DL, thereby eliminating the multilayer wiring structure. (Whole Equivalent Circuit of Display Device) An equivalent circuit of this liquid crystal display device is shown in FIG. XiG, Xi+IG, . . . are video signal lines DL connected to pixels in which the green filter G is formed. XiB, Xi+IB, . . . are video signals &1JIDL connected to the pixels in which the blue filter B is formed. Xi+IR, Xi+2R, . . . are video signal lines DL connected to pixels in which the red filter R is formed. These video signal lines DL are selected by a video signal drive circuit. Yi is a scanning signal 11AGL that selects the pixel column Xi shown in FIGS. 3 and 7. Similarly, Yi+1. Yi+2. . . , each of pixel rows X2 . X3. . . . is a scanning signal line GL that selects each of the following. These scanning signal lines GL are connected to a vertical scanning circuit. (Structure of storage capacitor element Cadd) Each of the divided transparent pixel electrodes E1 to E3 is bent into an L-shape so as to overlap the adjacent scanning signal line GL at the end opposite to the end connected to the thin film transistor TPT. It is formed as follows. As is clear from FIG. 2C, this superposition is achieved by using a storage capacitive element (electrostatic Capacitive element)C
add 'It'll be deleted. This storage capacitor element Cad
The dielectric film d is made of the same layer as the insulating film GI used as the gate insulating film of the thin film transistor TPT. As is clear from FIG. 4, the storage capacitor element Cadd is formed in the widened portion of the first conductive film g1 of the gate MGL. Note that the first conductive film d1 at the portion intersecting with the video signal gDL is made thin in order to reduce the probability of short circuit with the video signal line DL. Similar to the source electrode SDI, a transparent pixel electrode ITOI is formed between each of the divided transparent pixel electrodes E1 to E3 overlapped to form the storage capacitor element Cadd and the electrode PLI. An island region made up of the first conductive film d1 and the second conductive film d2 is provided to prevent disconnection. This island region is configured to be as small as possible so as not to reduce the area (aperture ratio) of the transparent pixel electrode ITO1. (Equivalent circuit of storage capacitor element Cadd and its operation) 2nd A
FIG. 9 shows an equivalent circuit of the pixel shown in the figure. In FIG. 9, Cgs is a parasitic capacitance formed between the gate electrode GT and source electrode SDI of the thin film transistor TPT. The dielectric film of the parasitic capacitance Cgs is an insulating film GI.
Cpix is a liquid crystal capacitor formed between the transparent pixel electrode ITOI (PIX) and the common transparent pixel electrode IT○2 (COM). The dielectric film of liquid crystal capacitor Cpix is liquid crystal L
mVlc, which is the C1 protective film PSVI and the alignment films 0RII and 0RI2, is at a midpoint potential. The storage capacitor element Cadd has a midpoint potential (pixel electrode potential) Vic when the thin film transistor TPT switches.
It works to reduce the influence of gate potential change ΔVg on. This situation can be expressed as the following formula. ΔV1c= (Cgs/(Cgs+Cadd+Cpix
)) XΔVg Here, ΔVlc represents the change in midpoint potential due to ΔVg. This variation ΔVie causes a DC component applied to the liquid crystal LC, but the larger the holding capacitance Cadd is, the smaller its value can be. Further, the storage capacitor element Cadd also has the effect of lengthening the discharge time, so that video information is stored for a long time after the thin film transistor TPT is turned off. Reducing the DC component applied to the liquid crystal LC can improve the life of the liquid crystal LC and reduce so-called burn-in, in which the previous image remains when switching between liquid crystal display screens. As mentioned above, since the gate electrode GT is made large enough to completely cover the i-type semiconductor layer AS, the source electrode SDI
, the overlap area with the drain electrode SD2 increases, the parasitic capacitance Cgs increases, and the midpoint potential v1c increases.
has the opposite effect of becoming more susceptible to the influence of the gate (scanning) signal Vg. However, by providing the storage capacitor element Cadd, this disadvantage can also be eliminated. The storage capacitance of the storage capacitor element Cadd is 4 to 8 times the liquid crystal capacitance Cpix (4・Cpix
<Cadd<8・Cpix), 8 to 32 times the superposition capacitance Cgs (8・Cgs<Cadd<
Set to a value of about 32 Cgs). (Connection method of holding capacitor element Cadd electrode line) The final stage scanning signal line GL (or first stage scanning signal 3 line OL) used only as a capacitor electrode line is connected to the common transparent pixel electrode as shown in FIG. Connect to ITO2 (Vcom). As shown in FIG. 2B, the common transparent pixel electrode ITO2 is connected to an external wiring at the peripheral edge of the liquid crystal display device by means of a silver paste material SL. Moreover, part of the conductive layer (gl and g2) of this external wiring is connected to the scanning signal line GL.
It consists of the same manufacturing process. As a result, the final stage scanning signal line (capacitive electrode line) GL is connected to the common transparent pixel electrode I.
It can be easily connected to T○2. Alternatively, as shown by the dotted line in FIG. 8, the final stage (first stage) scanning signal line (capacitive electrode line) GL may be connected to the first stage (final stage) scanning signal line GL. Note that this connection can be made by internal wiring within the liquid crystal display section or external wiring. (DC Cancellation by Scanning Signal of Storage Capacitor Element Cadd) This liquid crystal display device is based on the DC cancellation method (DC cancellation method) described in Japanese Patent Application No. 62-95125 previously filed by the applicant of the present application. As shown in FIG. 10 (time chart), by controlling the opening voltage of the scanning signal gGL, the DC component applied to the liquid crystal LC can be further reduced. In FIG. 10, Vi is the opening voltage of an arbitrary scanning signal IGL, and Vi+1 is the driving voltage of the scanning signal line OL at the next stage. Vee is video signal line D
Low level opening voltage V d min applied to L,
Vdd is a high-level opening voltage V d wax applied to the video signal 4@DL. Each time t=t1~t4
The voltage change Δ of the midpoint potential v1c (see Figure 9) at
v1 to Δv4 are the total capacitance of pixels C=Cgs+Cpi
When x is ten Cadd, it is expressed by the following formula. ΔVx= (Cgs/C)・V2 ΔVz=+(Cgs/C)(V1+V2)−(Cadd
/C)-V2 ΔVz=-(Cgs/C)・Vl+(Cadd/C)(V1+V2)ΔV4
=-(Cadd/C)・Vl Here, if the opening voltage applied to the scanning signal line GL is sufficient (see below)

(See note), the DC voltage applied to the liquid crystal LC is expressed by the following formula. Δv3+ΔV, = (Cadd・V 2− Cgs・V
1)/C Therefore, Cadd-v2=Cgs-
When vl, the DC voltage applied to the liquid crystal LC becomes O. [Note] At times tl and t2, the change in the opening voltage Vi affects the midpoint potential v1c, but during the period from t2 to t3, the midpoint potential Vlc is made the same potential as the video signal potential through the signal line Xi ( sufficient writing of the video signal). The potential applied to the liquid crystal LC is almost determined by the potential immediately after the thin film transistor TPT is turned off (the off period of the thin film transistor TPT is overwhelmingly longer than the on period). Therefore, liquid crystal L
In calculation of the DC component applied to C, the period t1 to t3 can be almost ignored, and it is sufficient to consider the potential immediately after the thin film transistor TPT is turned off, that is, the influence of the transition at times t3 and t4. Note that the polarity of the video signal is inverted for each frame or line, and the DC component due to the video signal itself is zero. In other words, in the DC cancellation method, the reduction in the midpoint potential Vlc caused by the parasitic capacitance Cgs is compensated for by the retention capacitance element Ca
dd, the scanning signal of the next stage, and the drive voltage applied to Ii (capacitive electrode line) GL, thereby making it possible to extremely reduce the DC component applied to the liquid crystal LC. As a result, the life of the liquid crystal LC of the liquid crystal display device can be improved. Of course, to improve the light shielding effect, the gate electrode GT
When Cadd is increased, the storage capacitance element Cadd is increased accordingly.
It is only necessary to increase the holding capacity of . As above, the invention made by the present inventor has been specifically explained based on the above embodiments, but this invention is not limited to the above embodiments, and can be modified in various ways without departing from the gist thereof. Of course. For example, in the above embodiment, an inverted staggered structure is shown in which gate electrode formation→gate insulating film formation→semiconductor layer formation→source/drain electrode formation, but the present invention can also be applied to a staggered structure in which the vertical relationship or the order of formation is reversed. It is valid. Further, in the above embodiment, the insulating transparent inorganic film IIT made of 5jO2 film was provided as the insulating transparent inorganic film, but other insulating transparent inorganic film such as a silicon nitride film may be provided. Furthermore, in the above embodiment, SiO2
The MA border transparent inorganic film IIT was formed by sputtering, and #! A border transparent inorganic film IIT may also be provided.

【Effect of the invention】

As explained above, in the liquid crystal display device according to the present invention, the adhesion between the binding transparent inorganic film and the dyed base material of the color filter is strong, so the dyed base material does not peel off, which improves yield and reliability. becomes more sexual. As described above, the effects of this invention are remarkable.

[Brief explanation of drawings]

FIG. 1 is a schematic sectional view showing a part of the liquid crystal display section of the color liquid crystal display device shown in FIG. 2A etc., and FIG. 2A is a liquid crystal display of an active matrix color liquid crystal display device to which the present invention is applied. Main part plan view showing one pixel of the part, 2nd
Figure B is a cross-sectional view of the part cut along the ■B-IrB cutting line in Figure 2A and the area around the seal, and Figure 2C is the nc-n diagram in Figure 2A.
3 is a cross-sectional view taken along the cutting line C, and FIG. 3 is a plan view of the main part of a liquid crystal display section in which a plurality of pixels shown in FIG. 2A are arranged, and FIGS. 4 to 6 are
The figure is a plan view depicting only a predetermined layer of the pixel shown in FIG. 2A, FIG. 7 is a plan view of the main part depicting only the pixel electrode layer and color filter layer shown in FIG. 3, and FIG. An equivalent circuit diagram showing the liquid crystal display section of a matrix color liquid crystal display device, FIG. 9 is an equivalent circuit diagram of the pixel shown in FIG. 2A, and FIG. 10 shows the opening voltage of the scanning signal line using the DC cancellation method. This is a time chart. SUB...Transparent glass substrate OL...Scanning signal line DL...Video signal line GI...Insulating film GT...Gate electrode AS...I-type semiconductor layer SD...Source electrode or drain electrode psv...
Protective film BM... Light shielding film LC... Liquid crystal TPT... Thin film transistor ITO... Transparent pixel electrodes g, d... Conductive film Cadd... Holding capacitor element Cgs... Parasitic capacitance Cpix... Liquid crystal capacitance IIT...Insulating transparent inorganic film FIL---Ichiriki U-filter 8M---Partly used

Claims (1)

[Claims] 1. In a color liquid crystal display device having a light-shielding film made of a metal film between color filters, the light-shielding film is provided on the surface of a transparent substrate, and an insulating transparent inorganic film is provided on the light-shielding film,
A color liquid crystal display device, characterized in that the color filter is provided on the insulating transparent inorganic film.