JPH02234127A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To make contrast good and to prevent the write of a signal in a pixel electrode from becoming impossible by providing an interpixel division light shielding film made of an opaque metallic film which is formed to block a gap between pixel electrodes, connected to the electrode of a holding capacity element and formed in parallel with a scanning signal line. CONSTITUTION:Since the interpixel division light shielding film SP made of the opaque metallic film g11 is formed so as to block the gap between the pixel electrodes ITO 1-3, light is prevented from being leaked from the gaps between the divided pixel electrodes ITO 1-3. Then, the interpixel division light shielding film SP is connected to the electrode of the holding capacity element Csdd and formed in parallel with the scanning signal line GL, so that the resistance of the scanning signal line GL is made small. Thus, the contrast is made good and the write of the signal in the pixel electrodes ITO 1-3 is prevented from becoming impossible.

Description

[Detailed description of the invention]

[Industrial Application Field] The present invention relates to a liquid crystal display device such as an active matrix color liquid crystal display device in which a pixel includes a thin film transistor and a pixel electrode. [Prior Art] In a conventional active matrix type liquid crystal display device, the pixel electrode is divided into a plurality of parts in order to reduce the pixel defect rate, as shown in Japanese Patent Laid-Open No. 57-49994. ．． Also, JP-A-61-]. 51516
As shown in the publication, in order to improve the aperture ratio, the electrode of the storage capacitor element connected to the scanning signal line is made of a transparent conductive film. [Problems to be Solved by the Invention] However, when a pixel electrode is divided into a plurality of parts, light leaks through the gaps between the divided pixel electrodes, resulting in poor contrast. Further, when the electrode of the storage capacitor element connected to the scanning signal line is formed of a transparent conductive film, the resistance of the scanning signal line cannot be made very small, so it may become impossible to write a signal to the pixel electrode. The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a liquid crystal display device that has good contrast and does not become unable to write signals to pixel electrodes. [Means for Solving the Problems] In order to achieve this object, in the present invention, a thin film transistor and a pixel electrode are used as constituent elements of a pixel, and the pixel electrode is divided into a plurality of parts, each of which is connected to a scanning signal line. In an active matrix type liquid crystal display device in which the electrode of the storage capacitor element is formed of a transparent conductive film, the pixel electrode is formed to fill the gap between the pixel electrodes, is connected to the electrode of the storage capacitor element, and is parallel to the scanning signal line. An inter-pixel division light-shielding film is formed and made of an opaque metal film. [Function] In this liquid crystal display device, the pixel-divided light-shielding film made of an opaque metal film is formed to close the gap between the pixel electrodes, thereby preventing light from leaking from the gap between the divided pixel electrodes. Furthermore, since the inter-pixel division light-shielding film is connected to the electrode of the storage capacitance element and is formed parallel to the scanning signal line, the resistance of the scanning signal line can be reduced. [Example] One pixel of the liquid crystal display section of an active matrix color liquid crystal display device to which this invention is applied is shown in FIG. Fig. 3 shows a cross section. Further, FIG. 4 (a plan view of the main part) shows the main part of the liquid crystal display section in which a plurality of pixels shown in FIG. 2 are arranged. As shown in FIGS. 2 to 4, the liquid crystal display device includes a pixel having a thin film transistor TPT and a transparent pixel electrode ITO on the inner surface (liquid crystal side) of a lower transparent glass substrate SUBI. Lower transparent glass substrate SUBI
For example, 1. It is constructed with a thickness of about 1 [++u++]. Each pixel is connected to two adjacent scanning signal lines (gate signal lines or horizontal signal lines) GL and two adjacent video signal lines (
(drain signal line or vertical signal line) DL (in a region surrounded by four signal lines). Scanning signal 11GL. As shown in FIGS. 2 and 4, they extend in the column direction and are arranged in plural in the row direction. The video signal lines DL extend in the row direction, and a plurality of video signal lines DL are arranged in the column direction. The thin film transistor TPT of each pixel has three
It is divided into two (plural) thin film transistors (divided thin film transistors) TFTI, TFT2, and TFT3. Each of the thin film transistors TPTI to TFT3 has substantially the same size (channel length and width are the same). Each of the divided thin film transistors TPT1 to TFT3 mainly has a gate electrode G.
T, insulating film Gl, i-type (intrinsic, not doped with conductivity type determining impurities) silicon (Si
), a pair of source electrodes SDI
and a drain electrode SD2. Note that the source and drain are originally determined by the bias polarity between them, and in this liquid crystal display circuit, the polarity is reversed during operation, so it should be understood that the source and drain are interchanged during operation. However, in the following explanation, for convenience, one side will be fixed as the source and the other as the drain. As shown in detail in FIG. 5 (plan view of main part in a predetermined manufacturing process), the gate electrode GT has a T-shape that protrudes from the scanning signal line GL in the row direction (downward in FIGS. 2 and 5). It is composed of shapes (branched into a T-shape). That is, the gate electrode GT is configured to extend substantially parallel to the video signal line DL. The gate electrode GT is configured to protrude to the formation region of each of the thin film transistors TPT1 to TFT3.
The respective gate electrodes GT of the thin film transistors TPT1 to TFT3 are integrally formed (as a common gate electrode) and are continuously formed on the same scanning signal line OL. The gate electrode GT is formed in such a way that a large step is not formed as much as possible in the formation region of the thin film transistor TPT.
It is composed of a single-layer first conductive film g1. The first conductive film g1 is
For example, a chromium (Cr) film formed by sputtering is used to have a thickness of about 1100 [layers]. As shown in FIGS. 2, 3, and 6, the gate electrode GT is formed to be thicker than the i-type semiconductor AS (as viewed from below) so as to completely cover it. Therefore, when a backlight such as a fluorescent lamp is attached below the lower transparent glass substrate SUBI, the gate electrode GT made of opaque chromium becomes a shadow, and the i-type semiconductor layer A
Since S is not illuminated by backlight light, the conductive phenomenon described above due to light irradiation, that is, the deterioration of the off-characteristics of the thin film transistor TPT is less likely to occur. Note that the original size of the gate t-pole GT is the minimum required size (including the alignment margin between the gate electrode and the source/drain electrode) to span between the source/drain electrodes SDI and SD2, and the width of the channel. The depth length that determines the width W is determined by the ratio to the distance (channel length) L between the source and drain electrodes, that is, the factor W/L that determines the mutual conductance g1. The size of the gate electrode in this liquid crystal display device is of course larger than the original size mentioned above. Considering only the function of the gate and light shielding of the gate electrode GT, the gate electrode GT and its wiring GL may be integrally formed in a single layer. In this case, aluminum containing silicon is used as an opaque conductive material. At), pure aluminum, aluminum containing palladium (Pd), silicon, aluminum containing titanium (T i ), silicon, aluminum containing copper (Cu), etc. can be selected. The scanning signal line GL is composed of a composite film consisting of a first conductive IERgl and a second conductive film g2 provided above it. The first conductive film g1 of this scanning signal line GL is
It is formed in the same manufacturing process as the first conductive film g1 of the gate electrode GT, and is configured integrally. Second conductive film g2
For example, an aluminum film formed by sputtering is used, and the film thickness is about 900 to 4000 [layers]. Second
The conductive film g2 is configured to reduce the resistance value of the scanning signal line GL and increase the signal transmission speed (writing characteristics of pixel information). Furthermore, the scan signal line GL is configured such that the width of the second conductive film g2 is smaller than the width of the first conductive film g1. That is, the scanning signal line GL is configured so that the step shape of its side wall can be made gentle, so that the surface of the insulating film GI on the upper layer thereof can be flattened. MA# film GI is thin film transistor TPTI~TFT3
It is used as a gate insulating film for each. Insulating film G
1 is formed in the upper layer of the gate electrode GT and the scanning signal line GL. The insulating film GI is formed using, for example, a silicon nitride film formed by plasma CVD, and has a thickness of about 3,500 [layers]. As described above, the surface of the insulating film GI is flattened in each of the formation regions of the thin film transistors TPTI to TFT3 and in the formation region of the scanning signal line GL. The i-type semiconductor layer AS is used as a channel forming region for each of the thin film transistors TPTI to TFT3 divided into a plurality of parts, as shown in detail in FIG. The i-type semiconductor layer AS of each of the plurality of divided thin film transistors TPTI to TFT3 is integrally formed within the pixel. In other words, a plurality of thin film transistors TPT into which a pixel is divided
Each of TFTs 1 to 3 is composed of an island region of one (common) i-type semiconductor layer AS. i-type semiconductor layer AS
The i-type semiconductor layer AS is formed of an amorphous silicon film or a polycrystalline silicon film, and is formed to a film thickness of about 2,000 μm.
, N4 is formed in the same plasma CVD apparatus without being exposed to the outside from the apparatus. Further, a P-doped N+ type semiconductor layer do (FIG. 3) for ohmic contact is similarly formed continuously to a thickness of about 300 [layers]. Thereafter, the lower transparent glass substrate SUB1 is taken out of the CVD apparatus, and an N+ type semiconductor layer cl is formed using photo processing technology.
The o- and i-type semiconductor layers AS are shown in FIGS. 2, 3, and 6.
As shown in the figure, it is patterned into independent islands. In this way, by integrally configuring the respective i-type semiconductor layers AS of the thin film transistors TFT1 to TFT3 divided into a plurality of pixels, the thin film transistors TPT1 to TFT3 are integrated.
The drain electrode SD2 common to each of the TFTs 3 is connected to the i-type semiconductor layer AS (actually, the thickness of the first conductive film g1, N+
The step corresponding to the sum of the film thickness of the type semiconductor layer dO and the film thickness of the i-type semiconductor layer As) is the drain electrode SD2.
Since it only crosses over once from the side toward the i-type semiconductor layer As side, the probability that the drain electrode SD2 is disconnected is low, and the probability that a point defect occurs can be reduced. In other words, in this liquid crystal display device, the point defects that occur within the pixel when the drain electrode SD2 crosses the step of the i-type semiconductor layer As can be reduced to one-third. Although the layout of this liquid crystal display device is different, when the video signal line DL directly crosses over the i-type semiconductor layer As and the video signal line DL in this overpassed portion is configured as the drain electrode SD2, the video signal @DL (drain Electrode SD
2) It is possible to reduce the probability of line defects occurring due to disconnection when the wire crosses the i-type semiconductor layer AS. In other words, the thin film transistor TPTI divided into a plurality of pixels
~By integrally configuring the respective i-type semiconductor layers AS of the TFT3, the video signal line DL (drain electrode SD2
) crosses the i-type semiconductor layer As only once (actually twice, at the beginning and end of the ride). As shown in detail in FIGS. 2 and 6, the i-type semiconductor layer AS is provided to extend between the scanning signal line OL and the video signal line DL (crossover section). ing. This extended i-type semiconductor layer AS is configured to reduce short circuits between the scanning signal line GL and the video signal line DL at the intersection. Thin film transistors TFT1 to TFT divided into a plurality of pixels
Each source electrode SDI and drain electrode S of FT3
D2 refers to six sources provided separately on the i-type semiconductor layer As, as shown in detail in FIGS. 2, 3, and 7 (plan views of main parts in a predetermined manufacturing process). Each of the electrode SD1 and the drain electrode SD2 is configured such that when the bias polarity of the circuit changes, the source and drain are interchanged in operation. In other words, the thin film transistor TPT is bidirectional like a FET. Each of the source electrode SDI and drain electrode SD2 is
The first conductive film di. It is constructed by sequentially overlapping a second conductive film d2 and a third conductive film d3. First conductive film d of sogos electrode SD1
1, the second conductive film d2 and the third conductive film d3 are formed in the same manufacturing process as the drain electrode SD2. The first conductive film d1 is a chromium film formed by sputtering,
It is formed to a film thickness of 500 to 1000 [people] (in this liquid crystal display device, the film thickness is about 600 [people]). The chromium film is
If the film thickness is made thicker, the stress will increase, so 20
The film should be formed within a range that does not exceed a film thickness of about 0.00 [persons]. The chromium film has good contact with the N+ type semiconductor layer dO. In the chromium film, the aluminum of the second conductive film d2 to be described later is N.
It forms a so-called Paris 7 layer that prevents diffusion into the +-type semiconductor layer d0. As the first conductive film d1, in addition to the chromium film, a high melting point metal (Mo, Ti.Ta.W) film, a high melting point metal silicide (MoSi2, TiSi., TaS
i,,WSi,) film. First conductive film d1
After patterning by photo processing, the N+ type semiconductor IWdO is removed using the same photo processing mask or using the first conductive film d1 as a mask. That is, the portion of the N+ type semiconductor layer do remaining on the i-type semiconductor layer As except for the first conductive film d1 is removed by the self-alignment. At this time y+
The i-type semiconductor layer do is etched so that its entire thickness is removed, so the i-type semiconductor layer AS is also slightly etched at its surface, but the degree of this can be controlled by the etching time. Thereafter, the second conductive film d2 is formed by aluminum sputtering to a thickness of 3000 to 5500 [layers] (in this liquid crystal display device, the film thickness is approximately 3,500 [layers]).
The aluminum film has less stress than the chromium film and can be formed to a thick film thickness, making it suitable for the source electrode SDI.
, is configured to reduce the resistance values of the drain electrode SD2 and the video signal MDL. The second conductive film d2 is configured to increase the operating speed of the thin film transistor TPT and the decoding transmission speed of the video signal 1iDL. In other words, the second conductive film d2 can improve the write characteristics of the pixel. Second conductive film d2
In addition to the aluminum film, an aluminum film containing silicon, palladium, titanium, copper, etc. as an additive may be used. After patterning the second conductive film d2 by photo processing technology, a third conductive film d3 is formed using a transparent conductive film (ITO: Nesa film) formed by sputtering.
~2400 [people] film thickness (in this liquid crystal display device, 12
It is formed with a thickness of 0.00 [film thickness comparable to that of a human body]. This third conductive film d3 constitutes the source electrode SDI, drain electrode SD2, and video signal line DI, and also constitutes the transparent pixel electrode I.
It is designed to configure the TO. The first conductive film d1 of the source electrode SDI, the first conductive film d1 of the drain electrode SD2
Each of these has a channel forming region side larger in size than the second conductive film d2 and the third conductive film d3 in the upper layer. In other words, the first conductive film d1 is
Even if mask misalignment occurs in the manufacturing process between the second conductive film d2 and the third conductive film d3, the second conductive film d2 and the third conductive film d3
and a larger size than the third conductive film d3 (the channel forming region side of each of the first to third conductive films d1 to d3 may be on-the-line). The first conductive film d1 of the source electrode SDI and the first conductive film d1 of the drain electrode SD2 are each configured to define the gate length L of the thin film transistor TPT. In this way, in the thin film transistors TPT1 to TFT3 divided into a plurality of pixels, the channel formation region side of the first conductive film d1 of each of the source electrode SD1 and drain electrode SD2 is connected to the second conductive film d2 and the third conductive film d3. By configuring the source electrode S with a larger size than the
D.I. Each first conductive film d of the drain electrode SD2
The gate length L of the thin film transistor TPT can be defined by the dimension between 1 and 1. Separation dimension between the first conductive films d1 (
The gate length) can be defined by the processing accuracy (patterning accuracy), so the thin film transistors TPT1~
The gate length L of each TFT3 can be made uniform. As described above, the source electrode SDI is connected to the transparent pixel electrode IT.
Connected to ○. The source electrode SDI is an i-type semiconductor! l! It is configured along the step shape of AS (step corresponding to the sum of the film thickness of the first conductive film g1, the film thickness of the N1 type semiconductor, IidO, and the film thickness of the i-type semiconductor layer AS). Specifically, the source electrode SDI includes a first conductive film d1 formed along the step shape of the i-type semiconductor layer AS;
A second conductive film d2 is formed on the top of the first conductive film d1 with a smaller size on the side connected to the transparent pixel electrode
A third conductive film d3 is connected to the conductive film d1. The first conductive film d1 of the source electrode SD1 has good adhesive strength 1 with the N" type semiconductor ldo, and is mainly configured as a barrier layer against diffused substances from the second conductive film d2. Source electrode SDI Since the chromium film of the first conductive film d1 cannot be formed thickly due to increased stress and cannot overcome the stepped shape of the i-type semiconductor layer AS, the second conductive film d2 cannot overcome the step shape of the i-type semiconductor layer AS. In other words, the second conductive film d2 improves the stepping force barrier by forming it thickly.
2 can be formed thickly, so it greatly contributes to reducing the resistance value of the source electrode SDI (the same applies to the drain electrode isD2 and the video signal line DL). Since the third conductive film d3 cannot overcome the step shape caused by the i-type semiconductor layer As of the second conductive film d2, by reducing the size of the second conductive film d2, the exposed first conductive film d1 configured to connect. The first conductive film d1 and the third conductive film d3 not only have good adhesiveness, but also have a small step shape at the connecting portion between them, so that they can be reliably connected. In this way, the source electrode SD of the thin film transistor TPT
I, a first conductive film d1 as a barrier layer formed at least along the i-type semiconductor layer As, and this first conductive film d
A second conductive film d2 is formed on top of the first conductive film d2 and has a smaller specific resistance value than the first conductive film d1 and a smaller size than the first conductive film d1. A third transparent pixel electrode made of ITO is formed on the exposed first conductive film d1.
By connecting the conductive film d3, the thin film transistor T
Since the PT and the transparent pixel electrode ITO can be reliably connected, point defects caused by disconnections can be reduced. Moreover, the source electrode SD1 can use the second conductive film d2 (aluminum film) having a low resistance value due to the barrier effect of the first conductive film d1, so that the resistance value can be reduced. The drain electrode SD2 is configured integrally with the video signal line DL, and is formed in the same manufacturing process. The drain electrode SD2 has an L-shape that protrudes in the column direction intersecting the video signal line DL. That is, the respective drain electrodes SD2 of the thin film transistors TFTL to TFT3 divided into a plurality of pixels are connected to the same video signal line DL. The transparent pixel electrode ITO is provided for each pixel and constitutes one of the pixel electrodes of the liquid crystal display section. The transparent pixel electrode ITO is divided into three transparent pixel electrodes (divided transparent pixel electrodes) IT01, ITO2, and ITO3&: corresponding to each of the thin film transistors TPTI to TFT3 divided into a plurality of pixels. The transparent pixel electrode ITOI is connected to the source electrode SDI of the thin film transistor TFT1. The transparent pixel electrode ITO2 is connected to the source electrode SDI of the thin film transistor TFT2, and the transparent pixel electrode ITO3 is connected to the source electrode SDI of the thin film transistor TFT3. Each of the transparent pixel electrodes ITOI to ITO3 is formed to have substantially the same size as each of the thin film transistors TPT1 to TFT3. Transparent pixel electrode ITOI~. Each of the ITO3 has the i-type semiconductor layer AS of the thin film transistors TPTI to TFT3 integrally formed (the divided thin film transistors TPT are arranged in a concentrated manner), so it is L-shaped. It consists of In this way, the thin film transistor TPT of the pixel arranged in the intersection area of two adjacent scanning signal lines GL and two adjacent video signal lines DL is
By dividing the pixel into PTI to TFT3 and connecting each of the plurality of divided transparent pixel electrodes ITOI to ITO3 to each of the plurality of divided thin film transistors TF'I:1 to TFT3, a divided part of the pixel (for example, , thin film transistor TFTI) becomes a point defect, and the pixel as a whole is not a point defect (thin film transistors TFT2 and TFT3 are not point defects).
It is possible to reduce point defects for the entire pixel. Furthermore, since some of the point defects in which the pixel is divided are smaller than the entire area of the pixel (in the case of this liquid crystal display device, the area is one-third of the pixel), the point defects can be made difficult to see. Can be done. Further, the divided transparent pixel electrodes IT01 to I of the pixel
By configuring each TO3 to have substantially the same size, the area of point defects within a pixel can be made uniform. Furthermore, the divided transparent pixel electrodes ITO1 to ITO of the pixel are
By configuring each of the TO3 to have substantially the same size, each liquid crystal capacitor (Cpix) constituted by each of the transparent pixel electrodes ITOI to ITO3 and the common transparent pixel electrode IT○ and the transparent pixel electrode ITOI to I
Transparent pixel electrode ITOI added to each of TO3~
The overlap capacitance (Cgs) caused by the overlap of ITO3 and gate electrode GT can be made uniform. In other words, since each of the transparent pixel electrodes ITO1 to ITO3 can have a uniform liquid crystal capacitance and superimposed capacitance,
The DC component applied to the liquid crystal molecules of the liquid crystal LC due to this superimposed capacitance can be made uniform, and if a method of canceling this DC component is adopted, the DC component applied to the liquid crystal of each pixel will vary. can be made smaller. A protective film PSVI is provided over the thin film transistor TPT and the transparent pixel electrode ITo. The protective film PSVI is formed mainly to protect the thin film transistor TPT from moisture, etc., and a film having high transparency and good moisture resistance is used. The protective film PSVI is formed of a silicon oxide film or a silicon nitride film formed by plasma CVD, for example.
The film thickness is approximately 8,000 to 11,000 [people] in this liquid crystal display device. A shielding film LS is provided above the protective film PSVI on the thin film transistor TFT to prevent external light from entering the i-type semiconductor layer AS used as a channel formation region. As shown in FIG. 2, the shielding film LS is configured within a region surrounded by a dotted line. The shielding film LS is formed of, for example, an aluminum film, a chromium film, or the like, which has a high shielding property against light, and is formed by sputtering to a thickness of about 1000 [layers]. Therefore, the common semiconductor layer AS of the thin film transistors TPTI to TFT3 is sandwiched between the upper and lower light shielding films LS and the thick gate electrode GT, and is not exposed to external natural light or backlight light. The light-shielding film LS and the gate electrode GT are thicker than the semiconductor layer As and are formed to have a similar shape, and their sizes are considered to be approximately the same (
In the figure, the gate electrode GT is drawn smaller than the light shielding film LS so that the boundary line can be seen). In addition, it is also possible to attach the backlight to the upper transparent glass substrate SUBz side and make the lower transparent glass substrate SUB1 the observation side (externally exposed side). In this case, the light shielding film L
S acts as a backlight light shield, and the gate electrode GT acts as a natural light shield. The thin film transistor TPT is configured such that when a positive bias is applied to the gate electrode GT, the channel resistance between the source and drain becomes small, and when the bias is reduced to zero, the channel resistance becomes large. That is, the thin film transistor TPT is configured to control the voltage applied to the transparent pixel electrode ITO. The liquid crystal LC is arranged in a space formed between a lower transparent glass substrate SUBI and an upper transparent glass substrate SUB2.
It is defined and enclosed in a lower alignment film ○Rll and an upper alignment film ○RI2 that set the orientation of liquid crystal molecules. The lower alignment film ○RII is formed on the protective film psvi on the lower transparent glass substrate SUBI side. On the inner surface (liquid crystal side) of the upper transparent glass substrate SUB2, a color filter FIL, a protective film PSv2, a common transparent pixel electrode (COM) ITO, and the upper alignment film ORI are provided.
2 are sequentially stacked. The common transparent pixel electrode ITO is connected to the lower transparent glass substrate S.
It faces the transparent pixel electrode ITO provided for each pixel on the UBI side, and is configured integrally with another adjacent common transparent pixel electrode IT○. The configuration is such that a common voltage Vcow is applied to this common transparent pixel electrode ITO.
The common voltage Vcow is an intermediate potential between the low-level driving voltage Vdwin and the high-level driving voltage Vdmax applied to the video signal line DL. The color filter FIL is configured by coloring a dyed base material made of a resin material such as acrylic resin with a dye. The color filter FIL is arranged for each pixel at a position facing the pixel, and is colored differently. That is, like a pixel, the color filter F I L is configured within the intersection area of two adjacent scanning signal lines GL and two adjacent video signal lines DL. Each pixel is divided into a plurality of parts within each predetermined color filter of the color filter FIL. Color filter FIL can be formed as follows. First, a dyed base material is formed on the surface of the upper transparent glass substrate SUB2, and the dyed base material other than the red filter forming area is removed using photolithography technology. After this, the dyed base material is dyed with red dye, fixed treatment is applied, and red filter R
form. Next, a green filter G and a blue filter B are sequentially formed by performing similar steps. In this way, by forming each color filter of the color filter FIL in the intersection area facing each pixel, the scanning signal line OL is formed between each color filter of the color filter FIL.
．． Since each of the video signal lines DL exists, it is possible to secure an alignment margin between each pixel and each color filter of the color filter FIL (increase the alignment margin) by an amount corresponding to the presence of the video signal lines DL. Furthermore, when forming each color filter of the color filter FIL, it is possible to secure alignment margin dimensions between different color filters. That is, in this liquid crystal display device, pixels are formed within the intersection area of two adjacent scanning signal lines GL and two adjacent video signal lines DL. By dividing this pixel into a plurality of parts and forming each color filter of the color filter FIL at a position facing this pixel, the above-mentioned point defects can be reduced, and the alignment margin between each pixel and each color filter can be reduced. can be ensured. The protective film PSV2 is provided to prevent the dyes used to dye the color filter FIL into different colors from leaking into the liquid crystal LC. The protective film PSV2 is made of a transparent resin material such as acrylic resin or epoxy resin. This liquid crystal display device has a lower transparent glass substrate SUBl side,
It is assembled by forming each layer on the upper transparent glass substrate SUB2 side separately, then overlapping the lower transparent glass substrate SUB1 and the upper transparent glass substrate SUB2, and sealing the liquid crystal LC between them. As shown in FIG. 4, a plurality of pixels of the liquid crystal display section are arranged in the same column direction as the direction in which the scanning signal line OL extends, and are arranged in pixel columns X i, X2, X,, X,,...・Constitutes each of the following. Each pixel column Xe,X2,X,,X
Each pixel of 4,... is a thin film transistor TF.
TI~TFT3 and transparent pixel electrode IT01~ITO3
The layout positions are the same. That is, in each pixel of the pixel rows X1, X, . Each pixel in the next pixel column x, , X4, . . . in the row direction of each pixel column Xi, X, . . . It consists of pixels arranged line-symmetrically with respect to the video signal line DL. That is, pixel rows x,,X. ,...
Each pixel of
The placement position of T3 is on the right side, transparent pixel electrode IT○1~ITO
3 is arranged on the left side. And pixel row X
,, X4,... are arranged in the pixel rows
Each pixel of X,... is shifted (shifted) by half a pixel in the column direction. In other words,
If each pixel interval of the pixel column X is 1.0 (1.0 pitch), then the next pixel column 5 pixel interval (0.5
pitch) is off. The video signal line DL, which extends in the row direction between each pixel, is connected by a half pixel interval (
0.5 pitch) is configured to extend in the row direction. In this way, in the liquid crystal display section, the thin film transistor T
A pixel column X is formed by arranging a plurality of pixels with the same PT and transparent pixel electrode ITO in the column direction, and the next pixel column X5i of the pixel column By configuring pixels arranged symmetrically with respect to line DL, and moving the next pixel column by half a pixel with respect to the previous pixel column, it is possible to As shown in the plan view of main parts in the combined state,
A pixel on which a predetermined color filter is formed in the previous pixel row (the pixel in column X4 where the red filter R is formed) can be separated by 1.5 pixel intervals (1.5 pitch). In other words, the pixels in the previous pixel row It is now possible to construct an RGB triangular structure. The RGB triangular arrangement structure of the color filter FIL can improve the mixing of each color, which improves the resolution of color images. can be improved. Further, since the video signal line DL extends in the column direction by only half a pixel interval between each pixel column X, it does not intersect with the adjacent video signal line DL. Therefore, the video compensation line D
It is possible to eliminate the routing of L and reduce its occupied area, and it is also possible to eliminate the detour of the video signal line DL and eliminate the multilayer wiring structure. The circuit configuration of this liquid crystal display section is shown in FIG. 9 (equivalent circuit diagram of the liquid crystal display section). X i G , X i. shown in FIG. + I G , - is,
The video signal IIADL is connected to the pixel where the green filter G is formed. X i B , X i + 1
B, - are video signal lines DL connected to the pixels in which the blue filter B is formed. Xi+IR, Xi+2R,
... are video signal lines DL connected to the pixels in which the red filter R is formed. These video signal lines DL are
Selected by the video signal cantering circuit. Yi is a scanning signal line GL that selects the pixel column X shown in FIGS. 4 and 8. Similarly, each of Yi+1, Yi+2, . . . is a scanning signal line OL that selects each of the pixel columns X, , X, . These scanning borrow lines GL are connected to a vertical scanning circuit. The center part of FIG. 3 shows the cross section of one pixel part, while the left side shows the cross section of the left edge part of the lower transparent glass substrate SUBI and the upper transparent glass substrate SUB2 where the external lead wiring is present. It shows. The right side shows a cross section of the right side portion of the transparent glass substrates SUBI and SUE2 where no external lead wiring is present. The sealing materials SL shown on the left and right sides of FIG. 3 are as follows:
It is configured to seal the liquid crystal LC, and is formed along the entire edges of the transparent glass substrates SUBI and StJB2 except for the liquid crystal sealing opening (not shown). The sealing material SL is made of, for example, epoxy resin. The common transparent pixel electrode ITO on the upper transparent glass substrate SUBQ side is . At least in one place, it is connected to an external lead wiring formed on the lower transparent glass substrate SUBI side by means of a silver paste material SIL. This external lead wiring includes the gate electrode GT, source electrode SDI.
It is formed in the same manufacturing process as each of the drain electrodes SD2. The alignment films ORII and ORI2, transparent pixel electrode IT
o. Common transparent pixel electrode IT○, protective film PSVI and P
'S V 2, each layer of the insulating film G process. It is formed inside the sealing material SL. The polarizing plate POL is formed on the outer surface of each of the lower transparent glass substrate SUBI and the upper transparent glass substrate SUB2. FIG. 10 is a cross-sectional view of the main part of the pixel and the periphery of the seal part of the liquid crystal display part of another active matrix color liquid crystal display device to which the present invention is applied, and FIG.
0 is a plan view showing one pixel of the liquid crystal display section of the liquid crystal display device shown in FIG. A plan view of a main part of a liquid crystal display section in which a plurality of pixels are arranged, FIGS. 14 to 16 are plan views of main parts in a predetermined manufacturing process of the pixel shown in FIG. 11, and FIG. This is a plan view of the main parts in a state in which color filters are superimposed. In this liquid crystal display device, it is possible to improve the aperture ratio of each pixel in the liquid crystal display section, reduce the direct current component applied to the liquid crystal, reduce point defects in the liquid crystal display section, and reduce black unevenness. can. In this liquid crystal display device, as shown in FIG. 11, the i-type semiconductor layer AS in each pixel of the liquid crystal display section is replaced by a thin film transistor T
It is divided and configured for each FTI to TFT3. In other words, the thin film transistor TPTI divided into a plurality of pixels
Each of the TFTs 3 is composed of an independent i-type semiconductor/IAs island region. Further, each of the transparent pixel electrodes ITO1 to TO3 connected to the thin film transistors TPT1 to TFT3 is connected to the scanning signal line GL of the next stage in the row direction on the side opposite to the side connected to the thin film transistors TPTI to TFT3. They are superimposed. In this superposition, each of the transparent pixel electrodes ITOI to IT○3 is used as one electrode,
A storage capacitance element (electrostatic capacitance element) Cadd is configured with the next stage scanning signal line GL as the other electrode. The dielectric film of this storage capacitor element C add is composed of the same layer as the insulating film GI used as the gate insulating film of the thin film transistor TPT. The gate electrode GT is formed to be thicker than the i-type semiconductor layer AS as in the liquid crystal display device shown in FIG.
is formed for each independent i-type semiconductor layer AS, so a thick pattern is formed for each thin film transistor TPT. Furthermore, the scanning signal line GL. of the upper transparent glass substrate SUB2.
Video signal, I&DL. Since the black matrix pattern BM is provided in the portion corresponding to the Li film transistor TFT, the outline of the pixel becomes clear, improving contrast and preventing external natural light from hitting the thin film transistor TPT. can. An equivalent circuit of the pixel shown in FIG. 11 is shown in FIG. 18 (equivalent circuit diagram). In FIG. 18, as before, C
gs is a superimposed capacitance formed by the gate electrode GT and source electrode SDI of the thin film transistor TPT. The dielectric film of the superposed capacitance Cgs is an insulating film GI. C
pix is the liquid crystal capacitance formed between the transparent pixel electrode ITO (PIX) and the common transparent pixel electrode ITO (COM). The dielectric films of the liquid crystal capacitor C pix are the liquid crystal LC, the protective film psv1, and the alignment films ORII and ORI2. V
lc is the midpoint potential. The storage capacitance element C add is a thin film transistor TP
When T switches, the midpoint potential (pixel electrode potential)
It works to reduce the influence of gate potential change ΔVg on Vlc. This situation can be expressed as the following formula. ΔV lc= ((Cgs/ (Cgs+Cadd+C
pix)) XΔVg Here, ΔVle represents the change in midpoint potential due to ΔVg. This change ΔVlc causes a DC component applied to the liquid crystal, but the storage capacitance element C a
The larger the storage capacity of dd, the smaller its value can be. Furthermore, the storage capacitor element C add also has the effect of lengthening the discharge time, so that video information is stored for a long time after the thin film transistor TPT is turned off. Reducing the DC component applied to the liquid crystal LC can improve the life of the liquid crystal LC and reduce so-called burn-in, in which the previous image remains when switching between liquid crystal display screens. As mentioned above, since the gate electrode GT is made large enough to completely cover the semiconductor layer AS, the overlapping area with the source/drain electrodes SD1 and SD2 increases, and therefore the parasitic capacitance Cgs increases, and the midpoint potential v1c increases. This has the opposite effect of becoming more susceptible to the influence of the gate (scanning) signal Vg. However, this disadvantage can be overcome by providing a storage capacitor element C add. Further, in a liquid crystal display device having pixels in an intersection area of two scanning signal lines GL and two video signal lines DL, one scanning signal line OL of the two scanning signal lines OL
The thin film transistor TPT of the pixel selected by . is divided into a plurality of parts. These divided thin film transistors TPTI~T
A transparent pixel electrode ITO divided into a plurality of parts (ITOI to ITO3) is connected to each of the FT3, and each of the divided transparent pixel electrodes IT○1 to ITO3 is connected to the pixel electrode ITO as one electrode. By using the other scanning signal IGL of the scanning signal lines GL as a capacitive electrode line and configuring the storage capacitive element C add as the other electrode, a divided part of the pixel is caused to have a point defect as described above. Since the pixel as a whole is not a point defect, it is possible to reduce the point defect of the pixel, and it is also possible to reduce the direct current component applied to the liquid crystal LC by the storage capacitor element C add. The lifespan of LC can be improved. In particular, by dividing the pixel, the gate electrode GT of the thin film transistor TPT
It is possible to reduce point defects caused by short circuits between the source electrode SDI or the drain electrode SD2, and to reduce the contact between each of the transparent pixel electrodes rTO1 to ■TO3 and the other electrode (capacitor electrode line) of the storage capacitor element Cadd. Point defects caused by short circuits can be reduced. The number of point defects on the latter side is reduced to one-third in the case of this liquid crystal display device. As a result,
Since some of the point defects in which the pixel is divided are smaller than the entire area of the pixel, the point defects can be made difficult to see. The storage capacitance of the storage capacitance element C add is 4 to 8 times (4
・Cpix<Cadd< 8 ・Cpix), 8 to 32 times the superposition capacitance Cgs (8・Cgs<Cad
d<32・Cgs). Also, the scanning signal line OL is connected to the first s1111f! It is composed of a composite film in which a second conductive film (aluminum film) g2 is superimposed on (chromium film) gl, and the other electrode of the storage capacitor element C add, that is, the branched part of the capacitor electrode line is connected to the composite film. By configuring the single-layer film made of the first conductive lIg1, it is possible to reduce the resistance value of the scanning signal line GL and improve the writing characteristics. Since one electrode (transparent pixel electrode ITo) of the storage capacitor element Cadd can be reliably bonded onto the insulating film GI along the step portion based on the base, disconnection of one electrode of the storage capacitor element Cadd can be reduced. Can be done. Further, by configuring the other electrode of the storage capacitor element C add with the single-layer first conductive film g1 and not comprising the second conductive film g2 which is an aluminum film, the retention capacitor element C add due to hillocks of the aluminum film can be This can prevent short circuits between the other electrode and one electrode. Similar to the source electrode SDi, a portion between each of the transparent pixel electrodes ITOI to IT○3 overlapped to form the storage capacitor element C add and the branched portion of the capacitor electrode line has a To prevent the transparent pixel electrode ITO from breaking when climbing over the step shape of the branched part,
An island region made up of a first conductive film d1 and a second conductive film d2 is provided. This island area is a transparent pixel electrode IT
Make it as small as possible so as not to reduce the area of ○<'n area). In this way, between one electrode of the storage capacitor element C add and the insulating film GT used as its dielectric film,
A base layer is formed of a first conductive film d1 and a second conductive film d2 formed on the first conductive film d1, which has a lower specific resistance value and a smaller size than the first conductive film d1.
By connecting the third conductive layer 11id3) to the first conductive film d1 exposed from the second conductive film d2 of the base layer, the storage capacitor element C add can be reliably connected along the stepped portion based on the other electrode of the storage capacitor element C add. Since one electrode of C add can be bonded, disconnection of one electrode of storage capacitor element C add can be reduced. A storage capacitor element C ad is provided on the transparent pixel electrode ITO of the pixel.
The liquid crystal display section of the liquid crystal display device provided with d is constructed as shown in FIG. 20 (equivalent circuit diagram showing the liquid crystal display section). The liquid crystal display section is composed of repeating unit basic patterns including pixels, scanning signal lines GL, and video signal lines DL. As shown in FIG. 20, the final stage scanning signal line GL (or first stage scanning signal line OL) used as a capacitor electrode line is connected to a common transparent pixel electrode (Vc'o+m) I
Connect to To. The common transparent pixel electrode ITO is the third
As shown in the figure, the periphery of the liquid crystal display device is connected to external lead wiring by silver paste material SL'. Furthermore, some of the conductive layers (gl and g2) of this external lead wiring are constructed in the same manufacturing process as the scanning signal line OL. As a result, the final stage scanning signal line OL (capacitive electrode line) can be easily connected to the common transparent pixel electrode ITO. In this way, by connecting the final stage of the capacitive electrode line to the common transparent pixel electrode (Vcom) ITO of the pixel, the final stage of the capacitive electrode line is integrated with a part of the conductive layer of the external wiring. Moreover, since the common transparent pixel electrode ITO is connected to the external lead wiring, the final stage capacitor electrode line can be connected to the common transparent pixel electrode IT with a simple configuration.
Can be connected to O. In addition, the liquid crystal display device is based on the DC cancellation method (DC cancellation method) described in Japanese Patent Application No. 62-95125 previously filed by the applicant of the present application, as shown in FIG. 19 (time chart). By controlling the drive voltage of the scanning signal line DL, it is possible to further reduce the DC component applied to the liquid crystal LC. In FIG. 19, vi is the drive voltage of an arbitrary scanning signal line GL, Vi+1 is the drive voltage of the next scanning signal line OL, and aVee is the low-level drive voltage Vdmjn applied to the scanning signal line GL.
．． Vd d is a high-level fighting voltage V d wax applied to the scanning signal line OL. Each time t=1, ~t
, the voltage changes Δvi to Δv4 of the midpoint potential Vlc (see Fig. 18) are the total capacitance of the pixels (Cgs+
If Cpix+Cadd) is C, then the following equation is obtained. ΔV,=-(Cgs/C)・V2 ΔVa=+(Cgs/C) {V1+v2)-(Cadd
/ C)・V 2 ΔV s ” − (C gs/C )・V 1+
(Cadd/C) {V 1 + V 2 )ΔV4
=: - (Cadd/C)・V 1 Here, if the drive voltage applied to the scanning signal line GL is sufficient (the following

〔Effect of the invention〕

As explained above, in the liquid crystal display device according to the present invention, since the inter-pixel division light-shielding film made of an opaque metal film is formed so as to close the gap between the pixel electrodes, the gap between the divided pixel electrodes is Contrast is good because light can be prevented from leaking. Also,
Since the inter-pixel division light-shielding film is connected to the electrode of the storage capacitor and is formed parallel to the scanning signal line, the resistance of the scanning signal line can be reduced, so that it becomes impossible to write signals to the pixel electrode. There is no. In this way, the effects of this invention are remarkable.

[Brief explanation of the drawing]

FIG. 1 is a plan view showing one pixel of a liquid crystal display section of an active matrix color liquid crystal display device according to the present invention, and FIG. 2 is a plan view showing a liquid crystal display of an active matrix color liquid crystal display device to which the present invention is applied. FIG. 3 is a plan view of the main part showing one pixel of the display section, FIG. 3 is a cross-sectional view of the part taken along the nm cutting line in FIG. 2 and the area around the seal part, and FIG. Main part plan view of the arranged liquid crystal display section, 5th
7 are plan views of essential parts of the pixel shown in FIG. 2 in a predetermined manufacturing process, FIG. 8 is a plan view of essential parts in a state where the pixel shown in FIG. The figure is an equivalent circuit diagram showing the liquid crystal display section of the above-mentioned active matrix color liquid crystal display device, and FIG. 10 shows the pixels of the liquid crystal display section of another active matrix color liquid crystal display device to which the present invention is applied. 11 is a plan view showing one pixel of the liquid crystal display section of the liquid crystal display device shown in FIG. 10, and FIG. 12 is a cross-sectional view taken along the line A-A in FIG. 11. Cross-sectional view of the part cut at, 1st
3 is a plan view of a main part of a liquid crystal display section in which a plurality of images shown in FIG. 11 are arranged, FIGS. The figure is the first
Figure 3 is a plan view of the main parts of the pixel and color filter in a superimposed state, Figure 18 is an equivalent circuit diagram of the pixel shown in Figure 11, and Figure 19 is a scanning signal based on DC cancellation method 1. Time chart showing the glare voltage of the line, Figure 20,
21 is an equivalent circuit diagram showing the liquid crystal display section of the actenob-matrix color liquid crystal display device shown in FIG. 13, and FIG. 22 is an equivalent circuit diagram of another active matrix color liquid crystal display device according to the present invention. FIG. 3 is a plan view showing one pixel of a liquid crystal display section. SUB: Transparent glass substrate OL: Scanning signal line DL: Video signal line GI: Insulating film GT: Gate electrode AS: i-type semiconductor layer SD: Source electrode or drain Electrode psv...
Protective film LS...Light shielding film LC...Liquid crystal TPT...Thin film transistor ITO (COM)...Transparent pixel electrodes g1 to g2, d
1 to d3... Conductive film C add... Holding capacitor element Cgs... Superimposed capacitance Cpj. x...Liquid crystal capacity BM...Black matrix pattern gll...
Opaque metal film gl2... Transparent conductive film sp... Pixel division light shielding film Figure 18 VLc tl t2 t3 t4

Claims (1)

[Claims] 1. An active matrix type liquid crystal display in which a thin film transistor and a pixel electrode are used as one component of a pixel, the pixel electrode is divided into a plurality of parts, and the electrode of a storage capacitor element connected to a scanning signal line is made of a transparent conductive film. In the apparatus, an inter-pixel division light-shielding film formed to close the gap between the pixel electrodes, connected to the electrode of the storage capacitor element, parallel to the scanning signal line, and made of an opaque metal film is provided. Characteristic liquid crystal display device.