JPH02234129A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To prevent display quality from being deteriorated heavily even if one of divided pixel electrodes is not actuated by making the area of a 2nd divided pixel electrode smaller than that of a 1st divided pixel electrode. CONSTITUTION:The area of the 2nd divided pixel electrode ITO 12 whose length of end part opposed to an adjacent video signal line DL is longer than that of the 1st divided pixel electrode ITO 11 is made smaller than the area of the 1st electrode ITO 11. Even when the 2nd divided pixel electrode ITO 12 is not actuated because of the short circuit of the 2nd electrode ITO 12 and the adjacent video signal line DL, the point defect of the divided pixel having the 2nd electrode ITO 12 is not conspicuous since the area of the 2nd electrode ITO 12 is smaller than that of the 1st electrode ITO 11. Thus, the display quality is prevented from being deteriorated heavily even if the 2nd divided pixel electrode ITO 12 is not actuated.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a liquid crystal display device such as an active matrix type color liquid crystal display device in which a pixel includes a thin film transistor and a pixel electrode. [Prior Art] In a conventional active matrix type liquid crystal display device, one pixel electrode is divided into a plurality of divided pixel electrodes, and each valley is The areas of the divided pixel electrodes are made equal. In this liquid crystal display device, one of the divided pixel electrodes
Even if one of the divided pixel electrodes does not operate, the remaining divided pixel electrodes operate, so the pixel as a whole is no longer a point defect, improving manufacturing yield.

[Problem to be solved by the invention]

However, in such a liquid crystal display device, each divided pixel electrode has the same area, so if one of the divided pixel electrodes becomes inoperable, the point defect in that divided pixel becomes noticeable, resulting in a significant drop in display quality. ．． This invention was made to solve the above-mentioned problems, and its purpose is to provide a liquid crystal display device in which the display quality does not deteriorate significantly even if one of the divided pixel electrodes becomes inoperable. do. [Means for Solving the Problems] In order to achieve this object, in the present invention, a thin film transistor and a pixel electrode are used as constituent elements of a pixel, and the pixel electrode is divided into a plurality of divided pixel electrodes. In this type of liquid crystal display device, the area of a second divided pixel electrode whose end facing an adjacent video signal line is longer than the first divided pixel electrode is smaller than the area of the first divided pixel electrode. do. [Operation] In this liquid crystal display device, the second divided pixel electrode and the adjacent video signal line are short-circuited. Even if the second divided pixel electrode does not operate, the area of the second divided pixel electrode is smaller than the area of the first divided pixel electrode, so point defects in the divided pixel having the second divided pixel electrode are not noticeable. .

〔Example〕

One pixel of the liquid crystal display section of an active matrix color liquid crystal display device to which this invention is applied is shown in FIG. 2 (main part plan view), and a cross section taken along the cutting line This is shown in Figure 3. Furthermore, FIG. 4 (plan view of main part) shows the main part of the liquid crystal display section in which a plurality of pixels shown in FIG. 2 are arranged. As shown in FIGS. 2 to 4, the liquid crystal display device includes a pixel having a thin film transistor TPT and a transparent pixel electrode IT○ on the inner surface (liquid crystal side) of a lower transparent glass substrate SUBI. Lower transparent glass substrate SUBI
For example, 1. It is constructed with a thickness of about 1 mm. Each pixel is connected to two adjacent scanning signal lines (gate signal lines or horizontal signal lines) GL and two adjacent video signal lines (
Drain signal line or vertical signal, w! ) is placed within the intersection area with DL (inside the area surrounded by four signal lines). As shown in FIGS. 2 and 4, the scanning signal lines GL extend in the column direction, and a plurality of scanning signal lines GL are arranged in the row direction.

The video signal lines DL extend in the row direction, and a plurality of video signal lines DL are arranged in the column direction. The thin film transistor TPT of each pixel has three
It is divided into two (plurality) of thin film transistors (divided thin film transistors) TFTI, TPT2, and TFT3. Each of the thin film transistors TPTI to TFT3 has substantially the same size (channel length and width are the same). Each of the divided thin film transistors TPT1 to TFT3 mainly has a gate electrode G.
T, insulating film GI. Type I (intrinsic,
Silicon (not doped with conductivity type determining impurities)
i) an i-type semiconductor layer AS consisting of a pair of source electrodes SD;
I and a drain electrode SD2. In addition,
The source and drain are originally determined by the bias polarity between them, and in this liquid crystal display circuit, the polarity is reversed during operation, so it should be understood that the source and drain are interchanged during operation. However, in the following explanation, for convenience, one side will be fixed as the source and the other as the drain. As shown in detail in FIG. 5 (a plan view of the main part in a predetermined manufacturing process), the gate electrode GT has a T-shape that protrudes from the scanning signal line GL in the row direction (downward in FIGS. 2 and 5). It is composed of shapes (branched into a T-shape). That is, the gate electrode GT is configured to extend substantially parallel to the video signal line DL. The gate electrode GT is configured to protrude to the formation region of each of the thin film transistors TPTI to TFT3.
The respective gate electrodes GT of the thin film transistors TPTI to TFT3 are integrally formed (as a common gate electrode) and are continuously formed on the same scanning signal line GL. The gate electrode GT is formed in such a way that a large step is not formed as much as possible in the formation region of the thin film transistor TPT.
It is composed of a single-layer first conductive film g1. The first conductive film g1 is
For example, a chromium (Cr) film formed by sputtering is used to have a thickness of about 1100 [people].

As shown in FIGS. 2, 3, and 6, the gate electrode GT is formed to be thicker than the i-type semiconductor layer AS (as viewed from below) so as to completely cover the i-type semiconductor layer AS. Therefore, when a backlight such as a fluorescent lamp is attached below the lower transparent glass substrate SUBI, the gate electrode GT made of opaque chromium becomes a shadow, and the type 1 semiconductor layer A
S is not exposed to pack light light, and the aforementioned conductive phenomenon due to light irradiation, that is, the deterioration of the off-characteristics of the thin film transistor TPT, is less likely to occur. The original size of the gate electrode GT is the minimum width required to span the source/drain electrodes SD1 and SDZ (including the alignment margin between the gate electrode and the source/drain electrodes), and the width of the channel lw. The depth length that determines the ratio to the distance (channel length) L between the source and drain electrodes, that is, the factor W/L that determines the mutual conductance gIl1, is determined by the ratio. The size of the gate electrode in this liquid crystal display device is of course larger than the original size mentioned above.

Considering only the function of the gate and light shielding of the gate electrode GT, the gate electrode GT and its wiring GL may be integrally formed in a single layer. In this case, aluminum containing silicon is used as an opaque conductive material. Al). Pure aluminum, aluminum containing palladium (Pd), silicon, aluminum containing titanium (Ti), silicon, aluminum containing copper (Cu), etc. can be selected.

The scanning signal line OL is the first conductor 1! It is composed of a composite film consisting of a film g1 and a second conductive film g2 provided on top of the film g1. The first conductive film g1 of the scanning signal line GL is formed in the same manufacturing process as the first conductive film g1 of the gate electrode GT, and is configured integrally with the first conductive film g1 of the gate electrode GT. The second conductive film g2 is, for example, an aluminum film formed by sputtering,
It is formed with a film thickness of about 900 to 4000 [people]. The second conductive film g2 is connected to the scanning signal line GT. , reduce the resistance of
The structure is such that the signal transmission speed can be increased (writing characteristics of pixel information).

Also. In the scanning signal line GL, the width of the second conductive film g2 is smaller than the width of the first conductive fit film g1. In other words, since the scanning signal IGL can have a gentle stepped shape on its side wall, the upper insulating film G
It is constructed so that the surface of I can be flattened. The insulating film GI is a thin film transistor 'l'' F T 1~
It is used as a gate insulating film for each TFT3.

The insulating film GI is formed on the gate electrode GT and the scanning signal line GL. For example, a silicon nitride film formed by plasma CVD is used as the insulating film GI.
It is formed with a degree of contemplation. As mentioned above, the insulating film GI
The surface is flattened in the formation region of each of the five thin film transistors TPT1 to TFT3 and in the formation region of the scanning signal line OL.

The i-type semiconductor layer AS is used as a channel forming region for each of the thin film transistors TPT1 to TFT3 divided into a plurality of parts, as shown in detail in FIG. 6 (a plan view of a main part in a predetermined manufacturing process). The i-type semiconductors and IIAS of each of the plurality of divided thin film transistors TF''T1 to TFT3 are integrally configured within the pixel. That is, each of the plurality of divided thin film transistors TPT1 to TFT3 of the pixel is configured as one (common) i
It is composed of an island region of a type semiconductor layer AS. The i-type semiconductor/ilAs is formed of a non-quality silicon film or a polycrystalline silicon film, and is formed to have a thickness of about 2000 [layers].

This i-type semiconductor layer AS is made of Si by changing the components of the supplied gas.
, N4, and is formed in the same plasma CVD apparatus without being exposed to the outside from the apparatus. Further, a P-doped N+ type semiconductor layer do (FIG. 3) for ohmic contact is similarly formed continuously to a thickness of about 300 [layers]. Thereafter, the lower transparent glass substrate SUBI is taken out from the CVD apparatus, and an N+ type semiconductor layer d.
The 0 and i type semiconductor layers AS are patterned into independent islands as shown in FIGS. 2, 3 and 6. In this way, by integrally configuring the respective i-type semiconductor layers As of the thin film transistors TPTI to TFT3 divided into a plurality of pixels, the thin film transistors TPTI to
The drain electrode SD2 common to each of the TFTs 3 is connected to the type 1 semiconductor layer AS (actually, the thickness of the first conductive film g1,
A step corresponding to the sum of the thickness of the N+ type semiconductor layer dO and the thickness of the i type semiconductor layer
Since it only crosses over once from the D2 side toward the i-type semiconductor layer AS side, the probability that the drain electrode SD2 is disconnected is low, and the probability that a point defect occurs can be reduced.

That is, in this liquid crystal display device, the point defects that occur within the pixel when the drain electrode SD2 crosses the step of the i-type semiconductor layer As can be reduced to one-third. Although the layout of this liquid crystal display device is different, when the video signal line DL directly crosses over the i-type semiconductor layer AS and the video signal line DL in this overpassed portion is configured as the drain electrode SD2, the video signal line DL (drain Electrode SD
2) It is possible to reduce the probability of line defects occurring due to disconnection when the wire crosses the i-type semiconductor layer AS. In other words, the thin film transistor TPTI divided into a plurality of pixels
~By integrally configuring the respective i-type semiconductor layers AS of the TFT3, the video signal line DL (drain electrode SD2
) crosses the i-type semiconductor layer AS only once (actually twice, at the beginning and end of the ride). As shown in detail in FIGS. 2 and 6, the i-type semiconductor layer AS is provided to extend between the scanning signal line GL and the video signal line DL at the intersection (crossover section). ing. This extended i-type semiconductor layer As is configured to reduce short circuits between the scanning signal line GL and the video signal line DL at the intersection. Thin film transistors TPT1-T divided into a plurality of pixels
Each source electrode SDI and drain electrode S of FT3
As shown in detail in FIG. 2, FIG. 3, and FIG. 7 (plan views of main parts in predetermined manufacturing steps), D2 is provided separately on the i-type semiconductor layer As. Each of the source electrode SDI and drain electrode SD2 is configured such that when the bias polarity of the circuit changes, the source and drain are interchanged in operation. In other words, the thin film transistor TPT is bidirectional like a FET.

Each of the source electrode SDI and drain electrode SD2 is
A first conductive film d1, a second conductive film d2 . It is constructed by sequentially overlapping third conductive films d3. First conductive film d of source electrode SDI
i. The second conductive film d2 and the third conductive film d3 are formed in the same manufacturing process as each of the drain electrodes SD2.

The first conductive film d1 is formed using a chromium film formed by sputtering, and has a thickness of 500 to 1000 mm (in this liquid crystal display device, a film thickness of about 600 mm). When forming a chromium film thickly, the stress increases, so
000 [people] Form the film within a range that does not exceed a film thickness of 8 degrees. The chromium film has good contact with the N1 type semiconductor layer dO.
The chromium film constitutes a so-called barrier layer that prevents aluminum of the second conductive film d2, which will be described later, from diffusing into the N+ type semiconductor layer do. In addition to the chromium film, the first conductive film d1 includes a high melting point metal (Mo, Ti, Ta, W) film,
Refractory metal silicide (MoSi, TiSi, Ta
It may be formed using a film (S it, WS it). 1st
After patterning the conductive film d1 by photo processing, the N+ type semiconductor layer do is removed using the same photo processing mask or using the first conductive film d1 as a mask. That is, the portion of the N-type semiconductor layer do remaining on the i-type semiconductor layer AS except for the first conductive film d1 is removed by the self-alignment. At this time, since the N+ type semiconductor layer do is etched so that its entire thickness is removed, the i type semiconductor layer AS is also slightly etched at its surface, but the extent can be controlled by the etching time.

Thereafter, the second conductive film d2 is formed by sputtering anoleminium to a thickness of 3000 to ssooCλ (in this liquid crystal display device, a thickness of about 3SOO[person]). The aluminum film has less stress than the chromium film and can be formed to a thick film thickness, making it possible to form the source electrode SD.
It is designed to reduce the resistance values of the drain electrode SD2 and the video signal vADL. The second conductive film d2 is configured to increase the operating speed of the thin film transistor TPT and the signal transmission speed of the video signal line DL. In other words, the second conductive film d2 is
Pixel writing characteristics can be improved. Second conductive film d
In addition to the aluminum film, the material 2 may be formed of an aluminum film containing silicon, palladium, titanium, copper, or the like as an additive.

After patterning the second conductive film d2 by photo processing technology,
The third conductive film d3 is a transparent conductive film (I
T○: Nesa film) is used, and the film thickness is 300 to 2400 [people] (in this liquid crystal display device, the film thickness is about 1200 [people]).
is formed. This third guide? ! ! The film d3 constitutes the source electrode SDI, drain electrode SD2, and video signal line DL, and also constitutes the transparent pixel electrode TTO.

First conductive film d1 of source electrode SDI, drain electrode SD
Each of the two first conductive films d1 has an upper second conductive film d1.
The channel forming region side is configured to have a larger size than the second and third conductive films d3. That is, the first conductive film d1
1st guide 1! Even if a mask misalignment occurs in the manufacturing process between the film d1, the second conductive film d2, and the third conductive film d3, the size (the first conductive film) is larger than that of the second conductive film d2 and the third conductive film d3. The channel formation region side of each of the third conductive films d1 to d3 may be on-the-line. The first conductive film d1 of the source gl pole SD1 and the first conductive film d1 of the drain electrode SD2 are each configured to define the gate length L of the thin film transistor TPT. In this way, in the thin film transistors TPTI to TFT3 divided into a plurality of pixels, the source electrodes SDI. By configuring the channel formation region side of each first conductive film d1 of the drain electrode SD2 to have a larger size than the second conductive film d2 and the third conductive film d3, the source electrode S
DI, each of the drain electrode SD2]. conductive film d
The gate length L of the thin film transistor TPT can be defined by the dimension between 1 and 1. Separation dimension between the first conductive films d1 (
The gate length) can be defined by the processing accuracy (patterning accuracy), so the thin film transistor TFTI~
The gate length L of each TFT 3 can be made uniform.

Source electrode SD. As described above, L is connected to the transparent pixel electrode ITO. The source electrode SDI has a stepped shape of an i-type semiconductor, lWAS (thickness of the first conductive film g1,
The step is formed along a step corresponding to the sum of the thickness of the N+ type semiconductor layer dO and the thickness of the J type semiconductor layer AS. Specifically, the source electrode SD1 includes a first conductive film d1 formed along the step shape of the i-type semiconductor IAs, and a transparent pixel electrode structure T○ on the top of the first conductive film d1. A second conductive film d2 formed with a small size on the side to be connected, and a first conductive film d2 exposed from the second conductive film d2.
A third conductive film d3 is connected to the conductive film d1. The first conductive film d1 of the source electrode SDI has good adhesion to the N+ type semiconductor layer dO, and is mainly configured as a barrier layer against diffused substances from the second conductive film d2. The second conductive film d2 of the source electrode SDI cannot be formed thickly due to the increased stress on the chromium film of the first conductive film d1, and cannot overcome the stepped shape of the i-type semiconductor layer AS. It is designed to overcome. In other words, the second conductive film d2 improves the stepping force barrier by forming it thickly. Since the second conductive film d2 can be formed thickly, it greatly contributes to reducing the resistance value of the source electrode SDI (the same applies to the drain electrode SD2 and the video signal line DL). The third conductive WAd3 is the second conductive WAd3.
Since it is not possible to overcome the step shape caused by the i-type semiconductor layer As of the conductive film d2, the second conductive film d2 is configured to be connected to the exposed first conductive film d1 by reducing its size. First conductive film d1 and third conductive film d
No. 3 not only has good adhesion but also has a small step shape at the connecting portion between the two, so that the connection can be made reliably.

In this way, the source electrode SI of the thin film transistor TPT
) 1, a first conductive film d1 as a barrier layer formed at least along the i-type semiconductor, IIAs, and a resistivity formed on the top of the first conductive film d1, which has a specific resistance compared to the first conductive film d1. A transparent pixel electrode I is formed on the first conductive film d1 exposed from the second conductive film d2.
By connecting the third conductive film d3, which is TO, it is possible to reliably connect the thin film transistor TPT and the transparent pixel electrode ITO, so that point defects caused by disconnection can be reduced. Moreover, the source electrode SDI is
Because of the barrier effect of the conductive film d1, the second conductive film d2 (aluminum film) having a low resistance value can be used, so the resistance value can be reduced.

The drain electrode SD2 is configured integrally with the video signal line DL, and is formed in the same manufacturing process. The drain electrode SD2 is formed in an L-shape that protrudes in the column direction intersecting the video signal, iilDL. In other words, the thin film transistors TPTI to TFT divided into a plurality of pixels
The drain electrodes SD2 of each of the three drain electrodes SD2 are connected to the same video signal line DL. The transparent pixel electrode ITO is provided for each pixel and constitutes one of the pixel electrodes of the liquid crystal display section. The transparent pixel electrode IT○ is divided into three transparent pixel electrodes (divided transparent pixel electrodes) ITOI, ITO2, and TO3 corresponding to each of the plurality of divided thin film transistors TPT1 to TFT3 of the pixel. The transparent pixel electrode ITOI is
It is connected to the source electrode SDI of the thin film transistor TFTI. The transparent pixel electrode ITO2 is connected to the source electrode SDI of the thin film transistor TFT2. The transparent pixel electrode ITO3 is connected to the source electrode SDI of the thin film transistor TFT3. Transparent pixel electrode IT○1~
Each of ITO3 is a thin film transistor TPT1 to T
Like each of the FT3s, they are configured with substantially the same size.

Each of the transparent pixels Dentachibana ITOI to IT○3 corresponds to the i of each of the thin film transistors TFTI to T'F T3.
Since the type semiconductor layer As is formed integrally (the divided thin film transistors TPT are arranged in a concentrated manner), it is formed in an L-shape.

In this way, the thin film transistor TPT of a pixel arranged in the intersection area of two adjacent scanning signal lines OL and two adjacent video signal lines DL is replaced by a plurality of thin film transistors T.
The transparent pixel electrode ITOI is divided into PTI~TFT3, and each of the thin film transistors TPTI~TFT3 is divided into a plurality of transparent pixel electrodes ITOI~! By connecting each TO3, only a divided part of the pixel (for example, thin film transistor TFTI) becomes a point defect, and
Since the pixel as a whole is no longer a point defect (the thin film transistors TFT2 and TFT3 are not point defects), it is possible to reduce point defects in the pixel as a whole. Furthermore, since some of the point defects in which the pixel is divided are smaller than the entire area of the pixel (in the case of this liquid crystal display device, the area is one-third of the pixel), the point defects can be made difficult to see. I can do it.

In addition, the divided transparent box electrodes IT01 to I of the pixels
By configuring each TO3 to have substantially the same size, the area of point defects within a pixel can be made uniform.

Further, the divided transparent pixel electrodes IT01 to I of the pixel
By configuring each of the TO3 to have substantially the same size, each liquid crystal capacitor (Cpix) constituted by each of the transparent pixel electrodes ITOI to ITO3 and the common transparent pixel 1t pole ITO, and this transparent pixel electrode ITOI to
Transparent pixel electrode ITOI added to each ITO3
~The overlap capacitance (Cgs) caused by the overlap between IT○3 and the gate electrode GT can be made uniform. In other words, each of the transparent pixel electrodes ITOI to ITO3 can have a uniform liquid crystal capacitance and superimposed capacitance, so that the DC component that is to be applied to the liquid crystal molecules of the liquid crystal LC due to this superposed capacitance can be made uniform. If this method of canceling the DC component is adopted, it is possible to reduce variations in the DC component applied to the liquid crystal of each pixel.

A protection [PSVl] is provided over the thin film transistor TPT and the transparent pixel electrode ITo.

The protective film PSVI is formed mainly to protect the thin film transistor TPT from moisture, etc., and a film with high transparency and good moisture resistance is used.

The protective film PSVI is formed of a silicon oxide film or a silicon nitride film formed by plasma CVD, for example.
000 to 1]000 [people] (in this liquid crystal display device, the film thickness is about 8000 [people]).

A shielding film LS is provided above the protective film PSVI on the thin film transistor TFT to prevent external light from entering the type 1 semiconductor JipAS used as a channel formation region. As shown in FIG. 2, the shielding film LS is configured within a region surrounded by a dotted line. The shielding film LS is formed of, for example, an aluminum film, a chromium film, or the like, which has a high shielding property against light, and is formed by sputtering to a thickness of about 1000 [layers].

Therefore, the common semiconductor /WAs of the thin film transistors TPTI to TFT3 is sandwiched between the upper and lower light shielding films LS and the thick gate electrode GT, and is not exposed to external natural light or backlight light. Light shielding film LS
The gate electrode GT and the gate electrode GT are thicker than the semiconductor layer AS and are formed to have a similar shape, and the sizes of the two are almost the same.
Draw it smaller (C).

It is also possible to attach the backlight to the upper transparent glass substrate SUB2 side and set the lower transparent glass substrate SUBI to the fR detection side (externally exposed side). In this case, the light shielding film LS is connected to the backlight light, and the gate electrode GT is connected to the backlight. Works as a natural light blocker.

The thin film transistor TPT is configured such that when a positive bias is applied to the gate electrode GT, the channel resistance between the source and drain becomes small, and when the bias is reduced to zero, the channel resistance becomes large. That is, the thin film transistor TPT is configured to control the voltage applied to the transparent pixel electrode IT○.

The liquid crystal LC is defined and enclosed by a lower alignment film ORII and an upper alignment film ○RI2 that set the orientation of liquid crystal molecules in a space formed between a lower transparent glass substrate SUBI and an upper transparent glass substrate SUB2. There is.

The lower alignment film ○R41 is formed on the protective film PSV'1 on the lower transparent glass substrate SUBI side.

On the inner surface (liquid crystal side) of the upper transparent glass substrate SUB2, there are a color filter FIL, a protective film PS2, a common transparent pixel electrode (COM) ITO, and the upper alignment film ○RI.
2 are sequentially stacked.

The common transparent pixel electrode ITO is connected to the lower transparent glass substrate S.
U B 1. Transparent pixel electrode I provided for each pixel on the side
It is configured integrally with another common transparent pixel electrode ITO facing and adjacent to TO. A common voltage VCOIm is applied to this common transparent pixel electrode IT○. The common voltage Vcow is an intermediate potential between the low-level northing voltage Vdmin and the high-level drive voltage Vdwax applied to the video signal line DL. The color filter F I L is constructed by coloring a dyed base material made of a resin material such as acrylic resin with a dye. The color filter FIL is arranged for each pixel at a position facing the pixel, and is colored differently. That is,
The color filter FIL, like the pixel, is configured within the intersection area of two adjacent scanning signal lines GL and two adjacent video signal lines DL. Each pixel is divided into a plurality of parts within each predetermined color filter of the color filter FIL. The color filter FIL can be formed as follows. First, a dyed base material is formed on the surface of the upper transparent glass-containing substrate SUB2, and the dyed base material other than the red filter forming area is removed using photolithography technology. After this, the dyed base material is dyed with red dye, fixed treatment is applied, and red filter R
4. Next, a green filter G and a blue filter B are sequentially formed by performing similar steps.

In this way, by forming each color filter of the color filter FIL in the intersection area facing each pixel, the scanning signal line OL is formed between each color filter of the color filter FIL.
Since there are variations in the video signal sDL, it is necessary to secure alignment margin between each pixel and each color filter of the color filter FIL (increase the alignment margin) by the amount equivalent to the size of the video signal sDL. can. Furthermore, when forming each color filter of the color filter FIL, it is possible to secure alignment margin dimensions between different color filters. That is, in this liquid crystal display device, a pixel is formed within the intersection area of two adjacent scanning signal lines GL and two adjacent video signal lines DL, and this pixel is divided into a plurality of parts, and By forming each color filter of the color filter FIL in the position where the color filter FIL is located, it is possible to reduce the above-mentioned point defects and to secure alignment margin between each pixel and each color filter. The protective film PSV2 is provided to prevent the dyes used to dye the color filters FIL into different colors from leaking into the liquid crystal LC. Protection [PSV2 is made of a transparent resin material such as acrylic resin or epoxy resin. Is this liquid crystal display V & position lower transparent glass substrate SU? The layers on the L side and the upper transparent glass substrate SUB2 side are formed separately, and then the lower transparent glass substrate SUE1 and the upper transparent glass substrate SUB2 are stacked, and a liquid crystal LC is placed between them.
It is assembled by enclosing. As shown in FIG. 4, a plurality of pixels of the liquid crystal display section are arranged in the same column direction as the direction in which the scanning signal line GL extends, and are arranged in pixel columns x1, X,, x,, X4, . . . It consists of each of the following. Each pixel row Xe, x2, X,, X4,...
・Each pixel is a thin film transistor TPTI~T
The arrangement positions of FT3 and transparent pixel electrodes ITo1 to ITO3 are configured to be the same. That is, pixel columns X1, x3,
Each pixel of... is a thin film transistor TPTI
~The arrangement position of TFT3 is on the left side, transparent pixel electrode ITOI~
The ITO3 is arranged on the right side. Pixel row X,
, X■, ..., the next pixel column X in the row direction
, X4, . . . each pixel of
, . . . are arranged line-symmetrically with respect to the video signal line DL. That is,
In each pixel of pixel columns X, X4, . . . , thin film transistors TPTI to TFT3 are arranged on the right side, and transparent pixel electrodes ITO1 to ITO3 are arranged on the left side. Then, each pixel in pixel rows X,, It has been done. In other words, each pixel interval of pixel row X is 1.0
(1.0 pitch), the next pixel row There is. The video signal line DL extending in the row direction between each pixel is configured to extend in the column direction by a half pixel interval (0.5 pitch) between each pixel column X. In this way, in the liquid crystal display section, the thin film transistor T
A plurality of pixels with the same PT and transparent pixel electrode ITO are arranged in the column direction to form a pixel column X, and the next pixel column X of the pixel column It is composed of pixels arranged line-symmetrically with respect to the line DL, and the next pixel column is the previous pixel column. By moving the pixel row by half a pixel interval, the predetermined color filter of the previous pixel row (For example, the pixel in which the red filter R of pixel column X is formed) and the pixel in which the same color filter of the next pixel column formed pixels) can be separated by 1.5 pixel intervals (1.5 pitch). In other words, the pixels in the previous pixel row can form an RGB triangular arrangement structure. Color filter FIL R
The triangular arrangement structure of GB can improve the color mixing of each color, so it can improve the resolution of a single color image. Moreover, since the video signal line DL extends in the column direction by only half a pixel interval between each pixel column X, it does not intersect with the adjacent video signal line DL. So, video signal line D
It is possible to eliminate the routing of L and reduce its occupied area, and it is also possible to eliminate the detour of the video signal line DL and eliminate the multilayer wiring structure. The circuit configuration of this liquid crystal display section is shown in FIG. 9 (equivalent circuit diagram of the liquid crystal display section).

XiG, Xi+IG, . . . shown in FIG. 9 are video signals i1DL connected to the pixels where the green filter G is formed.
It is. XiB, Xi+IB, . . . are video signals AIDL connected to the pixels in which the blue filter B is formed. *Xi+IR. Xi+2R, . . . are video signal lines DL connected to the pixels in which the red filter R is formed. These video signal lines DL are selected by a video signal instantaneous circuit. Yi is a scanning signal line GE that selects the pixel column X1 shown in FIGS. 4 and 8. Similarly, Y
Each of x + 1 r Y x + 2 *... is,
This is a scanning signal line GL that selects each of the pixel columns X2, X, . These scanning signal lines OL are connected to a vertical scanning circuit.

The center part of FIG. 3 shows the cross section of one pixel part, while the left side shows the cross section of the left edge part of the lower transparent glass substrate SUBI and the upper transparent glass substrate SUB2 where external lead wiring exists. ．． On the right side, transparent glass substrate S
A cross section of the right edge portion of UBI and SUB2 where no external lead wiring is present is shown.

The sealing materials SL shown on the left and right sides of Fig. 3 are as follows:
It is configured to seal the liquid crystal LC, and is formed along the entire edges of the transparent glass substrates SUBI and SUB2 except for the liquid crystal sealing opening (not shown). The sealing material SL is made of, for example, epoxy resin. The common transparent pixel electrode ITO on the side of the upper transparent glass substrate SUBZ is coated with silver paste material S at at least one location.
The IL is connected to an external lead wiring formed on the side of the lower transparent glass substrate SUBI. This external lead wiring is formed in the same manufacturing process as each of the gate electrode GT, source electrode sD1, and drain electrode SD2 described above.

The alignment films ORII and ORI2, transparent pixel electrode IT
O, common transparent pixel electrode ITO, protective film PSv1 and P
Each layer of SV2 and insulating film GI is formed inside the sealing material SL. The polarizing plate POL is formed on the outer surface of each of the lower transparent glass substrate SUB1 and the upper transparent glass substrate SUB2.

FIG. 10 is a sectional view of the main part of the pixel and the area around the seal part of the liquid crystal display section of another active matrix type color liquid crystal display device to which the present invention is applied, and FIG. 11 is the same as shown in FIG. 10. A plan view showing one pixel of the liquid crystal display part of a liquid crystal display device, FIG. 12 is a cross-sectional view of a portion taken along the line A-A in FIG. 111, and FIG. 13 is a plan view showing a plurality of pixels shown in FIG. FIGS. 14 to 16 are plan views of main parts of the liquid crystal display unit shown in FIG. 11 in a predetermined manufacturing process, and FIG. FIG. 3 is a plan view of main parts in a superimposed state.

In this liquid crystal display device, it is possible to improve the aperture ratio of each pixel in the liquid crystal display section, reduce the direct current component applied to the liquid crystal, reduce point defects in the liquid crystal display section, and reduce black unevenness. .

In this liquid crystal display device, as shown in FIG. 11, the i-type semiconductor IAs in each pixel of the liquid crystal display section is connected to a thin film transistor T
It is divided into FTI to TFT3 and configured as C. In other words, the thin film transistor TPTI divided into multiple pixels
~Each of TFT3 is an independent i-type semiconductor FrIA
Island area of s. It consists of

Moreover, the transparent pixel 1 connected to each of the thin film transistors TPTI to TFT3! Each of iITO1 to ITO3 is overlapped with the scanning signal line GL of the next stage in the row direction on the side opposite to the side connected to the thin film transistors TPT1 to TFT3. This overlapping metal plate constitutes a storage capacitor element (electrostatic capacitor element) Cadd which has each of the transparent pixel electrodes ITOI to rTO3 as one electrode and the next stage scanning signal line OL as the other electrode. The dielectric film of this storage capacitor element C add is composed of the same layer as the insulating film G■ used as the gate insulating film of the thin film transistor TFT. The gate electrode GT is formed to be thicker than the i-type semiconductor layer AS, similar to the liquid crystal display device shown in FIG.
is formed for each independent i-type semiconductor layer AS, so a thick pattern is formed for each thin film transistor TPT.

In addition, since the black matrix pattern BM is provided in the portion of the upper transparent glass substrate S tJ B 2 corresponding to the scanning signal vAGL, video signal line DL, and thin film transistor TPT, the outline of the pixel becomes clear and the contrast is improved. At the same time, it is possible to prevent external natural light from hitting the thin film transistor TPT.

The equivalent circuit of the pixel shown in Fig. 11 is shown in Fig. 18 (equivalent circuit diagram). In FIG. 18, as before, C
gs is a superimposed capacitance formed by the gate electrode GT and source electrode SDI of the thin film transistor TPT. The dielectric film of the superposed capacitance Cgs is an insulating film GI. C
pLx is the liquid crystal capacitance formed between the transparent pixel electrode ITO (PIX) and the common transparent pixel electrode ITO (COM). The dielectric films of the liquid crystal capacitor C pix are the liquid crystal LC, the protective film psv1, and the alignment films ORII and ORI2. V
1c is the midpoint potential.

The storage capacitor element Cadd is a thin film transistor TPT.
When switching, the midpoint potential (pixel electrode potential) v
It works to reduce the influence of gate potential change ΔVg on the IC. This situation can be expressed as the following formula.

ΔV lc= ((Cgs/(Cgs+Cadd+Cp
ix)) xΔVg Here, ΔVlc represents the change in midpoint potential due to ΔVg. This change ΔvlC causes a DC component applied to the liquid crystal, but the storage capacitance element Cadd
The larger the storage capacity of , the smaller its value can be. Further, the storage capacitor element C add also has the effect of lengthening the discharge time, so that video information is stored for a long time after the thin film transistor TPT is turned off. Reducing the DC component applied to the liquid crystal LC can improve the life of the liquid crystal LC and reduce so-called burn-in, in which the previous image remains when switching liquid crystal display screens.

As described above, since the gate electrode GT is made large enough to completely cover the semiconductor layer AS, the source/drain electrodes SDI. The overlapping area with SD2 increases, the parasitic capacitance Cgs increases, and the reverse effect occurs that the midpoint potential VLC becomes more susceptible to the influence of the gate (scanning) signal Vg. However, by providing the storage capacitor element C add, this disadvantage can also be eliminated.

Further, in a liquid crystal display device having pixels in an intersection area of two scanning signal lines GL and two video signal lines DL, one scanning signal line GL of the two scanning signal lines OL may be
The thin film transistor TPT of the pixel selected in is divided into a plurality of parts, and the divided thin film transistors TPT1 to TF
Each of the transparent pixel electrodes 1iITo divided into a plurality of parts (ITOI to ITO3) is connected to each of T3, and this pixel electrode ITO is used as one electrode for each of the divided transparent pixel electrodes IT○1 to ITO3. By using the other scanning signal line GL of the scanning signal lines GL as a capacitor electrode line to configure the storage capacitor element Cadd which uses the other electrode as the other electrode, it is possible to prevent a divided part of the pixel from being a point defect, as described above. Since the pixel as a whole is not a point defect, it is possible to reduce the point defect of the pixel, and it is also possible to reduce the direct current component applied to the liquid crystal LC by the storage capacitor element C add. The life of LC can be improved. In particular, by dividing the pixel, it is possible to reduce point defects caused by short circuits between the gate electrode GT and the source electrode SDI or drain electrode SD2 of the thin film transistor TPT, and also to reduce the point defects caused by short circuits between the gate electrode GT and the source electrode SDI or drain electrode SD2 of the thin film transistor TPT, and also to reduce the point defects caused by short circuits between the transparent pixel electrodes ITOI to ITO3 and the storage capacitor. Point defects caused by short circuits between the element C add and the other electrode (capacitor electrode line) can be reduced. In this liquid crystal display device, the number of point defects on the latter side is one third. As a result, some of the point defects into which the pixel is divided are smaller than the entire area of the pixel, making it difficult to see the point defects.

The storage capacitance of the storage capacitance element C add is 4 to 8 times (4.
Cpix(Cadd(lLcpix).8 to 32 times the superposition capacitance Cgs (8 ・C gs<C
Set the value to approximately 32・Cgs). Further, the scanning signal iltGL is formed of a composite film in which a first conductive film (chromium film) gl and a second conductive film (aluminum film) g2 are superimposed, and the other electrode of the storage capacitor element C add, that is, the capacitor electrode By configuring the branched portion of the line with a single layer film made of the first conductive film g1 of the composite film, the resistance value of the scanning signal line GL can be reduced and the writing characteristics can be improved. At the same time, one electrode of the storage capacitor Cadd (transparent pixel electrode IT
Since O) can be bonded onto the insulating film GI, disconnection of one electrode of the storage capacitor element Cadd can be reduced.

Further, by configuring the other electrode of the storage capacitor element Cadd with the single-layer first conductive film g1 and not forming the second conductive film g2 which is an aluminum film, the retention capacitor element Cadd due to hillocks of the aluminum film can be This can prevent short circuits between the other electrode and one electrode. The source electrode SD is provided in a portion between each of the transparent pixel electrodes ITOI to IT○3 that are overlapped to form the storage capacitor element C add and the capacitor wire.
Similarly to I, the first conductive film d1 is used to prevent the transparent pixel electrode ITO from being disconnected when climbing over the stepped shape of the capacitor electrode line.
and an island region made up of the second conductive film d2. This island region is configured to be as small as possible so as not to reduce the area (aperture ratio) of the transparent pixel electrode IT○.

In this way, between one electrode of the storage capacitance element C add and the insulating film GI used as its dielectric film,
The first conductive film dl and the first conductive film d formed thereon.
A base layer is formed with a second conductive film d2 having a smaller specific resistance value and a smaller size than that of the first electrode, and the one electrode (third conductive film d3) is formed with the second conductive film d2 of the base layer. By connecting to the first conductive film d1 exposed from the storage capacitor Cadd, one electrode of the storage capacitor Cadd can be reliably bonded along the stepped portion based on the other electrode of the storage capacitor Cadd. Disconnection of one electrode of the element C acid can be reduced.

A storage capacitor element C ad is attached to the transparent pixel electrode IT○ of the pixel.
The liquid crystal display section of the liquid crystal display device provided with d is constructed as shown in FIG. 20 (equivalent circuit diagram showing the liquid crystal display section). The liquid crystal display section is constructed by repeating a unit basic pattern including pixels, scanning signal lines GL, and video signal lines DL. As shown in FIG. 20, the final stage scanning signal line GL (or first stage scanning signal line OL) used as a capacitor electrode line is connected to a common transparent pixel electrode (Vcom) 1'.
Connect to To. The common transparent pixel electrode IT○ is the third
As shown in the figure, the periphery of the liquid crystal display device is connected to external lead wiring by silver paste material SL. Moreover, some of the conductive layers (gl and g
2) is constructed in the same manufacturing process as the scanning signal line GL. As a result, the scanning signal line GL at the final stage of IIL (capacitance
AliA) can be easily connected to the common transparent pixel electrode ITO.

In this way, by connecting the final stage of the capacitor electrode line to the common transparent pixel electrode (Vcom) I To of the pixel, the final stage capacitor! The electrode wire can be constructed integrally with a part of the conductive layer of the external lead wiring, and since the common transparent pixel electrode IT○ is connected to the external lead wiring, the capacitance of the final stage can be easily configured. Connect the electrode line to the common transparent pixel electrode I
"I" Can be connected to O.

In addition, the liquid crystal display device is based on the DC cancellation method described in Japanese Patent Application No. 62-95125 previously filed by the applicant of the present invention, as shown in FIG. 19 (time chart). By controlling the drive voltage of the scanning signal line DL, it is possible to further reduce the DC component applied to the liquid crystal LC. In Figure 19°, V
i is the driving voltage of an arbitrary scanning signal line OL, and Vi+1 is the driving voltage of the scanning signal line OL at the next stage. Vee is a low-level dynamic voltage Vdmi applied to the scanning signal line GL.
n, Vdd is a high-level drive voltage Vdwax applied to the scanning signal line OL. The voltage change ΔVe to Δv4 of the midpoint potential Vlc (see FIG. 18) at each time t=te to t4 is the total capacitance of the pixel (Cgs+
If Cpix+Cadd) is C, then the following equation is obtained. ΔVl= (Cgs/C)・V2 ΔVx =+ (Cgs/C)'(V 1 + V
2) (Cadd/C)・V 2 ΔVs− (Cgs/C)・Vl + (Cadd/C) {V 1 +V 2) Δv4=−(
Cadd/C)・v1 Here, if the swinging voltage applied to the scanning signal line GL is sufficient (see Note 1 below), the DC voltage applied to the liquid crystal LC is expressed by the following equation. ΔV, +ΔV, = (Cadd−V 2 − Cgs−
v1 )/C Therefore, Cadd-v2=Cgs-v
If it is 1, the DC voltage applied to the liquid crystal LC will be 0. [Note 1 Time 1,. Is the change in drive voltage Vi medium in 12? Although it affects the potential vlc, during the period from t2 to t, the midpoint potential vlc is made the same potential as the video signal potential through the signal line Xi (sufficient writing of the video signal), and the potential applied to the liquid crystal LC is set by the thin film transistor TPT. It is almost determined by the potential immediately after TPT is turned off (the off period of the thin film transistor TPT is overwhelmingly longer than the on period). Therefore, LCD L
Calculation of the direct current component flowing through C can be almost ignored during periods t■ to t3, and corresponds to the potential immediately after the thin film transistor TPT is turned off, that is, times 1, . 1. All you have to do is consider the effects during the transient period. Note that the polarity of the video signal Vi is inverted for each frame or line, and the DC component due to the video signal itself is zero.

In other words, the DC cancellation method uses the fluctuation voltage applied to the storage capacitance element Cadd and the next scanning signal line GL (capacitive electrode line) to push up the drop caused by the pull in of the midpoint potential Vlc by the superimposed capacitance Cgs. The DC component applied to the LC can be made extremely small. As a result, the life of the liquid crystal LC of the liquid crystal display device can be improved. Of course, to improve the light shielding effect, the gate electrode GT
When C ad is increased, the storage capacitance element C ad
All you have to do is increase the storage capacity of d. In this DC cancellation method, as shown in FIG. 21 (equivalent circuit diagram showing a liquid crystal display section), the first stage scanning signal line GL (or capacitive electrode line) is connected to the final stage capacitive electrode line (or scanning signal line OL). It can be adopted by connecting to.

For convenience, only four scanning signal lines GLL are not shown in FIG. 21, but in reality, about several hundred scanning signal lines GL are arranged. The first-stage scanning signal line GL and the final-stage capacitor electrode line are connected by internal wiring within the liquid crystal display section or external lead wiring. In this way, in the liquid crystal display device, by connecting the first-stage scanning signal line OL to the last-stage capacitive electrode line, all of the scanning signal line OL and the capacitive electrode line can be connected to the vertical scanning circuit. Therefore, a DC cancellation method can be used. As a result, the direct current component applied to the liquid crystal LC can be reduced, so the life of the liquid crystal LC can be improved.

FIG. 1 is a plan view showing one pixel of a liquid crystal display section of an active matrix color liquid crystal display according to the present invention. In the figure, ITO11 is the first divided transparent pixel electrode, ITO12 is the second divided transparent pixel electrode, and the length of the end facing the video signal line DL next to the divided transparent pixel electrode IT012 is the length of the divided transparent pixel electrode ITOII. It is longer than the length of the end facing the adjacent video signal line DL, and the divided transparent pixel fl! The area of lITO12 is the divided transparent pixel electrode IT
It is smaller than the area of OII. Furthermore, in the video signal line DL, the uppermost film of the gate terminal and the drain terminal (not shown) is constituted by the third conductive film d3.
The second conductive film d2 is completely covered by the third conductive film d3. In this liquid crystal display device, the length of the end of the divided transparent pixel electrode ITO12 facing the video signal line DL is longer than the length of the end of the divided transparent pixel electrode ITOII facing the video signal line DL. Pixel electrode ITO
12 is more likely to short-circuit with the adjacent video signal line DL than the divided transparent pixel electrode ITOII, but the divided transparent pixel electrode IT
Even if O12 and the adjacent video signal line DL are short-circuited and the divided transparent pixel electrode IT012 does not operate, the area of the divided transparent pixel electrode IT012 is smaller than the area of the divided transparent pixel electrode IT○11, so the divided transparent pixel Since the point defect of the divided pixel having the electrode work T○12 is not noticeable, even if the divided transparent pixel electrode IT○12 stops operating, the display quality will not deteriorate much.

Further, since the uppermost film of the gate terminal and the drain terminal is constituted by the third conductive film d3, the connection between the gate terminal and the drain terminal and TAB is good.
Ionization due to potential difference between the drain terminals does not occur, and the gate terminal and drain terminal are not corroded.

Furthermore, in the video signal line DL, since the second conductive film d2 is completely covered by the third conductive film d3, the generation of aluminum whistle force is suppressed, so that the protective film PS
No bin holes are created in the VI.

Next, the first. A method for manufacturing the liquid crystal display device shown in the figure will be described. First, a film with a thickness of 1100 [
The first conductivity fE! is made of chromium with Igl is provided by sputtering. Next, by selectively etching the first conductive film g1 using a photolithography technique using a ceric ammonium nitrate solution as an etching solution, the first layer of the scanning signal line OL, the gate electrode GT, and the storage capacitor element C are etched. Form an additional electrode film. Next, a second conductive film g made of aluminum-palladium, aluminum-silicon, aluminum-silicon-titanium, aluminum-silicon-copper, etc., has a film thickness of 1000 [people].
2 is provided by sputtering. Next, the second conductive film g2 is selectively etched by photolithography using a mixture of phosphoric acid, nitric acid, and acetic acid as an etchant, thereby forming a second layer of the scanning signal IIAGL. Next, SF and gas are introduced into a dry etching apparatus to remove silicon residues, and then the resist is removed using stripping liquid S502 (trade name). Next, plasma C
X. By introducing ammonia gas, hydrogen gas, and nitrogen gas into the ID device, the film thickness was 3,500 [3000 mm]. By providing a silicon nitride film and introducing silane gas and hydrogen gas into the plasma CVD device, the film thickness was 2,100 [300 mm]. After forming an i-type non-quality silicon film of
F. , an i-type semiconductor layer AS is formed by selectively etching the N+ type silicon film and the i-type non-quality silicon film by photolithography using CCQ4. next,
After removing the resist, SF. The insulating film GI is formed by selectively etching the silicon nitride film using a photolithographic technique using a photolithographic technique. Next, a first conductive film d1 made of chromium and having a thickness of 600 [layers] is formed by sputtering. Next, the first conductive film d1 is selectively etched by photolithography using a ceric ammonium nitrate solution as an etching solution, thereby forming the video signal iDL, the source electrode SD1, and the drain electrode SD2 IN. . Next, before removing the resist, CCQ4 and SFIl are introduced into a dry etching apparatus to selectively etch the N+ type silicon film, thereby forming an N type semiconductor layer d.
Form O. Next, after removing the resist using stripping liquid S502, 02 ashing is performed for 2 minutes using a dry etching device. Next, the film thickness is 3500 [people]
A second conductive film d2 made of aluminum-palladium, aluminum-silicon, aluminum-silicon-titanium, aluminum-silicon-copper, etc. is provided by sputtering. Next, by selectively etching the second conductive film d2 using a mixed acid of phosphoric acid, nitric acid, and acetic acid as an etching solution, the second conductive film d2 is selectively etched. Form two layers. Next, after removing the resist, perform 02 ashing for 2 minutes. Next, a third conductive film d3 made of a non-quality ITO film having a thickness of 1200 mm is provided by sputtering. Next, etching. By selectively etching the third conductive film d3 using a mixed acid of hydrochloric acid and nitric acid as a cleaning solution, the third layer of the video signal line DL, the source electrode SDI, the drain electrode SD2, the gate terminal, A top layer of a drain terminal and a transparent pixel electrode ITO are formed. Next, I removed the resist.
Ammonia gas, silane gas, and nitrogen gas are introduced into a plasma CVD apparatus to provide a silicon nitride film having a thickness of 1 [-].

Next, a protective film PSVI is formed by selectively etching the silicon nitride film by photolithography using SF as a dry etching gas.

FIG. 22 is a plan view showing one pixel of the liquid crystal display section of another liquid crystal display device according to the present invention. In the figure, ITO2
1 is the first divided transparent pixel electrode, ■T○22 is the second divided transparent pixel electrode, and the length of the end facing the video signal 11DL next to the divided transparent pixel electrode ITO22 is the same as that of the divided transparent pixel electrode ITO21. The length of the divided transparent pixel electrode ITO22 is longer than the length of the end facing the adjacent video signal line DL, and the area of the divided transparent pixel electrode ITO22 is smaller than the area of the divided transparent pixel electrode ITO21.

In this liquid crystal display device, divided transparent pixel electrodes ITO
Since the length of the end of the divided transparent pixel electrode ITO22 facing the video signal line DL is longer than the length of the end of the divided transparent pixel electrode ITO21 facing the video signal line DL, the divided transparent pixel electrode ITO22 is longer than the divided transparent pixel electrode ITO21. Video signal line D next to
However, if the divided transparent pixel electrode ITO22 and the adjacent video signal line DL are short-circuited, the divided transparent pixel electrode iaiI
Even if T022 does not operate, the divided transparent pixel electrode IT02
Since the area of 2 is smaller than the area of the divided transparent pixel electrode IT○21, point defects in the divided pixel having the divided transparent pixel electrode ITO22 are not noticeable.
Even if 22 stops working, the display quality will not deteriorate much.

Although this invention has been specifically explained based on the above embodiments, the present invention is not limited to the above embodiments.
Of course, various changes can be made without departing from the gist of the invention.

For example, the present invention can be applied to a liquid crystal display device in which each pixel of the liquid crystal display section is divided into two or four parts.

However, if the number of pixel divisions becomes too large, the aperture ratio will decrease, so as mentioned above, about 2 to 4 divisions is appropriate. Further, in the above embodiment, an inverted staggered structure is shown in which gate electrode formation → gate insulating film formation → semiconductor layer formation → source/drain electrode formation, but the present invention can also be applied to a staggered structure in which the vertical relationship or the order of formation is reversed. It is valid.

〔Effect of the invention〕

As explained above, in the liquid crystal display device according to the present invention, even if the second divided pixel electrode and the adjacent video signal line are short-circuited and the second divided pixel electrode does not operate, the second divided pixel electrode Since the area of the pixel electrode is smaller than the area of the first divided pixel electrode, point defects in the divided pixel having the second divided pixel electrode are not noticeable, so even if the second divided pixel electrode becomes inoperable, Display quality does not deteriorate much.

As described above, the effects of this invention are remarkable.

[Brief explanation of drawings]

FIG. 1 is a plan view showing one pixel of a liquid crystal display section of an active matrix color liquid crystal display device according to the present invention, and FIG. 2 is a plan view showing a liquid crystal display of an active matrix color liquid crystal display device to which the present invention is applied. FIG. 3 is a plan view of the main part showing one pixel of the display section, FIG. 3 is a cross-sectional view of the part taken along the line nn in FIG. 2 and the area around the seal part, and FIG. Main part plan view of the arranged liquid crystal display section, 5th
7 are plan views of essential parts of the pixel shown in FIG. 2 in a predetermined manufacturing process, FIG. 8 is a plan view of essential parts in a state where the pixel shown in FIG. The figure is an equivalent circuit diagram showing the liquid crystal display section of the above-mentioned active matrix color liquid crystal display device, and FIG. 11 is a cross-sectional view of the main part of the pixel and the surrounding area of the sealing part. FIG. 11 is a plan view showing one pixel of the liquid crystal display part of the liquid crystal display device shown in FIG. 10. FIG. 12 is a cross-sectional view taken along A-A in FIG. Cross-sectional view of the part cut along the line, 1st
3 is a plan view of a main part of a liquid crystal display section in which a plurality of pixels shown in FIG. 11 are arranged, FIGS. 14 to 16 are plan views of main parts of the pixel shown in FIG. is the first
Figure 3 is a plan view of the main parts of the pixel and color filter in a superimposed state, Figure 18 is an equivalent circuit diagram of the pixel shown in Figure 11, and Figure 19 is the drive of the scanning signal line using the DC cancellation method. Time chart showing voltage. Figure 20, 2nd
1 is an equivalent circuit diagram showing the liquid crystal display section of the active matrix color liquid crystal display device shown in FIG. 13, and FIG. 22 is an equivalent circuit diagram showing one pixel of the liquid crystal display section of another liquid crystal display device according to the present invention. FIG. SUB...Transparent glass substrate OL...Scanning signal line DL...Image borrow line GI...Insulating film GT...Gate electrode AS...i-type semiconductor layer SD...Source electrode or drain f ＃． Extreme psv・
...Protective film LS...Light shielding film LC...Liquid crystal TPT...Thin film transistor ITO (COM)...Transparent pixel electrodes g, d...Conductive film C add...Storage capacitor element Cgs... Superposition capacitance C pix...Liquid crystal capacitance BM...Black matrix pattern Figure 18 v c t1 t2 t3 t4

Claims (1)

[Claims] 1. In an active matrix liquid crystal display device in which a thin film transistor and a pixel electrode are used as constituent elements of a pixel, and the pixel electrode is divided into a plurality of divided pixel electrodes, the length of the end facing the adjacent video signal line A liquid crystal display device characterized in that the area of the second divided pixel electrode, which is longer than the first divided pixel electrode, is smaller than the area of the first divided pixel electrode.