JPH0356939A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To compensate for or repair a defect caused by a shortcircuit by wiring two video signal lines together as a pair and by forming an additional capacity between the scanning signal line and the picture element electrode. CONSTITUTION:The additional capacity Cadd is formed between the picture element electrode and the scanning signal line adjacent to it; pairs of video signal lines are connected to common terminals XiG, XiB, XiR,..., one pair to one common terminal, and a part enclosed with an alternate short and dash line is driven as one picture element. Thus, even if the video signal line is disconnected, for example, at a part (b), a signal voltage is supplied to every TFT connected to the said video signal line, therefore it does not become defective; when there is a shortcircuit between the scanning signal line and the video signal line, for example, at a part S1, the defect can be removed by cutting at parts X, which are above and below the part S1, by means of a laser, etc.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a liquid crystal display device, and particularly to an active matrix type liquid crystal display device using thin film transistors and the like.

[Conventional technology]

An active matrix type liquid crystal display device is one in which a nonlinear element (switching element) is provided corresponding to each of a plurality of pixel electrodes arranged in a matrix.

Theoretically, the liquid crystal in each pixel is constantly moving (duty ratio 1.0), so the active method has better contrast than the so-called simple matrix method, which uses a time-division movement method, especially in color. It is becoming an indispensable technology. A typical switching element is a thin film transistor (TFT).

Active matrix liquid crystal display devices using TFTs are described in, for example, "12.5-inch active matrix color liquid crystal display with redundant configuration," Nikkei Electronics, pp. 193-210, 1986.
It is known for being published by Nikkei McGraw-Hill on February 15th.

The conventional device is T. Nagayas
r 198g International Display Research Conference (1988 INTERN) by U) et al.
ATIONAL DISPLAY RESEARCH
CONFERENCE)
As described in IEEE) pages 56 to 58, it has been proposed to construct scanning signal lines and video signal lines with multiple lines each in order to compensate for wiring defects in active matrix liquid equipment. has been done.

[Problem to be solved by the invention]

It is essential that the additional capacitor formed between the scanning signal line and the pixel electrode be electrically parallel to the liquid crystal capacitor. Therefore, one electrode of the additional capacitor must be connected to a scanning signal line other than the scanning signal line that moves the pixel electrode, but in the method proposed by T. Nagayasu et al., the adjacent scanning signal line is electrically There is a problem that additional capacitance cannot be formed because the capacitor is connected to

In other words, in the conventional technology, no consideration is given to forming an additional capacitance to compensate for the deterioration of retention characteristics due to a decrease in liquid crystal resistance, and when operating for a long time, the uniformity of the screen may deteriorate due to temperature rise. There is a problem of damage and black spots.

SUMMARY OF THE INVENTION An object of the present invention is to provide a liquid crystal display device that can compensate for or repair defects caused by disconnection of video signal lines and short circuits between video signal lines and scanning signal lines, and can also form additional capacitance.

The above and other objects and novel features of the present invention will become apparent from the description of the present invention and the accompanying drawings.

[Means to solve the problem]

In order to solve the above problems, the liquid crystal display device of the present invention includes:
One pixel has a plurality of TFTs and pixel electrodes corresponding to the TFTs, at least two video signal lines are commonly wired as a set, and an additional capacitance is formed by the intersection of the scanning signal line and the pixel electrode. It is characterized by being hollowed out.

[Effect]

In the present invention, by commonly connecting a plurality of video signal lines in one set and wiring the scanning signal lines for each upper horizontal scan as in the past, even if the video signal lines are disconnected, it is compensated for, and the video signal lines and Even if a short circuit occurs between the scanning signal line and the scanning signal line, it can be repaired by cutting the video signal line sandwiching the short circuit using a laser or the like. Furthermore, since the pixel electrode can be overlapped with the adjacent scanning signal line, additional capacitance can be formed.

〔Example〕

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure of the present invention will be described below along with an embodiment in which the present invention is applied to an active matrix type color liquid display device.

In all the figures for explaining the embodiments, parts having the same functions are given the same reference numerals, and repeated explanations thereof will be omitted.

Embodiment Fig. 1 is an equivalent circuit diagram showing a liquid crystal display section of an active matrix color liquid crystal display device according to an embodiment of the first embodiment of the present invention, and Fig. 2A is an equivalent circuit diagram showing one pixel of the liquid crystal display device of Fig. 1. FIG. 2B is a plan view showing the surrounding area, and FIG. 2B is II of FIG. 2A.
FIG. 2C is a diagram showing a cross section along the B-[[B cutting line and a cross section near the seal portion of the display panel, and FIG. 2C is the nc of FIG. 2A.
It is a sectional view taken along the -nc cutting line. Moreover, FIG. 3 (main part plan view) shows a plan view when a plurality of pixels shown in FIG. 2A are arranged.

<Pixel Arrangement> As shown in Figure 2A, each pixel is connected to two adjacent scanning signal lines (gate signal lines or horizontal signal lines) GL and two adjacent video signal lines (drain signal lines or vertical signal lines). signal m)
Within the intersection area with DL (within the area surrounded by four signal lines)
It is located in Each pixel is a thin film transistor TFT,
It includes a pixel electrode ITO1 and an additional capacitor C add. The scanning signal lines GL extend in the column direction, and a plurality of scanning signal lines GL are arranged in the row direction.

The video signal lines DL extend in the row direction, and a plurality of video signal lines DL are arranged in the column direction.

《Whole display panel equivalent circuit》 An equivalent circuit of this liquid crystal display device is shown in FIG.

XiG, Xi+IG, . . . are video signal lines DL connected to pixels in which the green filter G is formed.

XiB, Xi+IB, . . . are video signal lines DL connected to pixels on which the blue filter B is formed.

XiR, Xi+IR, . . . are video signal lines DL connected to pixels in which the red filter R is formed.

These video signal lines DL are alternately selected by two video signal switching circuits (of course, only one video signal switching circuit may be used). Y1 is a scanning signal line GL that selects the pixel column Y1 shown in FIGS. 3 and 7. Similarly, Y2, Y3,
. . is a scanning signal line GL that selects each of the pixel columns Y2, Y3, . These scanning signals iGL
is connected to the vertical scanning circuit.

<<Structure of additional capacitance C add>> Each of the transparent pixel electrodes E1 to E3 is a film transistor T.
At the end opposite to the end connected to the FT, it is bent into an L-shape so as to overlap the adjacent scanning signal line OL. As is clear from FIG. 2C, this superposition is such that each of the transparent pixel electrodes E1 to E3 is connected to one electrode PL.
2, and a storage capacitance element (electrostatic capacitance element) Cadd is configured in which the adjacent scanning signal line GL is the other electrode PLI.

The vI electric film of this storage capacitor element C add is made of the same layer as the insulating film GI used as the gate insulating film of the thin film transistor TFT.

As is clear from FIG. 4, the storage capacitor Cadd is formed in a portion where the width of the first layer gl of the gate line GL is widened. Note that the layer g1 at the portion intersecting with the drain line DL is made thin in order to reduce the probability of short termination with the drain line.

Each of the transparent pixel electrodes E1 to E3 and the i-electrode line (g4) are overlapped to form the storage capacitor element Cadd.
Similarly to the source electrode SD1, a first conductive film d1 and a second conductive film IP1d2 are provided in a part between the transparent pixel electrode IT○1 and the transparent pixel electrode IT○1 to prevent disconnection when going over the stepped shape. There is an island area. This island region is configured to be as small as possible so as not to reduce the area (aperture ratio) of the transparent pixel electrode ITO1.

In a circuit that connects the TFT to the scanning signal line GL and the video signal line DL and opens the liquid crystal LC via the pixel electrode ITOI, an additional capacitance C add is formed between the pixel electrode ITOI and the adjacent scanning signal t%GL. has been done. In addition, a common terminal XiG. XiB. XiR
,...{This connection is made, and the part surrounded by the dashed line in FIG. 1 is expressed as one pixel.

With such a structure, as shown in FIG. 1, even if a disconnection of the video signal line DL occurs at, for example, point b, the signal voltage is supplied to all TFTs connected to the video signal line DL. Therefore, it does not become a defect. In addition, if a short circuit between the scanning signal line GL and the video signal line DL (short between G/D) occurs at the location s1, for example, by cutting it using a laser or the like at the locations indicated by the x above and below it, Defects can be eliminated. The laser pattern at this time is indicated by r1 in FIG. 2A. Furthermore, as shown in Fig. 8, if a short circuit occurs between the gate electrode GT and drain electrode GIS D2 of the TFT at a location s2, for example, it is cut using a laser or the like at the locations indicated by the x above and below it. By doing so, defects can be eliminated. The laser pattern at this time is indicated by r2 in FIG. 2A.

Furthermore, since the TFT and pixel electrode IT○1 are divided into multiple parts within one pixel (four divisions in Figure 1), even if one TFT is damaged, the remaining TFTs are normal. Since it is no longer a point defect when looking at one pixel as a whole, the probability of a point defect can be reduced and the defect can be made difficult to see.

<<Equivalent circuit of additional capacitance Cadd and its operation>> FIG. 8 shows an equivalent circuit of the pixel shown in FIG. 2A. In FIG. 8, Cgs is the gate electrode GT of the thin film transistor TFT.
and the parasitic capacitance formed between the source voltage isD1 and the source voltage isD1.

The dielectric film of the parasitic capacitance Cgs is an insulating film GI. Cp
ix is a liquid crystal capacitance formed between the transparent pixel electrode IT○1 (PIX) and the common transparent pixel electrode ITO2 (COM). The dielectric film of the liquid crystal capacitor C pix is the liquid crystal LC.
They are the protective film PS■1 and the alignment films ○RII and ORI2.

Vl. c is the midpoint potential.

The storage capacitor element C add works to reduce the influence of the gate potential change Δvg on the midpoint potential (pixel electrode potential) Vlc when the TFT switches. Expressing this situation using the formula, ΔV 1c= {(Cgs/ (Cgs+Cadd+C
pix)) XΔVg. Here, ΔVlc is ΔVg
represents the change in midpoint potential due to This change ΔVie
causes the DC component added to the liquid crystal, but the holding capacity ica
The larger dd is, the smaller its value can be.

The holding capacitor C add also has the effect of lengthening the discharge time, so that video information is stored for a long time after the TFT is turned off.

A certain reduction in the direct current applied to the liquid crystal LC can improve the life of the liquid crystal LC and reduce so-called burn-in, in which the previous image remains when switching between liquid crystal display screens.

As mentioned above, since the gate electrode GT is enlarged to completely cover the semiconductor layer AS, the overlapping area with the source/drain electrodes SDI and SD2 increases, and therefore the parasitic capacitance i C g s increases and the center point The opposite effect occurs that the potential ■↓C becomes more susceptible to the influence of the gate (scanning) signal Vg. However, by providing the holding capacity icadd, this disadvantage can also be eliminated.

The storage capacitance of the storage capacitance element C add is 4 to 8 times (4.
Cpix<Cadd<8・Cpix). 8 to 32 times the superposition capacitance Cgs (8・C gs< C ad
Set to a value of about d<32・C gs).

<Connection method of additional capacitance C add electrode line> As shown in FIG. Connected to VcomHTO2.The common transparent pixel electrode IT○2 is connected to the external lead wiring at the periphery of the liquid crystal display device by a silver paste material SL, as shown in FIG. 2B. Some of the conductive layers (gl and g2) are constructed in the same manufacturing process as the scanning signal IGL.As a result, the final stage capacitor electrode f
iGL can be easily connected to the common transparent pixel electrode ITO2.

Alternatively, as shown by the dotted line in FIG. 1, the capacitive electrode gland GL at the final stage (first stage) may be connected to the scanning signal line GL at the first stage (last stage). It should be noted that this connection can be made by external wiring instead of internal wiring within the liquid crystal display section.

[DC component cancellation by additional capacitance C add scanning signal] This liquid crystal display device uses the DC cancellation method (DC
Figure 9 (time chart) based on cancellation method)
As shown in , scanning signal? By controlling the dynamic voltage of the line DL, it is possible to further reduce the direct current applied to the liquid crystal LC. In FIG. 9, Vi is the opening voltage of an arbitrary scanning signal line GL, and Vi+1 is the scanning signal line G of the next stage.
This is the driving voltage of L. Vee is a low level dynamic voltage V d min applied to the scanning signal line GL, and Vdd is a high level dynamic voltage V d applied to the scanning signal line OL.
It is max. The voltage changes ΔV■ to ΔV of the midpoint potential Vlc (see FIG. 8) at each time 1=11 to t are as follows.

1=1, :ΔV 1. = (Ggs/C)
・V2t=t2: ΔVZ=+(C:gs/C)・(
V1 +V2)-(Cadd/C)・v2 1=1, :△V3=-(Cgs/C)・V1+(Cad
d/C)・(V↓+V2) 1=14:ΔV4= − (Cadd/C)・V
Since it is 1, the total capacity of pixels fi: C = C gs
+C pix +Cadd Here, if the idle voltage applied to the scanning signal iGL is sufficient (see Note 1 below), the DC voltage applied to the liquid crystal LC is △V, +ΔV.=(Cadd-V2- Cgs-vL)/
Therefore, if Cadd-V2=Cgs-Vl, the DC voltage applied to the liquid crystal LC becomes 0.

[Note 1: At times t1 and t2, the change in the scanning line Vi affects the midpoint potential Via, but during the period from t2 to t3, the midpoint potential Vlc is made the same potential as the video signal potential through the signal aXi (video Enough writing of the signal〉.

The potential applied to the liquid crystal is almost determined by the potential immediately after the TFT is turned off (the TFT off period is overwhelmingly longer than the on period). Therefore, when calculating the DC component applied to the liquid crystal, the period t-t can be almost ignored, and it is sufficient to consider the potential immediately after the TFT is turned off, that is, the influence of the transient at times t, t4.

Note that the polarity of the video signal Vi is inverted for each frame or line, and the DC component due to the video signal itself is zero.

In other words, in the DC cancellation method, the decrease due to the pull in of the midpoint potential Vlc by the superposition capacitor fcgs is boosted by the rotating voltage applied to the storage capacitor element C add and the next stage scanning signal line GL (capacitive electrode line). , the DC component applied to the liquid crystal LC can be made extremely small. As a result, the life of the liquid crystal LC of the liquid crystal display device can be improved. Of course, if the gate GT is increased in size in order to improve the light shielding effect, the value of the storage capacitor C ad d may be increased accordingly.

<Overall Structure of Panel Cross Section> As shown in Figure 2B, a thin film transistor TFT and a transparent pixel electrode IT○1 are formed on the lower transparent glass substrate SUBI side with respect to the liquid crystal layer LC, and the upper transparent glass substrate S
On the UBZ side, a color filter FIL and a light-shielding black matrix pattern BM are formed. The lower transparent glass substrate SUBl side has a thickness of, for example, about 1.1 mm1.

The central part of Figure 2B shows a cross section of one pixel,
The left side shows a cross section of the left edge portion of the transparent glass substrates SUB1 and SUB2 where external lead wiring is present.

The right side shows a cross section of the right side forest portion of the transparent glass substrates SUBI and SUB2 where no external lead wiring is present.

The sealing material SL shown on the left and right sides of FIG.
Transparent glass substrates SUBI and S excluding (not shown)
It is formed along the entire edge of UB2. The sealing material SL is made of, for example, epoxy resin.

The common transparent pixel electrode ITO2 of the two examples of the upper transparent glass substrate SUB is connected at least in one place to an external lead wiring formed on the lower transparent glass substrate SUBI side by a silver paste material SIL. This external lead wiring is formed in the same manufacturing process as each of the gate electrode GT, source electrode SDI, and drain electrode SD2 described above.

Orientation film ORII and ○RI2. Transparent pixel electrode ITo, common transparent pixel electrode IT○, protective films PSVI and PSV2,
Each layer of the MAa film GI is formed inside the sealing material SL. The polarizing plate POL has a lower transparent glass substrate SUBI
, are formed on the outer surface of each of the upper transparent glass substrates SUB2.

Liquid crystal LC has a lower alignment film ○R that sets the direction of liquid crystal molecules.
It is enclosed between II and the upper alignment film RI2, and sealed by the seal portion SL.

The part alignment film ORII is formed on the protective film PSVI on the lower transparent glass substrate SUBI side.

A light shielding film BM. Color filter FIL, protective film PSV
2. A common transparent pixel electrode (COM) ITO2 and an upper alignment film RI2 are sequentially laminated. This liquid crystal display device has a lower transparent glass substrate SUBl side,
Each layer on the upper transparent glass substrate SUBZ side is formed separately, and then the upper and lower transparent glass substrates SUB1 and SUB2 are formed separately.
It is assembled by overlapping the two and sealing the liquid crystal LC between them.

<Thin Film Transistor TFT> The thin film transistor TFT operates such that when a positive bias is applied to the gate electrode GT, the channel resistance between the source and drain becomes small, and when the bias is reduced to zero, the channel resistance becomes large.

The thin film transistor TFT of each pixel has two
It is divided into two (plurality) of thin film transistors (divided thin film transistors) TFTI and TFT2.

Thin film transistor TFTI. Each of the TFTs 2 has substantially the same size (channel length and width are the same). These divided thin film transistors TFT1 and TF
Each of T2 is mainly a gate electrode GT and a gate insulating film G.
It is composed of an I, i type (intrinsic, not doped with conductivity type determining impurities) amorphous Si semiconductor layer AS, a pair of source electrodes SDI, and a drain electrode 1sD2. Note that the source and drain are originally determined by the bias polarity between them, and in the circuit of this display device, the polarity is reversed during operation, so it should be understood that the source and drain are interchanged during operation. However, in the following explanation as well, for convenience, one side is fixed as a source and the other side is fixed as a drain.

<Gate Electrode aT> As shown in detail in FIG. 4 (a plan view depicting only layers g1, g2, and AS in FIG. 2A), the gate electrode GT is arranged vertically from the scanning signal line GL (in FIG. 2A and It is constructed in a shape that protrudes upward (in FIG. 4) (branched into a T-shape). The gate electrode GT is connected to the thin film transistor TFTI. It is designed to protrude to the respective formation regions of the TFTs 2. Thin film transistor TFT1, TF
The respective gate electrodes GT of T2 are integrally formed (as a common gate electrode) and are formed continuously to the scanning signal line GL. The gate electrode GT is composed of a single-layer first conductive film g1 so as not to form a large step in the formation region of the thin film transistor TFT. The first conductive film g1 is formed using, for example, a chromium (Cr) film formed by sputtering, and has a thickness of about 1000 mm.

As shown in FIGS. 2A, 2B, and 4, the gate electrode GT is formed to be thicker than the semiconductor layer AS (as viewed from below) so as to completely cover the semiconductor layer AS. Therefore, when a backlight BL such as a fluorescent lamp is attached below the substrate SUBI, the opaque Cr gate electrode GT casts a shadow and the backlight light does not shine on the semiconductors and IQAs. TFT off-characteristic deterioration is less likely to occur. The original size of the gate electrode GT is the minimum width required to span between the source/drain electrodes SDI and SD2 (including the alignment margin between the gate electrode and the source/train electrode), and the channel width. The depth length that determines W is determined by the ratio to the distance (channel length) L between the source and drain electrodes, that is, the factor W/L that determines the mutual conductance gm.

The size of the gate electrode in this embodiment is of course larger than the original size mentioned above.

Considering only the gate and light shielding functions of the gate electrode GT, the gate electrode and its distribution aGL may be integrally formed in a single layer, and in this case, Si is used as the opaque conductive material.
containing Al. Pure AL. and A1 containing Pd
etc. can be selected.

<<Scanning Signal Line OL>> The scanning signal line OL is composed of a composite film including a first conductive film g1 and a second conductive film g2 provided on the first conductive film g1. The first conductive film gl of the scanning signal line GL is formed in the same manufacturing process as the first conductive film gl of the gate electrode GT, and is configured integrally with the first conductive film gl. The second conductive film g2 is formed using, for example, an aluminum (AQ) film formed by sputtering, and has a thickness of about 2000 to 4000 cm. The second conductive film g2 reduces the resistance value of the scanning signal line GL and increases the signal transmission speed (improves the writing characteristics of pixel information)
It is structured so that it can be achieved.

Further, the scanning signal line GL is configured such that the width of the second conductive film g2 is smaller than the width of the first conductive film g1. That is, the scanning signal line GL has a gradual step shape on its side wall.

<Gate Insulating Film GI> The insulating film GI is used as a gate insulating film of each of the thin film transistors TFTI and TFT2.

The insulating film GI is formed above the gate electrode GT and the scanning signal aGL. The ti@R film Gl is, for example, a silicon nitride film formed by plasma CVD, and
: Formed with a film thickness of about 100%.

<<Semiconductor Layer AS>> As shown in FIG. 4, the i-type semiconductor WAS is used as a channel formation region of each of the thin film transistors TFTI and TFT2 which are divided into a plurality of parts.

The i-type semiconductor IAs is formed of an amorphous silicon film or a polycrystalline silicon film, and is formed to have a thickness of about 1800C.

This i-type semiconductor layer AS is made of Si by changing a certain amount of the supplied gas.
, N4 gate insulating film Gl are formed in the same plasma CVD apparatus without being exposed to the outside from the apparatus. Also, P for ohmic contact
The N'' layer dO (Figure 2B), doped with , N+ layer DO and i layer AS are shown in FIGS. 2A and 2B.
The structure is patterned into independent islands as shown in FIG.

The i-type semiconductor layer AS is located at the intersection of the scanning signal line OL and the video signal line DL (as shown in detail in FIGS. 2A and 4).
The cross-over section) is also provided between the two. This intersection i-type semiconductor layer AS is connected to the scanning signal line G at the intersection.
It is designed to reduce short circuits between L and the video signal line DL.

<<Source/drain electrodes SDI, SD2> The source electrodes SDI and drain electrodes SD2 of the thin film transistors TFTI, TFT2 divided into multiple parts are shown in FIGS. 2A, 2B, and 5 (ldl to d3 in FIG. 2A). As shown in detail in the plan view (only a top view), they are provided spaced apart from each other on the semiconductor layer AS.

Each of the source electrode SDI and drain electrode SD2 is N+
From the lower layer side in contact with the type semiconductor layer dO, the first conductive film dl
, a second conductive film d2, and a third conductive film d3 are sequentially stacked on top of each other. the first conductive film d1 of the source electrode SDI;
The second conductive film d2 and the third conductive film d3 are connected to the drain electrode S.
They are formed in the same manufacturing process as each of D2.

The first conductive film d1 is a chromium film formed by sputtering, and has a film thickness of SOO to 1000 [people] (in this example, 60
It is formed with a film thickness of 0 [film thickness of about 100%]. As the chromium film is formed thicker, the stress increases;
The film should be formed within a range that does not exceed the thickness of a human body.

The chromium film has good contact with the N+ type semiconductor layer do. In the chromium film, the aluminum of the second conductive film d2, which will be described later, is an N+ type semiconductor J? ? prevent diffusion into dO,
It constitutes a so-called barrier layer. As the first conductive film d1, in addition to the chromium film, high melting point metals (Mo, Ti,
T a , W ) film, high melting point metal silicide (Mo
Si2. TiSi. ．． TaSi,,WSj. ) May be shaped with a membrane.

After patterning the first conductive film d1 by photo processing, the N+ layer do is removed using the same photo processing mask or using the first conductive film d1 as a mask. In other words, the portion of the N+ layer do remaining on the iNAS except for the first conductive film d1 is removed by the self-alignment line.

At this time, since the N+ layer do is etched so that its entire thickness is removed, the i/i AS is also slightly etched on its surface, but the extent can be controlled by the etching time.

Thereafter, the second conductive film d2 is formed by aluminum sputtering to a thickness of 3000 to 4000 [A] (in this embodiment, about 3000 [A]). The aluminum film has less stress than the chromium film, and can be formed to a large thickness, so that it can be used for the source electrode SDI. It is designed to reduce the resistance values of the drain electrode SD2 and the video signal line DL. In addition to the aluminum film, the second conductive film d2 may be formed of an aluminum film containing silicon (Si) or copper (Cu) as an additive.

After patterning the second conductive film d2 using a photoprocessing technique, a third conductive film d3 is formed. This third conductive film d3 is a transparent conductive film (Induim-T) formed by sputtering.
from in-Oxide ITO: Nesa membrane),
1000 to 2000 [input film thickness (in this example, 12
It is formed with a film thickness of about 0.00 [in]. This third guide 'R
The film d3 constitutes a source electrode SDI, a drain electrode SD2, and a video signal line DL, and also constitutes a transparent pixel electrode ITO.
1.

First conductive film d1 of source electrode SDI, drain electrode SD
Each of the second ↓ conductive films di extends more inward (into the channel region) than the upper second conductive film d2 and third conductive film d3.

In other words, the first conductive film d1 in these parts is
The structure is such that the gate length L of the thin film transistor TFT can be defined independently of 2 and d3.

As described above, the source electrode SDI is connected to the transparent pixel electrode IT.
Connected to OI. The source electrode SDI has a step shape of the i-type semiconductor layer AS (film thickness of the first conductive film g1.N"Nd
The step is formed along a step corresponding to the sum of the film thickness of O and the film thickness of the i-type semiconductor layer AS. Specifically, the source electrode SDI includes a ↓-th conductive film d1 formed along the step shape of the i-type semiconductor layer AS, and this first conductive film d1.
1, a second conductive film d2 whose side connected to the transparent pixel electrode ITOI is smaller than that of the second conductive film d2, and a third conductive film d2 connected to the first conductive film d1 exposed from the second conductive film. It is composed of a film d3. Source electrode SDI
The second conductive film d2 is thicker than the first conductive film d1 due to increased stress, and cannot overcome the stepped shape of the i-type semiconductor layer AS.
It is designed to overcome the In other words, the step coverage is improved by forming the second conductive film d2 thickly. Since the second conductive film d2 can be formed thickly,
This greatly contributes to reducing the resistance value of the source electrode sD1 (the same applies to the drain electrode SD2 and the video signal line DL). The third conductive film d3 is an i-type semiconductor I of the second conductive film d2.
Since the step shape caused by As cannot be overcome, the size of the second conductive film d2 is reduced so that it is connected to the exposed first conductive film d1. The first conductive film d1 and the third conductive film d3 not only have good adhesion but also have a small step shape at the connection between them.
Can be connected reliably.

<Pixel Electrode ITOI> The transparent pixel electrode IT○1 is provided for each pixel and constitutes one of the pixel electrodes of the liquid crystal display section. The transparent pixel electrode IT○1 is divided into three transparent pixel electrodes (divided transparent pixel electrodes) El and E2 corresponding to the plurality of divided thin film transistors TFT1 and TFT2 of the pixel, respectively. Transparent pixel electrode El. E2 are each connected to the source electrode SDI of the thin film transistor TFT.

Each of the transparent pixel electrodes E1 and E2 is patterned to have substantially the same area.

In this way, the thin film transistor TFT of one pixel is divided into a plurality of thin film transistors TFTI and TFT2, and each of the divided thin film transistors TFTI and TFT2 has a plurality of divided transparent pixel electrodes El. By connecting each of E2, a divided portion (for example, TF
Even if the TI) becomes a point defect, it is no longer a point defect when viewed from the perspective of the entire pixel (TFT2 is not defective), so the probability of a point defect can be reduced and the defect can be made difficult to see. Further, by configuring each of the divided transparent pixel electrodes E1 and E2 of the pixel to have substantially the same area, the transparent pixel electrode E1 and E2 and the common transparent pixel electrode IT○2 are configured. Each liquid crystal capacitance (Cpix) can be made uniform.

<<Protective Film PSVI> A protective film PSVI is provided over the thin film transistor TFT and the transparent pixel electrode IT○.

The protective film PSVI is mainly used to protect the thin film transistor TFT from moisture, etc., and a film with high transparency and good moisture resistance is used. The protective film PSVI is made of, for example, a silicon oxide film or a silicon nitride film formed by plasma CVD, and is formed to have a thickness of approximately gooocλ.

<<Light-shielding film BM>> A shielding film BM is provided on the upper substrate SUBZ side to prevent external light (light from above in FIG. 2B) from entering the i-type semiconductor layer AS used as a channel formation region, The pattern is as shown in the hatching in Fig. 6.In addition, Fig. 6 shows the IT○ film layer d3 in Fig. 2A,
FIG. 3 is a plan view depicting only the filter IFIL and the light shielding film BM.

The light-shielding film BM is made of, for example, an aluminum film or a chromium film, which has a high light-shielding property, and in this embodiment, the chromium film is formed by sputtering to a thickness of about 1300 μm. .

Therefore, the common semiconductor layer AS of TFTI, 2 is sandwiched between the upper and lower light shielding films BM and the thick gate electrode GT, and that portion is not exposed to external natural light or backlight light. The light shielding film BM is formed around the pixel as shown by the hatched area in FIG. There is. Therefore, the outline of each pixel becomes clear due to the light shielding film BM, and the contrast is improved. In other words, the light shielding film BM is the semiconductor I
It has two functions: shading against As and serving as a black matrix.

In addition, the backlight is installed on the SUBZ side, and the SUBI
can also be set as the observation side (externally exposed side).

<Common electrode IT○2> The common transparent pixel electrode ITO2 is connected to the lower transparent glass substrate SU
Transparent pixel electrode f-m I T provided for each pixel on the BI side
The optical state of the liquid crystal is opposite to each pixel electrode I.
It changes in response to the potential difference (electric field) between TOI and common electrode IT02. A common voltage Vcom is applied to this common transparent pixel electrode ITO2. The common voltage V cow is an intermediate potential between the low-level opening voltage V d min and the high-level opening voltage V d max that are applied to the video signal line DL.

<Color Filter FIL> The color filter FIL is configured by coloring a dyed base material made of a resin material such as an acrylic resin with a dye.

The color filter FIL is formed in a dot shape for each pixel at a position facing the pixel (Fig. 7), and is dyed differently (Fig. 7 shows the third conductive film layer d3 and the color filter layer FIL in Fig. 3). The R, G, and H filters are each 45° 135" (cross hatched).The color filter FIL is connected to the pixel electrode IT○1 (E1) as shown in Figure 6. , E2), and the light shielding film BM is a color filter FI.
It is formed inside the peripheral portion of the pixel electrode ITO↓ so as to overlap with the edge portion of the pixel electrode ITO↓ and the pixel electrode ITOI.

Color filter FIL can be formed as follows. First, a dyed base material is formed on the surface of the upper transparent glass substrate SUB2, and the dyed base material other than the red filter forming area is removed using photolithography technology. Thereafter, the dyed base material is dyed with a red dye and subjected to a fixing treatment to form a red filter R. Next, a green filter G and a blue filter B are sequentially formed by performing similar steps.

The protective film PSV2 is provided to prevent the dyes used to dye the color filters FIL into different colors from leaking into the liquid crystal LC. The protective film PSV2 is made of, for example, a transparent resin material such as acrylic resin or epoxy resin.

<<Pixel Arrangement>> As shown in FIGS. 3 and 7, a plurality of pixels of the liquid crystal display section are arranged in the same column direction as the direction in which the scanning signal line OL extends, and are arranged in pixel columns Yl, Y2, Y3. , Y4,... Each pixel column Y1, Y2, Y3, Y4
, . . . each pixel is a thin film transistor TFTI,
The TFT 2 and the transparent pixel electrodes E1 and E2 are arranged in the same position.

Embodiment 2 FIG. 10 is an equivalent circuit diagram showing a liquid crystal display section of a liquid crystal display device according to a second embodiment of the present invention, and FIG. 11 is an equivalent circuit diagram showing one pixel of the liquid crystal display section of the liquid crystal display device of FIG. FIG. 12 is a plan view of the main parts of a liquid crystal display section in which a plurality of pixels of the second embodiment are arranged, and FIG. 13 is a plan view of the main parts of the liquid crystal display section shown in FIG. 12. FIG. 14 is a plan view of the main part in a state where only the pixel electrode layer and color filter layer shown in FIG. FIG.

The difference from the first embodiment is that in the first embodiment, the pixel electrode was placed on the right side of the video signal line and the TFT was placed on the left side, as shown in FIG. In the example,
This is a configuration in which color filters are arranged in a staggered manner by alternately arranging pixel electrodes on the left and right for each row of the scanning signal 1i.

<<Pixel Arrangement>> As shown in FIGS. 12 and 13, a plurality of pixels of the liquid crystal display section are arranged in the same column direction as the direction in which the scanning signal line GL extends, and are arranged in pixel columns Yl, Y2, Y3. ,Y4,...
・Constitutes each of the following. Each pixel column Yl, Y2, Y3,
Each pixel of Y4,... is a thin film transistor TFT.
The arrangement positions of the TFT 2 and the transparent pixel electrodes E1 and E2 are the same.

In other words, each pixel of the odd-numbered pixel columns Yl, Y3, . . . is connected to a thin film transistor TFTI. The TFT 2 is arranged on the left side, and the transparent pixel electrodes E1 and E2 are arranged on the right side (in FIG. 10). Odd pixel rows Yl, Y3,
. . . adjacent even-numbered pixel columns Y2, Y4,
Each pixel of... is an odd pixel column Y1, Y3,...
Each pixel is made up of pixels that are symmetrically turned upside down with respect to the extending direction of the video signal line DL. That is, in each pixel of even numbered pixel columns Y2, Y4, . . . , the capillary transistors TFT1 and TFT2 are arranged on the right side,
The transparent pixel electrodes E1 and E2 are arranged on the left side.

As a result, as shown in FIG. 13, the RGB color filters FIL can be arranged in a triangle. The RGB triangular arrangement 22 structure of the color filter FIL is more uniform in the vertical and horizontal directions than the striped arrangement, so that the resolution of the color image can be improved.

Although the invention made by the present inventor has been specifically explained based on the above embodiments, the present invention is not limited to the above embodiments, and can be modified in various ways without departing from the gist thereof. Of course.

For example, although this embodiment shows an inverted staggered structure in which gate electrode formation → gate insulating film formation → semiconductor layer formation → source/drain electrode formation, the present invention is also effective in a staggered structure in which the vertical relationship or the order of formation is reversed. be.

[Effects of the Invention] As explained above, according to the present invention, since one pixel is constructed by a plurality of video signal lines, defects due to disconnection of the video signal line do not occur, and the video signal line and the scanning signal line are connected. A defect caused by a short circuit can also be corrected by cutting the video signal line across the short circuit. Furthermore, by forming multiple sets of TFTs and pixel electrodes within one pixel, point defects can be easily viewed.

″r1 Furthermore, since an additional capacitor can be formed for each pixel, deterioration in image quality, that is, deterioration in retention characteristics due to a decrease in liquid crystal resistance does not occur.

[Brief explanation of drawings]

FIG. 1 is an equivalent circuit diagram showing the liquid crystal display section of the active matrix color liquid crystal display device according to the first embodiment of the present invention, and FIG. Figure 2B is a cross-sectional view of the part taken along the line IIB-IIB in Figure 2A and the area around the seal part; Figure 2C is a cross-sectional view taken along the line IIB-IIB in Figure 2A; 3 is a plan view of a main part of a liquid crystal display section in which a plurality of pixels shown in FIG. 2A are arranged; FIGS. 4 to 6 are a cross-sectional view taken along a line of FIG. FIG. 7 is a plan view of the main part in a state where only the pixel electrode layer and color filter layer shown in FIG. 3 are superimposed, FIG. An equivalent circuit diagram of a pixel; FIG. 9 is a time chart showing the inductive voltage of a scanning signal line using the DC cancellation method; FIG. 10 is a diagram showing a liquid crystal display section of a liquid crystal display device according to a second embodiment of the present invention. Equivalent circuit diagram, Fig. 11 is a plan view of essential parts showing one pixel of the liquid crystal display part of the liquid crystal display device of the first engineering drawing, and Fig. 12 is a liquid crystal display in which a plurality of pixels of the above second embodiment are arranged. Fig. 13 is a plan view of the main part in a state where only the pixel electrode layer and the color filter layer shown in Fig. 12 are overlapped.

Claims (1)

[Claims] 1. Each pixel has a plurality of TFTs and pixel electrodes corresponding to the TFTs, at least two video signal lines are commonly wired as a set, and additional capacitance is created by crossing the scanning signal line and the pixel electrode. An active matrix type liquid crystal display device characterized by the formation of an active matrix liquid crystal display device.