JPH0356938A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To obtain a liquid crystal display device whose working efficiency is excellent and which have a low production cost and is difficult to cause a defect by constituting the protective film of a thin film transistor of resin having higher light transmissivity than that of an oriented film. CONSTITUTION:The protective film PSV1 is provided on the thin film transistor TFT and a transparent picture element electrode ITO1. the protective film PSV1 is formed mainly in order to protect the thin film transistor TFT from moisture, etc., and a substance which has high light transmissivity and is excellent in moisture resistance is used as the protective film. Namely, the protective film PSV1 is formed of aminosilane modified epoxy resin, so that a vacuum device such as an expensive CVD device, etc., is not needed in order to provide the protective film PSV1. Thus, the working efficiency is enhanced and the production cost is made low. Furthermore, an insulating film GI is not damaged in the case of forming the protective film PSV1 because the material of the protective film PSV1 is different from that of the insulating film GI, thereby preventing the defect of the thin film transistor TFT from occurring.

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to a liquid crystal display device, and particularly to an active matrix type liquid crystal display device using thin film transistors and the like. [Prior Art] An active matrix type liquid crystal display device is one in which a nonlinear element (switching element) is provided corresponding to each of a plurality of pixel electrodes arranged in a matrix. Theoretically, the liquid crystal in each pixel is constantly moving (duty ratio 1.0), so compared to the so-called simple matrix method, which uses a time-division drive method, the active method has better contrast, which is especially important for color. It is becoming an indispensable technology. A typical switching element is a thin film transistor (TPT). In conventional active matrix type liquid crystal display devices, inorganic films such as silicon nitride and silicon oxide are used as protective films for thin film transistors. Note that an active matrix type liquid crystal display device using thin film transistors is described in, for example, "12.5 type active matrix type color liquid crystal display adopting redundant structure", Nikkei Electronics, pp. 193-2.
10, December 15, 1986, published by Nikkei McGraw-Hill.

[Problems to be solved by the invention] However, in such a liquid crystal display device, a vacuum device such as a CVD device is used to provide a protective film, so the work efficiency is poor and the CVD device is expensive. Therefore, the manufacturing cost is high, and since the gate insulating film of the thin film transistor is also made of the same type of inorganic film, the gate insulating film is easily damaged when forming the protective film, resulting in defects in the thin film transistor. The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a liquid crystal display device that has good working efficiency, low manufacturing cost, and is less likely to cause defects in thin film transistors. [Means for Solving the Problems 1] In order to achieve this object, in the present invention, in an active matrix type liquid crystal display device in which a thin film transistor and a pixel electrode are one constituent element of a pixel, a protective film of the thin film transistor is provided. is made of a resin that has better light transmittance than the alignment film. Further, in an active matrix type liquid crystal display device in which a thin film transistor and a pixel electrode are one constituent element of a pixel, the protective film of the thin film transistor is made of epoxy resin, and an alignment film is provided on the protective film. [Function] In these liquid crystal display devices, a vacuum device is not used to provide the protective film, and the material of the protective film is different from the material of the insulating film used as the gate insulating film. [Embodiments] Hereinafter, the structure of the present invention will be described together with an embodiment in which the present invention is applied to an active matrix color liquid crystal display device. In addition, in an attempt to explain the embodiments, parts having the same functions are given the same reference numerals, and explanations of their edges will be omitted. FIG. 2A is a plan view showing one pixel and its surroundings of an active matrix color liquid crystal display device to which the present invention is applied, and FIG. 2B is a cross section taken along the line IIB-nB in FIG. 2A and a seal portion of the display panel. FIG. 2C, which shows a nearby cross section, is a sectional view taken along the nc-mc line in FIG. 2A. Moreover, FIG. 3 (main part plan view) shows a plan view when a plurality of pixels shown in FIG. 2A are arranged. <Pixel Arrangement> As shown in Figure 2A, each pixel is connected to two adjacent scanning signal lines (gate signal line or horizontal signal line) OL and two adjacent video signal lines (drain signal line or vertical signal line). line) is placed within the intersection area with DL (in the area surrounded by the four signal lines). Each pixel is a thin film transistor TPT
, transparent pixel electrode ITOI and storage capacitor element C add
including. The scanning signal lines GL extend in the column direction, and a plurality of scanning signal lines GL are arranged in the row direction. The video signal lines DL extend in the row direction, and a plurality of video signal lines DL are arranged in the column direction. <Overall cross-sectional structure of display section> As shown in Figure 2B, a thin film transistor TPT and a transparent pixel electrode IT○1 are formed on the lower transparent glass substrate SUBI side with respect to the liquid crystal LC, and the upper transparent glass substrate S
On the UB2 side, a color filter F I L and a light shielding film BM having a light shielding black matrix pattern are formed. For example, the lower transparent glass substrate SUB 1 is 1
．． 1[v++1]. The central part of Figure 2B shows a cross section of one pixel,
The left side shows the cross section of the left edge of the transparent glass substrates SUBI and SUB2 where external lead wiring exists, and the right side shows the cross section of the right edge of the transparent glass substrates SUB1 and SUB2 where no external lead wiring exists. It shows. The sealing materials SL shown on the left and right sides of FIG. 2B are configured to seal the liquid crystal LC, and are used to seal the transparent glass substrates SUBI and S except for the liquid crystal sealing opening (not shown).
It is formed along the entire edge of UB2. The sealing material SL is made of, for example, epoxy resin. Common transparent pixel electrode IT on the upper transparent glass substrate Sun2 side
O2 is supplied to the silver paste material SI at least in one place.
It is connected to the external lead wiring formed on the lower transparent glass substrate SUBI side by L. This external lead wiring includes the gate ffiaT, the source electrode SDI, and the drain electrode S.
It is formed in the same manufacturing process as each of D2. Orientation film ORII, ORI2, transparent pixel electrode ITO1, common transparent pixel electrode IT○2, protective film PsV1, PSV2,
Each layer of the tightening film Gl is formed inside the sealing material SL. Polarizing plates POL1 and POL2 are formed on the outer surfaces of the lower transparent glass substrate SUBI and the upper transparent glass substrate SUB2, respectively. Liquid crystal LC has a lower alignment film ○RI that sets the direction of liquid crystal molecules.
I and the upper alignment film ORI2. Seal part S
It is sealed by L. The lower alignment film ORII is formed on the protective film PSVI on the lower transparent glass substrate SUB1 side. The inner surface (liquid crystal LC side) of the upper transparent glass substrate SUB2 is provided with a light shielding film BM, a color filter FIL, and a protective film P.
SV2, a common transparent pixel electrode ITO2 (COM), and an upper alignment film ○R42 are provided by laminating one after another. This liquid crystal display device is constructed by separately forming layers on the lower transparent glass substrate SUB1 side and the upper transparent glass substrate SUB2 side, and then stacking the upper and lower transparent glass substrates SUBI and SUB2, and sealing the liquid crystal LC between them. Can be assembled. <Thin Film Transistor TPT> The thin film transistor TPT operates such that when a positive bias is applied to the gate electrode GT, the channel resistance between the source and drain becomes small, and when the bias is reduced to zero, the channel resistance becomes large. The thin film transistor TPT of each pixel has three
It is divided into two (plurality) of thin film transistors (divided thin film transistors) TFT1, TFT2, and TFT3. ? Jll'J}-ransistor TPTI~T
Each of the FT3s has substantially the same size (same channel length and width). Each of the divided thin film transistors TPTI to TFT3 mainly includes a gate electrode GT, a gate insulating film GI, an i-type (intrinsic,
insic, not doped with conductivity type determining impurities)
It is composed of an i-type semiconductor layer AS made of non-quality silicon (Si), a pair of source electrode SDI and drain electrode SD2. Note that the source and drain are originally determined by the bias polarity between them, and in the circuit of this liquid crystal display device, the polarity is reversed during operation, so it should be understood that the source and drain are interchanged during operation. However, in the following explanation, for convenience, one side will be fixed as the source and the other as the drain. <Gate electrode GT> The gate electrode GT is the first conductive film g1 in FIG. 4 (FIG. 2A,
As shown in detail in the plan view depicting only the second conductive film g2 and the i-type semiconductor layer As, it has a shape that protrudes vertically from the scanning signal 1iAGL (upward in FIGS. 2A and 4). (branched into a T-shape). Gate electrode GT is thin film transistor TFT1~T
F.T. It is configured to protrude to the tc area of each of the three shapes. Thin film transistor TFTI-TFT3
The respective gate electrodes GT are integrally formed (as a common gate electrode) and are continuous to the scanning signal line GL. The gate electrode GT is formed of a single-layer first conductive film GL so as not to form a large step in the formation region of the thin film transistor TPT. First conductive Ml film g1
For example, a chromium (Cr) film formed by sputtering is used, and the film thickness is about 1,000 mm. As shown in FIGS. 2A, 2B, and 4, this gate electrode GT is formed to be thicker than the i-type semiconductor mAS so as to completely cover it (as viewed from below). Therefore, when a backlight BL such as a fluorescent lamp is attached below the lower transparent glass substrate SUBI, the gate electrode GT made of opaque chrome forms a shadow, and the backlight light does not shine on the i-type semiconductor layer AS. , a conductive phenomenon due to light irradiation, that is, deterioration of the off-characteristics of the thin film transistor TPT, is less likely to occur. Note that the original size of the gate electrode GT is the source'? l m S D The minimum required (gate electrode G
The depth length that determines the channel width W is the distance between the source voltage isDl and the drain voltage +MSD2 (channel length) L, that is, the factor W/L that determines the mutual conductance gm. The size of the gate electrode GT in this liquid crystal display device is of course made larger than the original size mentioned above. Note that if we consider only from the gate and light shielding function of the gate electrode GT, the gate electrode GT and the scanning signal line OL
may be integrally formed in a single layer, in which case aluminum (Al) containing silicon is used as the opaque conductive material.
). Pure aluminum, aluminum containing palladium (Pd), etc. can be selected. <<Scanning Signal Line GL>> The scanning signal line GL is composed of a composite film including a first conductive film g1 and a second conductive film g2 provided on the first conductive film g1. The first conductive film g1 of this scanning signal line GL is the gate electrode G.
It is formed in the same manufacturing process as the first conductive film g1 of T, and is configured integrally. The second conductive film g2 is made of, for example, an aluminum film shaped by sputtering, and has a film thickness of 1000 to 55
00 [Form to have a film thickness comparable to that of a human. The second conductive film g2 is configured to reduce the resistance value of the scanning signal line GL and increase the signal transmission speed (improve the writing characteristics of pixel information). Furthermore, the width of the second conductive film g2 of the scanning signal line GL is configured to be smaller than the width of the first conductive film g1. That is, the side wall of the scanning signal line GL has a gradual step shape. <<Insulating film G■>> The fibrous film GI is the gate # of each of the thin film transistors TPTI to TFT3! Used as a membrane. The insulating film GI is formed on the gate electrode GT and the scanning signal nGL. For example, the insulating film GI is plasma C.
A silicon nitride film formed by VD is used to form a film with a thickness of about 3000 [layers]. <<I-type semiconductor layer AS> As shown in FIG. 4, the i-type semiconductor layer AS is used as a channel formation region for each of the thin film transistors TPTI to TFT3 divided into a plurality of parts. i-type semiconductor layer A
S takes the form of a non-quality silicon film or a polycrystalline silicon film, and is formed to a thickness of about 1800 [layers]. This i-type semiconductor layer AS is made of Si by changing the components of the supplied gas.
, an insulating film G used as a gate insulating film consisting of N4
They are formed continuously in the same plasma CVD apparatus without being exposed to the outside from the plasma CVD apparatus. Similarly, the P-doped N+ type semiconductor Wido (FIG. 2B) for ohmic contact is continuously formed to a thickness of approximately 400 mm. Thereafter, the lower transparent glass substrate SUB 1 was taken out from the CVD apparatus, and the N-type semiconductor MdO and the i-type semiconductor IAs were separated by photo processing technology as shown in FIGS. 2A, 2B, and 4. Patterned into islands. As shown in detail in FIGS. 2A and 4, the i-type semiconductor layer AS is also provided between the scanning signal line GL and the video signal line DL at an intersection (crossover section). The i-type semiconductor RAS at this intersection is configured to reduce short circuits between the scanning signal line GL and the video signal line DL at the intersection. <<Source electrode SDI, drain electrode SD2> The source electrode SD1 and drain electrode SD2 of each of the thin film transistors TFT↓ to TFT3 divided into a plurality of
As shown in detail in FIGS. 2B, 2B, and 5 (a plan view depicting only the first to third conductive films d1 to d3 in FIG. 2A), It is being Each of the source electrode SDI and drain electrode SD2 is
A first conductive film di, a second conductive film d2, and a third conductive film d3 are sequentially stacked from the lower layer side in contact with the N+ type semiconductor layer do. First conductive film d of source electrode SDI
i. The second conductive film d2 and the third conductive film d3 are formed in the same manufacturing process as the first conductive film d1, second conductive film d2, and third conductive film d3 of the drain electrode SD2. The first conductive film d1 is a chromium film formed by sputtering,
The film has an Ilε thickness of 500 to 1000 mm (in this liquid crystal display device, a film thickness of about 600 mm). The thicker the chromium film, the greater the stress, so
The film thickness should not exceed 000 [in]. The chromium film has good contact with the N+ type semiconductor layer do. In the chromium film, the aluminum of the second conductive film d2, which will be described later, is N+.
A so-called barrier layer is provided to prevent diffusion into the type semiconductor layer do. As the first conductive film d1, in addition to the chromium film, a high melting point metal (Mo, Ti.Ta.W) film, a high melting point metal silicide (
It may also be formed of a MoSi2, TiSi2, TaSi2, WSi2) film. After patterning the lm-th conductive film di by photoprocessing, the N+ type semiconductor layer dO is removed using the same photoprocessing mask or using the first conductive film d1 as a mask. In other words, the portion of the N+ type semiconductor layer do remaining on the i-type semiconductor J'lAS other than the first conductive film d1 is removed by the self-alignment line. At this time, since the N+ type semiconductor/9dO is etched so that its entire thickness is removed, the i-type semiconductor fflAS is also slightly etched on its surface, but the extent can be controlled by the etching time. Thereafter, the second conductive film d2 is formed by sputtering aluminum to a film thickness of 3000 to 5500 [in this liquid crystal display device, a film thickness of about 3500 (:λ]).The aluminum film is formed into a chromium film. Compared to the source electrode SDI, it has less stress and can be formed into a thicker film.
, the resistance values of the drain electrode SD2 and the video signal line DL are reduced. The second conductive film d2 may be formed of an aluminum film containing silicon or copper (Cu) as an additive in addition to the aluminum film. After patterning the second conductive film d2 by photo processing technology,
A third conductive film d3 is formed. This third conductive film d3 is a transparent conductive film (Induim-
It is made of Tin-Oxide ITO (nesa film) and has a film thickness of about 1000 to 2000 mm (in this liquid crystal display device, the film thickness is about 1200 mm). This third conductive film d3 includes a source electrode SDI and a drain electrode S
D2 and a video signal line DL, and also a transparent pixel electrode TTOI. First conductive film d1 of source electrode SDI, drain electrode SD
Each of the two first conductive films d1 has an upper second conductive film d1.
The conductive film d2 and the third conductive film d3 extend further inward (into the channel region). In other words, the tR electrical film d1 in these parts is configured to be able to define the gate length L of the thin film transistor TPT independently of the second electrically conductive film d2 and the third electrically conductive film d3. The source electrode SDI is connected to the transparent pixel electrode ITOI. The source electrode SD1 has a step shape of the i-type semiconductor layer AS (a step corresponding to the sum of the film thickness of the ↓th conductive film g1, the film thickness of the N'' type semiconductor JIldO, and the film thickness of the i-type semiconductor, IIAS). Specifically, the source electrode SDI includes a l-th conductive film d1 formed along the step shape of the i-type semiconductor layer As, and a first conductive film d1 formed along the step shape of the i-type semiconductor layer As.
1, a second conductive film d2 is formed on the side connected to the transparent pixel electrode ITOI in a smaller size than that of the second conductive film d2, and a third conductive film d2 is connected to the first conductive film d1 exposed from the second conductive film d2. It is composed of a film d3. The second conductive film d2 of the source electrode SDI cannot be formed thickly because the chromium film of the first conductive film d1 increases stress, and cannot overcome the stepped shape of the i-type semiconductor layer AS. It is designed to overcome. In other words, the stepping force barrier is improved by forming the second conductive film d2 to be thick. Since the second conductive film d2 can be formed thickly, the resistance value of the source tj 1-pole SDI (the same applies to the drain tt'ffisD2 and the video signal line DL)
This greatly contributes to the reduction of The third conductive film d3 is the second P
I. Since the step shape caused by the i-type semiconductor layer AS of the electrical film d2 cannot be overcome, the size of the second electrically conductive film d2 is reduced to connect it to the exposed first electrically conductive film d1. There is. The first conductive film d↓ and the third conductive film d3 not only have good adhesion, but also have a small step shape at the connection between them, so that the source electrode SDI and the transparent pixel electrode ITOI can be reliably connected. I can do it. <Transparent Pixel Electrode IT○1> A transparent pixel electrode ITO is provided for each pixel, and constitutes one of the pixel electrodes of the liquid crystal display section. The transparent pixel electrode ITOI has three transparent pixel electrodes corresponding to each of the plurality of transparent transistors TPTI to TFT3 of the pixel.
Two divided transparent pixel electrodes El. It is divided into E2 and E3. The divided transparent pixel electrodes E1 to E3 are each connected to the source electrode SDI of the thin film transistor TPT. Each of the divided transparent pixel electrodes El to E3 is patterned to have substantially the same area. In this way, the thin film transistor TPT of the pixel is divided into a plurality of thin film transistors TPTI to TFT3, and each of the divided transparent pixel electrodes E1 to E3 is connected to each of the divided thin film transistors TPTI to TFT3. Even if a part of the pixel (for example, thin film transistor TFTI) becomes a point defect, it is no longer a point defect when looking at the entire pixel (thin film transistor TFT2).
and thin film transistor TFT3 are not defective), so
The probability of point defects can be reduced, and defects can be made difficult to see. Moreover, by configuring each of the divided transparent pixel electrodes E1 to E3 to have substantially the same area, the divided transparent pixel electrode E
It is possible to make the liquid crystal volumes fk C pix of each of the pixels 1 to E3 and the common transparent pixel electrode IT○2 uniform. <<Protective film PSVI> As also shown in FIG. 1A, a protective film PSVI is provided over the thin film transistor TPT and the transparent pixel electrode IT○↑. The protective film PSVI is mainly used for thin film transistors TP.
It is formed to protect the T from moisture, etc., and a material with high light transmittance and good moisture resistance is used. Protective film P
SVI is an aminosilane-modified epoxy resin (patent application 1986).
- No. 88594), and has a film thickness of about 0.5 [-11]. Since the protective film PSVI is made of aminosilane-modified epoxy resin, it is expensive to provide the protective film PSVI.
Since a vacuum device such as a C VD device is not used, the work efficiency is high and the manufacturing cost is low. Furthermore, since the material of the protective film PSVI is different from the material of the insulating film GI, the insulating film GI is not damaged when forming the protective film PSVI, so that defects in the thin film transistor TPT do not occur. ．． Note that when the thickness of the protective film PSVI is 0.2[-1 or less, the three-film transistor TPT has no protective effect, and when the thickness of the protective film PSVI is 1.5[/7ffl or more, the liquid crystal LC Since there is a delay in operation, the protective film P
It is desirable to set the film thickness of Sv↓ to 0.3 to 1.3 [lM]. <<Light-shielding film BM>> A shielding film BM is provided on the upper transparent glass substrate SUBZ side to prevent external light (light from above in FIG. 2B) from entering the i-type semiconductor layer AS used as a channel-shaped region.
is provided, and the shielding film BM has a pattern as shown by hatching in FIG. Note that FIG. 6 is a plan view depicting only the third conductive film d3 made of the IT◯ film, the color filter FIL, and the light shielding film BM in FIG. 2A. The light shielding film BM is formed of a film having a high light shielding property, such as an aluminum film or a chromium film, and in this liquid crystal display device, the chromium film is formed by sputtering to a thickness of about 130Q. Therefore, i of thin film transistors TFTI to TFT3
The type semiconductor layer AS is sandwiched between the upper and lower light shielding films BM and the thick gate electrode GT, and that portion is not exposed to external natural light or backlight light. The light shielding film BM is formed around the pixel as shown by the hatched area in FIG. ing. Therefore, the outline of each pixel becomes clear due to the light shielding film BM, and the contrast is improved. In other words, the light-shielding film BM has two functions for the i-type semiconductor layer AS: allowing light and serving as a black matrix. Note that the backlight can be attached to the upper transparent glass substrate SUBz side, and the lower transparent glass substrate SUB 1 can be set as the observation side (externally exposed side). <<Common transparent pixel electrode ITO2> The common transparent pixel electrode ITO2 is connected to the lower transparent glass substrate SU
Opposing the transparent pixel electrode ITOI provided for each pixel on the BI side, the optical state of the liquid crystal LC changes in response to the potential difference (electric field) between each pixel electrode ITOI and the common transparent pixel electrode TTO2. This common transparent pixel electrode IT○2 has a common voltage vcol! It is arranged so that l is applied. The common voltage Vcom is an intermediate potential between the low-level running voltage VdIIin and the high-level running voltage Vdmax applied to the video signal line DL. <Color Filter FIL> The color filter FIL is constructed by coloring a dyed base material formed of a resin material such as acrylic resin with a dye. The color filter FIL is shaped like a dot for each pixel at a position facing the pixel (Figure 7), and is dyed differently (
Figure 7 shows the third conductive film polishing d3 and color filter F in Figure 3.
It depicts only IL, R. G. (Each color filter FIL in B is 45", 135°, and cross-hatched, respectively).As shown in FIG. 6, the color filter FIL covers all of the transparent pixel electrodes I The light-shielding film BM is formed to be thick so as to cover the color filter FIL and the transparent pixel electrode ■T○1 so as to overlap with the edge portion of the transparent pixel tl[xTOI. The FIL can be shaped as follows: First, a dyed base material is formed on the surface of the upper transparent glass substrate SUB2, and the dyed base material other than a certain area in the red filter shape is removed using photolithography technology. After that, the dyed base material is dyed with a red dye and subjected to a fixing treatment to form a red filter R. Next, by performing the same process, a green filter G and a blue filter B are sequentially formed. Film PSV2> The protective film PSV2 is provided to prevent the dyes used to dye the color filter FIL into different colors from leaking into the liquid crystal LC.The protective film PSV2 is formed of a transparent resin material such as acrylic resin or epoxy resin. <Pixel Arrangement> As shown in FIGS. 3 and 7, a plurality of pixels of the liquid crystal display section are arranged in the same column direction as the direction in which the scanning signal line OL extends. , X2.X3, X4, .... Each pixel column Xi, X2, X3, X
4, +71 each pixel includes thin film transistors TFTI to TFT3 and divided transparent pixel electrodes E1 to E3.
The arrangement positions are the same. In other words, the odd pixel row X1. , X3, . . ., the thin film transistors TPT{~TFT3 are arranged on the left side, and the divided transparent pixel electrodes E1 to E3 are arranged on the right side. Each pixel in the even numbered pixel columns X2, X4, . . . adjacent to each of the odd numbered pixel columns Xi, X3, . It is composed of pixels that are symmetrically turned upside down with respect to the extending direction of the video signal line DL. That is, pixel row X2,
Each pixel of X4,... is a thin film transistor T
The arrangement position of PTI~TFT3 is on the right side, transparent pixel electrode E1
~ E3 is arranged on the left side. Then, each pixel in the pixel columns X2, X4,...
The pixels are shifted (shifted) by half a pixel in the column direction with respect to each pixel of X3, . . . In other words,
If each pixel interval of pixel row X is 1.0 (1.0 pitch), then the next pixel row or each pixel interval is 1.0,
0.5 pixel interval (0.5 pixel interval in the column direction for the previous pixel column
5 pitches) is off. The video signal line DL extending in the row direction between each pixel is configured to extend in the column direction by a half pixel interval (0.5 pitch) between each pixel column X. As a result, as shown in FIG. 7, the pixels in the previous pixel row X on which the predetermined color filter is applied (for example, the pixels on the pixel row pixels (for example, pixel row X
The pixels in which the red filter R of No. 4 is formed) are spaced apart by 1.5 pixels (1.5 pitch), and the RGB color filters FIL are arranged in a triangular shape. Color filter FI
The triangular arrangement structure of RGB of L can improve the color mixing of each color, so that the resolution of the color image can be improved. Moreover, since the video signal line DL extends in the column direction by only half a pixel interval between each pixel column X, it does not intersect with the adjacent video signal line DL. Therefore, video signal line D
It is possible to eliminate the routing of L and reduce its occupied area, and it is also possible to eliminate the detour of the video signal line DL and eliminate the multilayer wiring structure.《Equivalent circuit of the entire display device》 It is shown in FIG. XiG, Xi+IG, . . . are video signal lines DL connected to pixels in which the green filter G is formed. XiB, Xi+IB, . . . are video signal lines DL connected to the pixels in which the blue filter B is formed. Xi+IR, Xi+2R, . . . are video signal lines DL connected to pixels in which the red filter R is formed. These video signal lines DL are selected by a video signal bias circuit. Yi is a scanning signal line GL that selects the pixel column X1 shown in FIGS. 3 and 7. Similarly, each of Yi+1, Yi+2, . . . is a scanning signal line GL that selects each of the pixel columns X2, X3, . These scanning signal lines GL are connected to a vertical scanning circuit. <<Structure of storage capacitor element C add>> Each of the divided transparent pixel electrodes E1 to E3 is arranged in an L-shape so as to overlap with the adjacent scanning signal line GL at the end opposite to the end connected to the thin film transistor TPT. It is shaped by refraction. As is clear from FIG. 2C, in this superposition, each of the divided transparent pixel electrodes E1 to E3 is used as one electrode PL2, and the adjacent scanning signal, IXGL
A storage capacitor element (electrostatic capacitor element) C add is constructed with the other electrode PLI as the other electrode PLI. This storage capacitor element C add
The dielectric film is composed of the same layer as the insulating film GI used as the gate insulating film of the thin film transistor TPT. As is clear from FIG. 4, the storage capacitor element C add is formed in the widened portion of the first conductive film gl of the gate line GL. In addition, video signal! The first conductive film g1 at the portion intersecting with DL is made thin in order to reduce the probability of short circuit with the video signal line DL. Each of the divided transparent pixel electrodes E1 to E3 and the electrode PL1 are overlapped to form the storage capacitor element C add.
Similar to the source electrode SDI, there is an island region formed by the first conductive film d1 and the twenty-fourth conductive film d2 in order to prevent the transparent pixel electrode ITOI from being disconnected when going over the step shape. It is provided. This island region is configured to be as small as possible so as not to reduce the area (frontage ratio) of the transparent pixel electrode IT○10. <<Equivalent circuit of storage capacitor element C add and its operation>> 2nd
FIG. 9 shows an equivalent circuit of the pixel shown in FIG. In FIG. 9, Cgs is a parasitic capacitance formed between the gate electrode GT and source electrode SDI of the thin film transistor TPT. The dielectric film of the parasitic capacitance JitCgs is an insulating film GI. Cpix is a liquid crystal capacitance formed between the transparent pixel electrode ITOI (PIX) and the common transparent pixel electrode IT○2 (COM). The dielectric film of liquid crystal capacitor C pix is liquid crystal LC, protective film PSVI and orientation 11gORI1,
It is ORl2. Vlc is a midpoint potential. The storage capacitance element C add has a midpoint potential (pixel electrode potential) V1 when the thin film transistor TPT switches.
It works to reduce the influence of gate potential change ΔVg on c. This situation can be expressed as the following formula. Δ V lc= {C gs/ (C gs+ C a
dd+C pix)}X ΔVgHere, ΔVl
c represents the change in midpoint potential due to ΔVg. This change amount ΔVlc causes a DC component applied to the liquid crystal LC, but the larger the holding capacitance C add is, the smaller the value can be reduced. In addition, the storage capacitor element C ad
d also has the effect of lengthening the discharge time. Video information is stored for a long time after the single-film transistor TPT is turned off. LCD L
Reducing the DC component applied to C can improve the life of the liquid crystal LC and reduce so-called burn-in, in which the previous image remains when switching between liquid crystal display screens. As mentioned above, since the gate electrode GT is made large enough to completely cover the i-type semiconductor layer AS, the source electrode SDI
, the overlap area with the drain electrode SD2 increases, the parasitic capacitance icgs increases, and the midpoint potential Vlc
has the opposite effect of becoming more susceptible to the influence of the gate (scanning) signal Vg. However, this disadvantage can also be eliminated by providing the storage capacitor element C add. The holding capacity of the holding capacity element Cadd is 4 to 8 times (4・C
pix< C add < 8 ・C pix), 8 to 32 times (8 ・(,gs
<Cadd<32・Cgs). <Connection method of holding capacitor element C add electrode wire> The final stage scanning signal line GL (or first stage scanning signal fiGL) used only as a capacitor electrode line is as shown in FIG.
Connect to common transparent pixel voltage t=m I T O 2 (Vcom). As shown in FIG. 2B, the common transparent pixel electrode ITO2 is connected to an external wiring at the peripheral edge of the liquid crystal display device by means of a silver paste material SL. Moreover,
A part of the conductive layer (gl and g2) of this external lead wiring is formed in the same manufacturing process as the scanning signal line GL. As a result, the final stage scanning signal line (capacitive electrode line) GL can be easily connected to the common transparent pixel electrode IT○2. Alternatively, as shown by the dotted line in FIG. 8, the final stage (first stage) scanning signal line (capacitive electrode line) GL may be connected to the first stage (final stage) scanning signal line GL. Note that this connection can be made by internal wiring within the liquid crystal display section or external wiring. <DC cancellation by the scanning signal of the storage capacitor element Cadd> This liquid crystal display device is based on the DC cancellation method (DC cancellation method) described in Japanese Patent Application No. 62-95125 previously filed by the applicant of the present application. As shown in FIG. 10 (time chart), by controlling the dynamic voltage of the scanning signal line GL, it is possible to further reduce the direct current applied to the liquid crystal LC. In FIG. 10, v1 is the dynamic voltage of an arbitrary scanning signal line GL, and Vi+1 is the dynamic voltage of the scanning signal line GL at the next stage. Vee is video signal ID
Low level driving voltage V d min applied to L,
Vdd is a high-level late acting voltage V d vaax applied to the video signal line DL. Each time t=t1~t4
The voltage change Δ of the midpoint potential Vlc (see Figure 9) at
■, ~Δv4 is the total capacitance of pixels C=Cgs+C p
When ix + C add, it is expressed by the following formula. △V 1 = (C gs / C) ・V 2△
V2=+(Cgs/C)・(V1+V2)(C add
/C) ・V2 △V3=-(Cgs/C)・V1 +(Cadd/C)・(V1+V2) ΔV,=1(Cadd/C)・v1 Here, the voltage applied to the scanning signal line GL If the dynamic voltage is sufficient (see Note below), the DC voltage applied to the liquid crystal LC is expressed by the following equation. △V, + ΔV4= (Cadd-V 2 - Cg
s-V 1 )/C Therefore, Cadd-V 2
= Cgs-V 1, the DC voltage applied to the liquid crystal LC becomes ○. [Note] Time tl. At t2, the change in the shame voltage Vi affects the midpoint potential Vic, but during the period from t2 to t3, the midpoint potential Via is made the same potential as the video signal potential through the signal line Xi (if the video signal is not sufficiently write). The potential applied to the liquid crystal LC is almost determined by the potential immediately after the thin film transistor TPT is turned off (the off period of the thin film transistor TPT is overwhelmingly longer than the on period). Therefore, liquid crystal L
In calculation of the DC component applied to C, the period t1 to t3 can be almost ignored, and it is only necessary to consider the potential immediately after the pick-up film transistor TPT is turned off, that is, the influence of the transition at times t3 and t4. Note that the polarity of the video signal is inverted for each frame or line, and the DC component due to the video signal itself is zero. In other words, in the DC cancellation method, the reduction due to the pull-in of the midpoint potential Vlc by the parasitic capacitance Cgs is compensated for by the storage capacitance element C.
add and the next stage scanning signal line (capacitance electrode 1i!) GL
The direct current component applied to the liquid crystal LC can be reduced by H2. As a result, the lifespan of the used liquid crystal display device LC can be extended. Of course, there is a gate'l to increase the shading effect.
T! When t'4 G T is increased, the storage capacitance of the storage capacitor element C;+dd may be increased accordingly. Next, a method for manufacturing the liquid crystal display device shown in FIG. IA and the like will be explained with reference to FIG. First, Figure 11 (
As shown in a), M is placed on the lower transparent glass substrate SUBI.
After forming the film transistor TPT, an aminosilane-modified epoxy resin with a H of 0.5 [7M] is applied onto the thin film transistor TFT using a spinner and baked at 200 [°C]. Next, as shown in FIG. 11(b),
A photoresist is applied, exposed and developed to form a photoresist pattern RST on the effective surface excluding the terminal portion. Next, as shown in FIG. 11(c), the aminosilane-modified epoxy resin at the terminal portion is removed using the photoresist pattern RST as a mask by 02 ashing treatment, and the protective film PSV is removed.
After forming I and removing the photoresist pattern RST, 02 ashing treatment is performed. Next, as shown in FIG. 11(d), an alignment film ○RII is formed on the protective film PSVI by printing or the like. In this method for manufacturing a liquid crystal display device, a protective film PS is used.
After performing 02 iodination treatment on the surface of VI, a protective film PSV is applied.
Since the alignment film ○RII is formed on I, the protective film PSVI
Since the surface wettability of the alignment film ◯RII becomes good, the adhesion of the alignment film ◯RII becomes good. In addition, if the 02 ashing treatment is performed for less than 15 seconds after forming the protective film PSVI, unpainted areas will occur on the alignment film ○RII, and the 02 iodizing treatment after forming the protective film PSVI will cause unpainted areas. When the treatment is carried out for more than 90 [seconds], the variation in film reduction of the protective film PSv↓ becomes large.
0 [It is preferable to do this for a few seconds]. In addition, when the baking temperature after applying the aminosilane-modified epoxy resin is set to 130 ['C] or less,
The aminosilane-modified epoxy resin becomes uncured, and the insulation properties of the protective film PSVI deteriorate.
] In the above case, the aminosilane-modified epoxy resin becomes colored and the light transmittance of the protected vAPSV1 decreases, so it is desirable to set the baking temperature after applying the aminosilane-modified epoxy resin to 150 to 220 [°C]. . As above, the invention made by the present inventor has been specifically explained based on the above embodiments, but this invention is not limited to the above embodiments, and can be modified in various ways without departing from the gist thereof. Of course. For example, in the above embodiment, an inverted staggered structure is shown in which gate electrode formation → gate insulating film type, semiconductor layer type, or source/train electrode type, but a staggered structure in which the vertical relationship or the order of formation is reversed is also possible. This invention is effective. In addition, in the above embodiment, a protective film P is provided on the entire effective surface.
SVI was formed, but as shown in FIG. 1B, a protective film made of aminosilane-modified epoxy resin was used only in the TPT portion of the film transistor. ! ! The membrane PSVI I may also be used. Furthermore, in the above embodiments, the protective films PSVI and PSVI 1 made of aminosilane-modified epoxy resin were used, but a protective film made of a resin having better light transmittance than the alignment film ○RII may be used. Furthermore, in the above embodiment,
Although the protective film PSVI is formed by photolithography, the protective film PSVI may also be formed by printing, and in this case, the manufacturing cost becomes even lower. [Effects of the Invention] As explained above, in the liquid crystal display device according to the present invention, since a vacuum chamber is not used to provide a protective film, the work efficiency is high and the manufacturing cost is low. Furthermore, since the material of the protective film and the material of the insulating film used as the gate insulating film are different, when forming the protective film, the gate insulating film is not damaged. }Defects of dedicated transistors do not occur.As described above, the effects of the present invention are remarkable.

[Brief explanation of drawings]

FIG. 1A is a schematic diagram showing a part of the liquid crystal display shown in FIG. 2A etc.; FIG. FIG. 2A is a schematic cross-sectional view showing a part of the display, FIG. 2A is a plan view of a main part showing one pixel of the liquid crystal display part of an active matrix color liquid crystal display bag holder to which the present invention is applied, and FIG. 2B is FIG. 2A. A sectional view of the part cut along the IIB-JIB cutting line and the area around the seal part, Figure 2C is the rrc-n of Figure 2A.
3 is a cross-sectional view taken along the cutting line C, and FIG. 3 is a plan view of the main part of a liquid crystal display section in which a plurality of pixels shown in FIG. 2A are arranged, and FIGS. 4 to 6 are
The figure is a plan view depicting only the predetermined calendar of the pixel shown in FIG. 2A, FIG. 7 is a plan view of the main part depicting only the pixel electrode layer and color filter layer shown in FIG. 3, and FIG. An equivalent circuit diagram showing the liquid crystal display section of a matrix color liquid crystal display device, FIG. 9 is an equivalent circuit diagram of the pixel shown in FIG. 2A, and FIG. 10 shows the opening voltage of the scanning signal line using the DC cancellation method. A time chart, FIG. 11, is an explanatory diagram of a method for manufacturing a liquid crystal display device according to the present invention. S.U. B...Transparent glass substrate GL...Scanner line DL...Video signal line GI...Zerinmata GT...Gate electrode AS...I-type semiconductor layer SD...Source electrode or 1. Rain electrode psv...
Protective film BM...Light shielding film LC...Liquid crystal TFT-Thin film transistor rTo...Transparent pixel electrode g. d... Conductive film C add... Holding capacitance element Cgs... Parasitic capacitance C pix... Liquid crystal capacitance

Claims (1)

[Claims] 1. In an active matrix liquid crystal display device in which a thin film transistor and a pixel electrode are constituent elements of a pixel, the protective film of the thin film transistor is made of a resin having a higher light transmittance than the alignment film. A liquid crystal display device featuring: 2. In an active matrix liquid crystal display device in which a thin film transistor and a pixel electrode are constituent elements of a pixel, the protective film of the thin film transistor is made of epoxy resin, and an alignment film is provided on the protective film. Characteristic liquid crystal display device.