JP2796283B2 - Liquid crystal display - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device,
Next, the pixel constituting the pixel by the thin film transistor and the pixel electrode.
Applied to active matrix liquid crystal display
It is about effective technology. 2. Description of the Related Art Active matrix liquid crystal display
The display device is a liquid in which a plurality of pixels are arranged in a matrix.
It has a crystal display part. Each pixel of the liquid crystal display is adjacent
Two scanning signal lines (gate signal lines) and two adjacent scanning signal lines
Placed in the intersection area with the video signal line (drain signal line)
Have been. Scan signal lines extend in the column direction (horizontal direction)
In addition, a plurality of lines are arranged in the row direction. The video signal line is running
Extend in the row direction (vertical direction) that intersects with the
Are arranged in a row. [0003] The pixel is mainly composed of a liquid crystal and an intervening liquid crystal.
A transparent pixel electrode and a common transparent pixel electrode,
It is composed of a thin film transistor (TFT). Transparent painting
Each of the elementary electrode and the thin film transistor is provided for each pixel.
ing. The transparent pixel electrode is the source electrode of the thin film transistor.
Connected to poles. Thin film transistor drain electrode
Is connected to the video signal line, and the gate electrode is connected to the scanning signal.
Route No. [0004] The above-mentioned liquid crystal display device
After selecting a pixel and charging each liquid crystal capacitor,
Formed by the gate electrode and source electrode when the
The middle point potential Vlc of the pixel electrode is
There was a problem of being pulled (reduced). This midpoint potential
The increase in Vlc pull-in is due to the increase in the driving voltage of the video signal line.
And the potential applied to the transparent pixel electrode (equivalent to Vlc)
)), A DC component is generated in the liquid crystal.
It was a problem of being applied. DC component applied to the liquid crystal
Minutes increase the life of the LCD and cut off the LCD screen.
A so-called burn-in occurs in which the previous image remains at the time of replacement. Also,
The liquid crystal capacitance alone is used to discharge the charge stored in the pixel electrode.
Because the interval is short, the charge cannot be held
Black unevenness in which the last decreased was occurring. In addition, a pixel electrode and a scan adjacent to the pixel electrode
A capacitive element is provided between the signal line and the
A method for reducing the pressure drop is disclosed in JP-A-59-119390.
However, in the above prior art, adjacent running
Capacitance element on the pixel electrode on the outermost row where no signal line exists
It is impossible to provide the liquid crystal of the pixels in the outermost row
Has a problem that a DC voltage is applied. An object of the present invention is to provide a liquid crystal display device,
A technology that can reduce the black spots with a simple configuration
To provide. Another object of the present invention is to provide a liquid crystal display device.
To reduce the DC component applied to the liquid crystal of the liquid crystal display,
To provide technology that can reduce black spots
You. Another object of the present invention is to provide a liquid crystal display device.
Reduces the black spots without increasing the number of manufacturing steps
It is to provide a technology that can do it. [0009] The present invention is disclosed in the present application.
A brief description of typical inventions will be given below.
It is as follows. That is, the first substrate extends in the column direction on the first substrate.
A plurality of scanning signal lines arranged in the row direction and extending in the row direction;
Each intersection area with multiple video signal lines arranged in the column direction
Pixel composed of thin film transistors and pixel electrodes
In the liquid crystal display device having, the pixel electrode of the pixel,
The pixel electrode is used as one electrode, and a scanning signal for selecting the pixel is used.
Other scanning signal line adjacent to the signal line as a capacitor electrode line
To form a storage capacitor element as the other electrode,
A second substrate is provided facing the substrate, and a second substrate is provided in front of the second substrate.
A common electrode is provided on the side facing the pixel electrode, and the common electrode is provided.
The pole is an external lead provided on the first substrate by a conductive material.
Electrically connected to the wiring, and the external lead-out wiring is at least
Is also formed of a conductive layer formed simultaneously with the scanning signal line,
The first or last stage capacitance line of the plurality of lines is the common line.
It is noted that it is electrically connected to the external wiring of the electrode.
It is a sign. According to the above-described means, the outermost row direction
Provide storage capacitors for all pixel electrodes, including pixel electrodes
To reduce the DC component applied to the liquid crystal
Can improve the life of the liquid crystal display
You. In addition, the charge of all the pixel electrodes
Since it also has the effect of extending the discharge time, the pixels in the outermost row
However, the contrast does not decrease and there is no black spot problem.
No. Further, an external lead connected to the common electrode
Since the wiring is formed at the same time as the scanning signal line,
There is no increase. Hereinafter, the configuration of the present invention
・ The present invention is suitable for matrix type color liquid crystal display devices.
This will be described together with one embodiment used. [0015] Incidentally, in all the drawings for explaining the embodiment, FIG.
Those having the same function are given the same reference
The description of this is omitted. (Embodiment I) An active mat which is Embodiment I of the present invention
One screen of the liquid crystal display part of the ricks type color liquid crystal display device
1 is shown in FIG. 1 (plan view of the main part), and cut along the line II-II in FIG.
The cut section is shown in FIG. In addition, FIG.
Is a main part of a liquid crystal display section in which a plurality of pixels shown in FIG. 1 are arranged.
Show. As shown in FIGS. 1 to 3, a liquid crystal display device
Is a table on the inside (liquid crystal side) of the lower transparent glass substrate SUB1.
On the surface, a thin film transistor TFT and a transparent pixel electrode IT
A pixel having O is formed. Lower transparent glass substrate
The SUB1 has a thickness of, for example, about 1.1 [mm].
Have been. Each pixel has two adjacent scanning signal lines (ges).
Signal lines or horizontal signal lines) GL and two adjacent video
Interchange with an image signal line (drain signal line or vertical signal line) DL
Placed in the difference area (in the area surrounded by four signal lines)
ing. The scanning signal line GL is as shown in FIGS.
And a plurality of them extend in the column direction and are arranged in the row direction.
The video signal lines DL extend in the row direction and are arranged in plural in the column direction.
Is placed. The thin film transistor TFT of each pixel is
Divided into three (plural)
(Division thin film transistor) TFT1, TFT2 and TF
It is composed of T3. Thin film transistors TFT1 to T
Each of the FT3s has substantially the same size.
You. The divided thin film transistors TFT1 to TFT
3 are mainly composed of a gate electrode GT, an insulating film GI, and an i-type
The semiconductor layer AS, the pair of source electrodes SD1, and the drain electrode
It is composed of a pole SD2. The gate electrode GT is formed as shown in FIG.
As shown in detail in the plan view
Line GL in the row direction (downward in FIGS. 1 and 4)
It is composed of a protruding T-shape (branched into a T-shape
Is). That is, the gate electrode GT is connected to the video signal line D
It is configured to extend substantially parallel to L. Get
The gate electrode GT is composed of thin film transistors TFT1 to TFT3.
Are formed so as to protrude to the respective formation regions.
The gate voltage of each of the thin film transistors TFT1 to TFT3
The pole GT is configured integrally (as a common gate electrode)
And are connected to the same scanning signal line GL. Gate
The electrode GT is located in the region where the thin film transistor TFT is formed.
In order not to grow the step shape as much as possible,
It is composed of the conductive film g1. The first conductive film g1 is, for example, a spa
Using a chromium (Cr) film formed by
It is formed with a film thickness of about [Å]. The scanning signal line GL is connected to the first conductive film g1 and the first conductive film g1.
And a composite film comprising a second conductive film g2 provided thereon
It is composed of The first conductive film g of the scanning signal line GL
1 is the same as the first conductive film g1 of the gate electrode GT.
It is formed in a process and is configured integrally. Second conductivity
The film g2 is made of, for example, aluminum formed by sputtering.
A film of about 2000 to 4000 [Å] using an (Al) film
It is formed with a thickness. The second conductive film g2 is connected to the low level of the scanning signal line GL.
Reduced drag value and increased signal transmission speed (pixel information writing
Configuration). The scanning signal line GL is connected to the first conductive film g1.
The width dimension of the second conductive film g2 is made smaller than the width dimension of
doing. That is, the scanning signal line GL is connected to the step on the side wall.
Since the difference in shape can be reduced, the insulating film
It is configured so that the surface of the GI can be flattened. The insulating film GI is made of a thin film transistor TFT1
Used as the respective gate insulating films of the TFT3. Absolute
The edge film GI is a layer above the gate electrode GT and the scanning signal line GL.
Is formed. The insulating film GI is, for example, a plasma C
Using a silicon nitride film formed by VD, about 3000 [Å]
It is formed with a film thickness of a degree. As described above, the surface of the insulating film GI
Indicates the formation of each of the thin film transistors TFT1 to TFT3
Flattened in the region and the scanning signal line GL formation region
ing. The i-type semiconductor layer AS is shown in FIG.
As shown in detail in the plan view
Each of the divided thin film transistors TFT1 to TFT3
Used as a channel forming region. Divided into multiple
I-type semiconductor of each of the thin film transistors TFT1 to TFT3
The body layer AS is integrally formed in the pixel. You
That is, a plurality of thin film transistors TF in which pixels are divided
Each of T1 to TFT3 is one (common) i-type semiconductor
It is composed of island regions of the layer AS. i-type semiconductor layer AS
Is formed of amorphous silicon film or polycrystalline silicon film.
And a film thickness of about 200 to 3000 [Å]. As described above, the thin film divided into a plurality of pixels
I-type semiconductor layer of each of the transistors TFT1 to TFT3
By integrally forming the AS, the thin film transistor T
A drain electrode SD2 common to each of FT1 to TFT3 is provided.
i-type semiconductor layer AS (actually, the thickness of the first conductive film g1
Step corresponding to the film thickness obtained by adding the film thickness of the i-type semiconductor layer AS
Difference) from the drain electrode SD2 side to the i-type semiconductor layer AS side.
Since it only gets over once, the drain electrode SD2
Is less likely to break, and the probability of occurrence of point defects is lower.
Can be reduced. That is, in the present embodiment I, the drain
When the electrode SD2 gets over the step of the i-type semiconductor layer AS
The point defect generated in the pixel can be reduced to one third. The layout is different from the layout of the first embodiment.
However, the video signal line DL directly crosses the i-type semiconductor layer AS.
Then, the video signal line DL in the overriding portion is drained.
When configured as the pole SD2, the video signal line DL (drain
When the electrode SD2) passes over the i-type semiconductor layer AS.
The probability of line defects caused by lines can be reduced.
Wear. In other words, a thin film transistor divided into multiple pixels
The i-type semiconductor layer AS of each of the TFT1 to TFT3 is integrated.
The video signal line DL (drain electrode)
SD2) surpasses the i-type semiconductor layer AS only once.
(Actually, two times, the first and the last
Is). The i-type semiconductor layer AS is shown in FIGS.
As shown in detail, the scanning signal line GL and the video signal line DL
To extend between the two intersections (crossover parts)
Have been killed. This extended i-type semiconductor layer AS is
Short circuit between scanning signal line GL and video signal line DL at the difference portion
Is configured to be reduced. Thin-film transistor divided into a plurality of pixels
The source electrode SD1 and the drain of each of the TFT1 to TFT3
1, 2 and 6 (predetermined manufacturing process)
I-type semi-conductor as shown in detail in
They are provided separately on the body layer AS. Source electrode
Each of SD1 and drain electrode SD2 is a circuit bias.
When the polarity changes, the source and drain are switched in operation
It is configured as follows. That is, the thin film transistor TF
T is bidirectional, similar to a FET. The source electrode SD1 and the drain electrode SD2
Each of the first layers is formed from the lower layer side in contact with the i-type semiconductor layer AS.
The conductive film d1, the second conductive film d2, and the third conductive film d3 are sequentially stacked.
It is configured by joining. First lead of source electrode SD1
The drain film d1, the second conductive film d2, and the third conductive film d3 form a drain.
It is formed in the same manufacturing process as each of the in-electrodes SD2. The first conductive film d1 is formed by sputtering formed by sputtering.
Using a ROM film, a film thickness of 500 to 1000 [Å] (this embodiment)
In the example, the film is formed with a thickness of about 600 [Å]. chromium
The thicker the film, the greater the stress
To form a film not to exceed a film thickness of about 2000 [Å].
You. The chromium film has good contact with the i-type semiconductor layer AS.
You. The chromium film is made of aluminum of a second conductive film d2 described later.
Is prevented from diffusing into the i-type semiconductor layer AS,
Construct a barrier layer. Chromium is used as the first conductive film d1.
In addition to the film, a refractory metal (Mo, Ti, Ta, W) film,
Melting point metal silicide (MoSi _Two , TiSi _Two , TaSi
_Two , WSi _Two ) It may be formed of a film. The second conductive film d2 is formed by sputtering an
Using a luminium film, a film thickness of 3000 to 4000 [Å]
(In this embodiment, a film thickness of about 3000 [Å]).
You. Aluminum film has less stress than chromium film
The source electrode S can be formed to have a large thickness.
D1, the resistance values of the drain electrode SD2 and the video signal line DL
Is configured to be reduced. The second conductive film d2 is
Higher operating speed of thin film transistor TFT and video
Signal transmission speed of signal line DL can be increased.
It is configured as follows. That is, the second conductive film d2 is
Elementary writing characteristics can be improved. Second conductive film d2
In addition to the aluminum film, silicon (Si) and
An aluminum film containing copper (Cu) as an additive
It may be formed. The third conductive film d3 was formed by sputtering.
1000 to 20 using a transparent conductive film (ITO: Nesa film)
00 [Å] film thickness (about 1200 [Å] in this embodiment)
(Film thickness). This third conductive film d3 is
The pole SD1, the drain electrode SD2, and the video signal line DL are configured.
At the same time as forming the transparent pixel electrode ITO.
ing. The first conductive film d1 of the source electrode SD1, the drain
Each of the first conductive films d1 of the in-electrode SD2 is a second upper conductive film d1.
Channel formation area is smaller than that of the conductive film d2 and the third conductive film d3.
The area side has a large size. That is, the first conductive
The film d1 includes the first conductive film d1, the second conductive film d2, and the third conductive film d1.
Mask misalignment may occur in the manufacturing process between the conductive film d3.
Even larger than the second conductive film d2 and the third conductive film d3.
Critical size (each of the first conductive film d1 to the third conductive film d3)
(The channel formation region side may be on the line)
It is configured as follows. First conductive film d of source electrode SD1
1. Each of the first conductive films d1 of the drain electrode SD2 is thin
The structure is such that the gate length L of the film transistor TFT is defined.
Has been established. As described above, the thin film divided into a plurality of pixels
In the transistors TFT1 to TFT3, the source electrode
SD1 and the first conductive film d1 of the drain electrode SD2.
The second conductive film d2 and the third conductive film d are formed on the channel formation region side.
By making the size larger than 3, the source
The first conductive film d of each of the electrode SD1 and the drain electrode SD2
The dimension between 1 and the gate length L of the thin film transistor TFT
Can be specified. Separation dimension between the first conductive film d1
(Gate length L) is the processing accuracy (patterning accuracy)
Because it can be specified, the thin film transistor TFT1
~ Each gate length L of TFT3 can be made uniform
You. The source electrode SD1 is transparent as described above.
It is connected to the pixel electrode ITO. Source electrode SD1
Represents the step shape of the i-type semiconductor layer AS (the film of the first conductive film g1).
The thickness corresponds to the sum of the thickness and the thickness of the i-type semiconductor layer AS.
Along the steps). Specifically, the source
The electrode SD1 is formed along the step shape of the i-type semiconductor layer AS.
The formed first conductive film d1 and the upper portion of the first conductive film d1
The side connected to the transparent pixel electrode ITO is smaller than
A second conductive film d2 formed in a small size;
Third conductive film connected to first conductive film d1 exposed from the film
d3. First conductivity of source electrode SD1
The film d1 has good adhesion to the i-type semiconductor layer AS,
And a barrier mainly to a diffusion substance from the second conductive film d2.
It is configured as a layer. Second conductivity of source electrode SD1
As for the film d2, the chromium film of the first conductive film d1 increases the stress.
From the thickness of the i-type semiconductor layer AS.
Over the i-type semiconductor layer AS
Is configured for. That is, the second conductive film d2 is
The step coverage is improved by forming it thickly.
You. Since the second conductive film d2 can be formed thick,
The resistance value of the pole SD1 (the drain electrode SD2 and the video signal line D
(L also applies to L). Third
The conductive film d3 is formed on the i-type semiconductor layer AS of the second conductive film d2.
The second step because it cannot get over the step
First conductive layer exposed by reducing the size of conductive film d2
It is configured to be connected to the electrolytic film d1. First conductive film
d1 and the third conductive film d3 only have good adhesion.
Or, the shape of the step at the connection between them is small,
You can continue. As described above, the source of the thin film transistor TFT is
The source electrode SD1 at least along the i-type semiconductor layer AS.
A first conductive film d1 as a barrier layer formed by
Compared to the first conductive film formed on the first conductive film d1
All have low specific resistance and are smaller than the first conductive film
The second conductive film d2.
A transparent pixel electrode ITO on the first conductive film d1 exposed from
By connecting a certain third conductive film d3, the thin film transistor
Connect the transistor TFT and the transparent pixel electrode ITO securely
To reduce point defects caused by disconnections.
Can be. Moreover, the source electrode SD1 is formed of the first conductive film.
The second conductive film d having a small resistance value due to the barrier effect of d1
2 (aluminum film) can be used,
The value can be reduced. The drain electrode SD2 is connected to the video signal line DL.
It is integrated and formed in the same manufacturing process.
You. The drain electrode SD2 crosses the video signal line DL
It has an L-shape protruding in the column direction. That is,
Thin-film transistors TFT1-T divided into a plurality of pixels
Each drain electrode SD2 of FT3 has the same video signal
Connected to line DL. The transparent pixel electrode ITO is provided for each pixel.
And constitute one of the pixel electrodes of the liquid crystal display.
You. The transparent pixel electrode ITO is a thin pixel divided into a plurality of pixels.
3 corresponding to each of the film transistors TFT1 to TFT3.
One transparent pixel electrode (divided transparent pixel electrode) ITO1, IT
It is divided into O2 and ITO3. Transparent pixel electrode IT
O1 is a source electrode SD1 of the thin film transistor TFT1.
It is connected to the. The transparent pixel electrode ITO2 is a thin film transistor.
Connected to the source electrode SD1 of the transistor TFT2.
You. The transparent pixel electrode ITO3 is a thin film transistor TFT
3 is connected to the source electrode SD1. Each of the transparent pixel electrodes ITO1 to ITO3
Is the same as each of the thin film transistors TFT1 to TFT3
In addition, they are configured with substantially the same size. Transparent pixel
Each of the electrodes ITO1 to ITO3 is a thin film transistor TF
Each i-type semiconductor layer AS of T1 to TFT3 is integrally configured
(Each divided thin film transistor TFT
(It is concentrated in one place.)
doing. As described above, two adjacent scanning signal lines G
L in the intersection area between two adjacent video signal lines DL.
The thin film transistor TFT of the placed pixel is
Divided into transistor TFT1 to TFT3,
Each of the divided thin film transistors TFT1 to TFT3
Each of the divided transparent pixel electrodes ITO1 to ITO3
To connect the divided part of the pixel (eg,
For example, only the TFT 1) becomes a point defect and the whole pixel becomes
Is no longer a point defect (TFT2 and TFT3
Not), to reduce point defects as a whole pixel
Can be. In addition, a point defect of a part of the divided pixel.
Is smaller than the entire area of the pixel (the case of this embodiment).
In this case, one-third the area of the pixel)
Can be done. Also, the transparent pixel electrode obtained by dividing the pixel
Each of IT01 to ITO3 has substantially the same size
By doing so, the area of point defects in pixels can be made uniform.
Can be. Also, the transparent pixel electrode divided from the pixel
Each of IT01 to ITO3 has substantially the same size
By doing so, the husbands of the transparent pixel electrodes ITO1 to IT03
Each liquid crystal composed of common transparent pixel electrode ITO
Capacitance (Cpix) and the transparent pixel electrodes ITO1 to IT
Transparent pixel electrodes ITO1 to ITO added to each of O3
3 caused by superposition of the gate electrode GT and the gate electrode GT
(Cgs) can be made uniform. In other words, transparent
Each of the pixel electrodes ITO1 to ITO3 has a liquid crystal capacitance and an overlap.
Since the combined capacity can be made uniform, the liquid
DC component is prevented from being applied to
Life can be improved due to the deterioration of. Thin film transistor TFT and transparent pixel electrode
The protective film PSV1 is provided on the ITO. protection
The film PSV1 is mainly used to make the thin film transistor TFT damp or the like.
It is formed to protect from
Also use a material with good moisture resistance. The protective film PSV1 is an example
For example, a silicon oxide film or silicon nitride formed by plasma CVD
It is formed with a film, and is formed with a film thickness of about 8000 [Å].
I do. Protective film PSV on thin film transistor TFT
In the upper part of 1, external light is used as a channel forming region.
Shielding film L so as not to be incident on the i-type semiconductor layer AS
S is provided. As shown in FIG. 1, the shielding film LS
Are configured in a region surrounded by a dotted line. Shielding film L
S is highly light-shielding, for example, aluminum
It is formed of a film or a chromium film, etc.
It is formed to a thickness of about [Å]. The thin film transistor TFT has a gate electrode G
When a positive bias is applied to T, the source-drain
When the channel resistance decreases and the bias is set to zero,
The channel resistance is configured to be large. Toes
The thin film transistor TFT is connected to the transparent pixel electrode ITO.
It is configured to control the applied voltage. The liquid crystal LC is a lower transparent glass substrate SUB1.
Formed between the upper transparent glass substrate SUB2 and the upper transparent glass substrate SUB2
The lower alignment film ORI1 for setting the direction of liquid crystal molecules and
And the upper alignment film ORI2. The lower alignment film ORI1 is made of a lower transparent glass base.
It is formed above the protective film PSV1 on the plate SUB1 side. Inside of the upper transparent glass substrate SUB2 (liquid crystal
Side), a color filter FLL and a protective film PSV
2. Common transparent pixel electrode (COM) ITO and the upper arrangement
A facing film ORI2 is provided by being sequentially laminated. The common transparent pixel electrode ITO has a lower transparent
A transparent pixel electrode provided for each pixel on the glass substrate SUB1 side
Another common transparent pixel electrode IT facing and adjacent to the pole ITO
It is configured integrally with O. This common transparent pixel electrode IT
O is configured so that a common voltage Vcom is applied thereto.
Have been. The common voltage Vcom is applied to the video signal line DL.
Low level drive voltage Vdmin and high level applied
Of the drive voltage Vdmax. The color filter FLL is made of acrylic resin or the like.
Dyed base material made of resin material
Have been. The color filter FIL is opposed to the pixel.
The position is configured for each pixel and is dyed separately. sand
That is, the color filter FLL is adjacent to the pixel similarly to the pixel.
Two scanning signal lines GL and two adjacent video signal lines D
L. Each pixel is a color
Within each predetermined color filter of the filter FIL,
Has been divided into numbers. The color filter FLL is formed as follows.
can do. First, the upper transparent glass substrate SUB2
Form a dyed substrate on the surface of the
The dyed base material other than the red filter forming area is removed. this
After that, the dyeing substrate is dyed with a red dye,
A filter R is formed. Next, to perform the same process
Therefore, a green filter G and a blue filter B are sequentially formed.
You. As described above, each color of the color filter FLL
A filter should be formed in the intersection area facing each pixel.
By the above, between each color filter of the color filter FLL,
Each of the scanning signal line GL and the video signal line DL exists
Each pixel and the color filter correspond to their existence.
Ensuring a margin for alignment with each color filter of FLL
(Increase the alignment margin). Sa
Furthermore, each color filter of the color filter FLL is formed.
At the time, ensure that there is sufficient alignment margin between the different color filters.
Can be. That is, in the present embodiment, two adjacent running
Intersection between the scanning signal line GL and two adjacent video signal lines DL
Configure pixels in the area, divide this pixel into multiple
Each color filter of the color filter FLL is located at a position facing the pixel.
By forming a filter, the aforementioned point defects can be reduced.
And alignment of each pixel with each color filter
Extra dimensions can be secured. The protective film PSV2 is formed of the color filter F
The dye that dyes different colors into different colors may leak into the liquid crystal LC.
This is provided to prevent Protective film PSV2
Is a transparent resin such as acrylic resin, epoxy resin, etc.
Made of material. This liquid crystal display device has a lower transparent glass substrate
Each layer on the SUB1 side and the upper transparent glass substrate SUB2 side
Are formed separately, and thereafter, the upper and lower transparent glass substrates SUB1 are formed.
And SUB2 are overlapped, and a liquid crystal LC is sealed between them.
Assembled by Each pixel of the liquid crystal display section is as shown in FIG.
As described above, multiple scan signal lines GL extend in the same column direction as the extending direction.
Pixel rows X ₁ , X _Two , X _Three , X _Four , ...
Has formed. Each pixel row X ₁ , X _Two , X _Three , X _Four , ... of each
Pixels are thin film transistors TFT1 to TFT3 and transparent
The arrangement positions of the pixel electrodes ITO1 to ITO3 are identical.
ing. That is, the pixel column X ₁ , X _Three , ... each pixel is
Position the thin film transistors TFT1 to TFT3 to the left
Side, position of transparent pixel electrodes ITO1 to ITO3 on the right
It is composed. Pixel row X ₁ , X _Three , ... in each row direction
Next row of pixel rows X _Two , X _Four ,... Each pixel is a pixel row
X ₁ , X _Three ,... With respect to the video signal line DL
And pixels arranged in line symmetry. That is,
Pixel row X _Two , X _Four , ... each pixel is a thin film transistor
TFT1 to TFT3 are located on the right, transparent pixel electrode I
The arrangement positions of TO1 to ITO3 are configured on the left side. So
And the pixel row X _Two , X _Four ,... Each pixel is a pixel row
X ₁ , X _Three ,…, Half pixel interval in the column direction for each pixel
Moved (displaced). That is, the pixel
If each pixel interval of column X is 1.0 (1.0 pitch),
In the next pixel row X, the pixel interval is set to 1.0,
0.5 pixel interval (0.5 pixels)
H) It is out of alignment. Video signal extending in the row direction between each pixel
The line DL corresponds to a half pixel interval (0.
It is configured to extend in the column direction (for 5 pitches). As described above, in the liquid crystal display unit, the thin film transistor
The layout positions of the transistor TFT and the transparent pixel electrode ITO are
A plurality of identical pixels are arranged in the column direction to form a pixel column X,
The next pixel row X of the pixel row X is referred to as the pixel of the previous pixel row X.
Consists of pixels arranged symmetrically with respect to video signal line DL
Then, the next row of pixels is shifted by half a pixel from the previous row of pixels.
7 (pixel and color filter).
It is shown in the plan view of the main part with
As described above, the image in which the predetermined color filter of the previous pixel row X is formed.
Element (for example, pixel row X _Three Red filter R was formed
Pixel) and the same color filter of the next pixel row X are formed.
Pixel (for example, pixel column X _Four Red filter R is formed
Pixels 1.5 pixels apart (1.5 pitch)
be able to. That is, the pixels in the preceding pixel row X are
The same color filter of the next pixel row near both was formed
It is configured to be always 1.5 pixels apart from the pixel
The color filter FLL has a triangular arrangement structure of RGB.
Can be configured. Color filter FIL
RGB triangular arrangement structure improves the color mixture of each color.
Can improve the resolution of color images.
it can. The video signal lines DL are provided between the pixel columns X.
Since only a half pixel interval extends in the column direction,
It does not cross the video signal line DL that is in contact. Therefore,
Eliminates the layout of video signal lines DL and reduces the occupied area
And eliminates the detour of the video signal line DL and
The wiring structure can be eliminated. The structure of the liquid crystal display section is shown in circuit form.
As shown in FIG. 9 (equivalent circuit diagram of the liquid crystal display unit). Figure
XiG, Xi + 1G,... Shown in FIG.
Are the video signal lines DL connected to the pixels where are formed.
XiB, Xi + 1B,... Have blue filters B formed thereon.
A video signal line DL connected to a pixel. Xi eleven
R, Xi + 2R,... Represent the image on which the red filter R is formed.
The video signal line DL is connected to the pixel. These video signals
The line DL is selected by the video signal drive circuit. Yi is before
The pixel column X shown in FIGS. ₁ Select scanning signal line
GL. Similarly, Yi11, Yi + 2,.
Is the pixel row X _Two , X _Three ,... A scanning signal line G for selecting each of
L. These scanning signal lines GL are connected to a vertical scanning circuit.
It is connected. The center of FIG. 2 shows a cross section of one pixel.
The transparent glass substrates SUB1 and SUB are on the left.
2 shows the cross section of the left edge of
Is shown. Right side: transparent glass substrates SUB1 and SU
Breakage of the right edge of B2 where there is no external wiring
Plane. The sealing materials S shown on the left and right sides of FIG.
L is configured to seal the liquid crystal LC,
Transparent glass substrate SUB excluding sealing port (not shown)
1 and SUB2 are formed along the entire periphery.
The sealing material SL is formed of, for example, an epoxy resin.
You. Common to the upper transparent glass substrate SUB2 side
The transparent pixel electrode ITO is made of silver in at least one place.
The lower transparent glass substrate SUB is formed by the paste material SIL.
It is connected to external lead-out wiring formed on one side. this
The external lead-out lines are the gate electrode GT and the source electrode described above.
SD1 and drain electrode SD2 are formed in the same manufacturing process.
Is done. The alignment films ORI1 and ORI2, the transparent image
Elementary electrode ITO, common transparent pixel electrode ITO, protective film PSV
1 and PSV2, and the respective layers of the insulating film GI are made of a sealing material S
It is formed inside L. Polarizing plate POL
Substrate SUB1 and upper transparent glass substrate SUB2.
Formed on the outer surface. (Example II) This Example II is the same as Example I.
Black unevenness of the liquid crystal display portion of the liquid crystal display device
Further, it is an example of the present invention. The liquid of the liquid crystal display device according to the embodiment II of the present invention
One pixel of the crystal display portion is shown in FIG. FIG. 8 shows a liquid crystal display device of Example II.
As described above, the i-type semiconductor layer AS in each pixel of the liquid crystal display section is thinned.
It is configured to be divided for each of the film transistors TFT1 to TFT3.
Have been. In other words, a thin film transistor divided into multiple pixels
Each of the transistor TFT1 to TFT3 is an independent i-type semiconductor.
It is composed of island regions of the body layer AS. The pixel thus configured is connected to a video signal line
The thin film transistors TFT1 to TFT1
Each of the TFTs 3 can be evenly distributed and arranged.
Connected to each of the thin film transistors TFT1 to TFT3
Each of the transparent pixel electrodes ITO1 to 1TO3 to be squared
Can be configured. Transparent pixel composed of square
Each of the electrodes ITO1 to IT03 is adjacent in the pixel
Area in the row direction between the transparent pixel electrodes ITO
(The area corresponding to the shaded area in FIG. 1)
Can be reduced), thus improving the area (aperture ratio).
can do. Also, in FIG. 8, reference numeral A is attached and enclosed by a dotted line.
As shown, each of the transparent pixel electrodes ITO1 to ITO3
When changing the shape, the scanning signal line GL or the video signal
A line having an inclination angle with respect to the line DL (for example, 45
(Degree angle line). That is, the transparent pixel electrode I
Each of TO1 to ITO3 is a scanning signal line GL or a video signal.
The shape was changed with a line parallel to or orthogonal to the signal line DL
Separation area between transparent pixel electrodes ITO is reduced compared to the case
Can improve the aperture ratio
You. The transparent pixel electrodes ITO1 to ITO3
Each faces the side connected to the thin film transistor TFT
On the opposite side of the scanning signal line G at the next stage in the row direction.
L is superimposed. This superposition is performed by a thin film transformer.
Like the gate electrodes GT of the transistors TFT1 to TFT3,
A scanning signal line GL (pixels) for selecting the gate electrode GT.
The next scanning signal line adjacent to the selected scanning signal line DL)
This is performed by branching the DL into a T-shape. Forked
The scanning signal line GL is connected to the gate electrode of the thin film transistor TFT.
Like the pole GT, the first conductive film (chromium film) g1 is a single layer.
It is configured. The superposition is performed by using a transparent pixel electrode ITO.
Each of 1 to ITO3 is used as one electrode, and the next stage scanning signal
Using the line GL as a capacitor electrode line and branching from it
Capacitance element (capacitance element) C with the other electrode as the other electrode
Configure add. Dielectric of this storage capacitor element Cadd
The film is used as the gate insulating film of the thin film transistor TFT.
It is composed of the same layer as the insulating film GI used. Another layout of the storage capacitor Cadd
FIG. 10 is a plan view of a main part showing one pixel of another example.
Then, the equivalent circuits of the pixels described in FIGS.
It is shown in FIG. 11 (equivalent circuit diagram). Holding of the pixel shown in FIG.
The capacitive element Cadd is composed of transparent pixel electrodes ITO1 to ITO3.
And the branched portions of the capacitor electrode line (the storage capacitor C
increase the amount of overlap with the other electrode (add) and hold
The capacity is increasing. Basically, the holding shown in FIG.
The capacitance element Cadd and the storage capacitance element Cad shown in FIG.
Same as d. In FIG. 11, as described above, C
gs is the gate electrode GT of the thin film transistor TFT and the
This is a superposition capacitance formed by the source electrode SD1. Pile
The dielectric film of the combined capacitance Cgs is the insulating film GI. Cpi
x is a transparent pixel electrode ITO (PlX) and a common transparent pixel electrode
It is a liquid crystal capacitance formed of polar ITO (COM). liquid crystal
The dielectric film of the capacitor Cpix is a liquid crystal LC, a protective film PSV1 and
And orientation films ORI1 and ORI2. Vlc is the midpoint potential
You. The storage capacitance element Cadd is shown in FIG.
As shown in FIG.
After charging, the thin film transistor TFT turns off
The midpoint potential Vlc is pulled in by the joining capacitance Cgs.
Is configured to reduce the
You. It also has the effect of increasing the discharge time as a storage capacity.
You. The reduction in the pull-in of the midpoint potential Vlc is caused by the video signal
The intermediate potential of the driving voltage of the line DL and the transparent pixel electrode ITO are marked.
The difference between the applied potential (corresponding to Vlc) and the intermediate potential is
To reduce the DC component applied to the liquid crystal LC.
Can be Reduction of DC component applied to liquid crystal LC
Improves the life of the liquid crystal LC and switches the liquid crystal display screen
The so-called burn-in that sometimes leaves the previous image can be reduced
You. Further, two scanning signal lines GL and two images
Liquid crystal display device having pixels in the intersection region with signal line DL
In one of the two scanning signal lines GL,
The thin film transistor TF of the pixel selected by the test signal line GL
T is divided into a plurality of thin-film transistors T
Multiple transparent pixel electrodes ITO for each of FT1 to TFT3
Each of the divided (IT01 to ITO3) is connected, and
This is applied to each of the divided transparent pixel electrodes ITO1 to ITO3.
The pixel electrode ITO is used as one electrode, and the two scanning signal lines are used.
The other scanning signal line DL is used as a capacitor electrode line
To form a storage capacitor Cadd as the other electrode.
Thus, as described above, the divided part of the pixel
Is a point defect, but not a pixel as a whole.
Pixel defects can be reduced.
And the direct current applied to the liquid crystal LC by the storage capacitance element Cadd.
As the components can be reduced, the life of the liquid crystal LC is extended.
Can be up. In particular, by dividing pixels
The gate electrode GT of the thin film transistor TFT and the source
Due to short circuit with electrode SD1 or drain electrode SD2
Point defects can be reduced and the transparent pixel electrode I
Each of TO1 to ITO3 and the other of the storage capacitor elements Cadd
Point defects caused by short-circuits with other electrodes (capacitor electrode lines)
can do. The latter point defect is 3 in this embodiment.
It's a fraction. As a result, a part of the divided pixel
The point defect is small compared to the entire area of the pixel.
Point defects can be made difficult to see. The storage capacitance of the storage capacitance element Cadd is:
From the writing characteristic of the pixel, 4 to 8 with respect to the liquid crystal capacitance Cpix.
Double (4 · Cpix <Cadd <8 · Cpix), superposition
8 to 32 times the set capacitance Cgs (8 · Cgs <Cad
d <32 · Cgs). The scanning signal line GL is connected to a first conductive film.
(Chromium film) g1 to second conductive film (aluminum film) g2
Are composed of a composite film in which
The other electrode of d, that is, the branched part of the capacitor electrode line
A single-layer film comprising one of the first conductive films g1 of the composite film
To reduce the resistance value of the scanning signal line GL.
In addition, the write characteristics can be improved and the storage capacity can be improved.
Reliable along the step based on the other electrode of the element Cadd
To one electrode of the storage capacitor Cadd (the transparent pixel electrode I).
TO) can be adhered on the insulating film GI.
The disconnection of one electrode of the storage capacitor Cadd can be reduced.
Can be. The other electrode of the storage capacitor Cadd
Is composed of a single-layer first conductive film g1 and is an aluminum film.
By not forming the second conductive film g2, aluminum
The other side of the storage capacitor Cadd due to the hillock of the
A short circuit between the pole and one of the electrodes can be prevented. In order to configure the storage capacitance element Cadd,
Of transparent pixel electrodes ITO1 to ITO3 superimposed on
The part between the branched parts of the capacitor electrode lines
As in the case of the source electrode SD1, the stepped shape of the branched portion
Transparent pixel electrode ITO does not break when going over the shape
Thus, the first conductive film d1 and the second conductive film d2
An island region is provided. This island area is a transparent pixel electrode
As much as possible so as not to reduce the area (opening ratio) of ITO
Make it smaller. As described above, the holding capacitance element Cadd
Insulating film GI used as one electrode and its dielectric film
Between the first conductive film d1 and the first conductive film formed thereon.
The specific resistance value is smaller and the size is smaller than the electrolytic film d1
An underlayer formed of the second conductive film d2 and the first conductive film d2;
The other electrode (third conductive film d3) with the second conductive film of the underlying layer
By connecting to the first conductive film d1 exposed from d2
And a step portion based on the other electrode of the storage capacitor element Cadd.
Along one of the electrodes of the storage capacitance element Cadd.
Can be attached to the storage capacitor Cadd.
Disconnection of the other electrode can be reduced. The transparent capacitor electrode ITO of the pixel has a storage capacitor
The liquid crystal display portion of the liquid crystal display device provided with the element Cadd is shown in FIG.
13 (equivalent circuit diagram showing liquid crystal display)
Have been. The liquid crystal display unit includes pixels, scanning signal lines GL,
Consists of repeating unit basic pattern including video signal line DL
Have been. Last stage scan used as capacitor electrode line
The signal line GL (or the first stage scanning signal line GL) is shown in FIG.
As shown, the common transparent pixel electrode (Vcom)
Continue. The common transparent pixel electrode ITO is as shown in FIG.
Thus, the silver paste material SI
L connects to the external lead-out wiring. And this
Some of the conductive layers (g1 and g2) of the external lead-out line are scanned
It is formed in the same manufacturing process as the signal line GL. This result
As a result, the final scanning signal line GL (capacitance electrode line)
It can be easily connected to the bright pixel electrode ITO. As described above, the last stage of the capacitor electrode line is
Connect to the elementary common transparent pixel electrode (Vcom) ITO
As a result, the capacitance electrode line at the final stage
It can be integrated with the conductive layer and has a common transparent
The elementary electrode ITO is connected to the external lead-out line.
With a simple configuration, the final stage capacitor electrode line can be
Can be connected to pole ITO. Further, the liquid crystal display device has already been
Therefore, it is described in Japanese Patent Application No. 62-95125 filed.
1 based on the DC cancellation method (DC cancellation method)
2 (time chart), as shown in FIG.
By controlling the drive voltage, additional voltage is applied to the liquid crystal LC.
DC component can be reduced. In FIG.
Vi is the driving voltage of the scanning signal line GL, and Vi + 1 is the driving voltage of the next stage.
This is the drive voltage of the test signal line GL. Vee is the scanning signal line G
Low-level drive voltages Vdmin, Vd applied to L
d is a high-level drive voltage applied to the scanning signal line GL
Vdmax. Each time t = t ₁ ~ T _Four Midpoint lighting in
The position Vlc (see FIG. 11) is referred to by the overlapping capacity Cgs.
Injection voltage ΔV ₁ ~ ΔV _Four Is as follows. T = t ₁ : ΔV ₁ = − (Cgs / C) · V2 t = t _Two : ΔV _Two = + (Cgs / C) · (V1 + V2) −
(Cadd / C) · V2 t = t _Three : ΔV _Three = − (Cgs / C) · V1 + (Cadd
/ C) · (V1 + V2) t = t _Four : ΔV _Four = − (Cadd / C) · V1, where the total capacity of the pixels: C = Cgs + Cpix + C
add Here, the driving voltage applied to the scanning signal line GL is sufficient.
If there is, the DC voltage applied to the liquid crystal LC is ΔV _Three + ΔV _Four = (Cadd · V2−Cgs · V1) / C, so that Cadd · V2 = Cgs · V1 = 0.
Then, the DC voltage applied to the liquid crystal LC becomes zero. That is, the direct current canceling method uses the superposition capacitance C
gs caused by the pull-in of the midpoint potential Vlc,
The storage capacitor Cadd and the next-stage scanning signal line GL (capacitance
The liquid crystal is pushed up by the drive voltage applied to the
The DC component applied to LC can be made extremely small.
You. As a result, the liquid crystal display improves the life of the liquid crystal LC.
Can be This DC canceling method is shown in FIG.
As shown in the equivalent circuit diagram of FIG.
L (or the capacitance electrode line) is replaced with the capacitance electrode line (or
Signal line GL).
Wear. FIG. 14 shows only four scanning signal lines GL for convenience.
Although not shown, actually several hundred scanning signal lines GL
Are located. First stage scanning signal line GL and last stage capacitance
The connection with the electrode wire is made by the internal wiring in the liquid crystal display or the external wiring.
This is done by outgoing wiring. As described above, the liquid crystal display device performs the first-stage scanning.
By connecting the signal line GL to the last stage capacitor electrode line,
All the scanning signal lines GL and the capacitor electrode lines are vertically scanned.
Because it can be connected to the circuit, DC cancellation method (DC
Cancellation method) can be adopted. As a result,
The DC component applied to the liquid crystal LC can be reduced.
Thus, the life of the liquid crystal LC can be improved. As described above, the invention made by the present inventor is:
Although specifically described based on the above embodiment, the present invention
The present invention is not limited to the above-described embodiment, but departs from the gist of the invention.
Of course, various changes can be made within the
You. For example, the present invention relates to a liquid crystal display of a liquid crystal display device.
Each pixel in the indicated portion can be divided into two or four.
However, if the number of pixel divisions is too large, the aperture ratio will be low.
Therefore, as described above, it is appropriate that about 2 to 4 divisions are appropriate.
You. The present invention is a representative of the inventions disclosed in the present application.
To briefly explain the effects that can be achieved by using
It is as described. Reduction of black spots on the liquid crystal display section of the liquid crystal display device
can do. Further, the first or last stage capacitor electrode line is
It can be connected to the common pixel electrode with a simple configuration. Further, it is not necessary to increase the number of manufacturing steps.
In addition, the first or last stage capacitor electrode line and the common pixel electrode
Connection can be achieved.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a main part plan view showing one pixel of a liquid crystal display section of an active matrix type color liquid crystal display device which is Embodiment I of the present invention. FIG. 2 is a sectional view taken along the line II-II in FIG. FIG. 3 is a plan view of a main part of a liquid crystal display unit in which a plurality of pixels shown in FIG. 1 are arranged. FIG. 4 is a plan view of a principal part in a predetermined manufacturing process of the pixel shown in FIG. 1; FIG. 5 is a plan view of relevant parts in a predetermined manufacturing step of the pixel shown in FIG. 1; FIG. 6 is a plan view of relevant parts in a predetermined manufacturing process of the pixel shown in FIG. 1; FIG. 7 is a plan view of relevant parts in a state where the pixel and the color filter shown in FIG. 3 are superimposed. FIG. 8 is a main part plan view showing one pixel of a liquid crystal display portion of an active matrix type color liquid crystal display device which is Embodiment II of the present invention. FIG. 9 is an equivalent circuit diagram showing a liquid crystal display section of an active matrix type color liquid crystal display device according to Embodiment I of the present invention. FIG. 10 is a plan view of relevant parts showing one pixel of a layout different from that of the pixel shown in FIG. 8; FIG. 11 is an equivalent circuit diagram of a pixel described in each of FIGS. 8 and 10; FIG. 12 is a time chart showing a driving voltage of a scanning signal line according to a direct current offset method. FIG. 13 is an equivalent circuit diagram showing a liquid crystal display section of an active matrix type color liquid crystal display device which is Embodiment II of the present invention. FIG. 14 is an equivalent circuit diagram showing a liquid crystal display unit of an active matrix type color liquid crystal display device which is Embodiment II of the present invention. [Description of Signs] SUB: transparent glass substrate, GL: scanning signal line, DL: video signal line, GI: insulating film, GT: gate electrode, AS: i
Type semiconductor layer, SD: source electrode or drain electrode, PS
V: protective film, LS: light shielding film, LC: liquid crystal, TFT: thin film transistor, ITO (COM): transparent pixel electrode, g,
d: conductive film, Cadd: storage capacitance element, Cgs: superposition capacitance, Cpix: liquid crystal capacitance.

──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Akira Sasano 3300 Hayano, Mobara-shi, Chiba Pref. 215239 (JP, A) (58) Field surveyed (Int. Cl. ⁶ , DB name) G02F 1/136 500 G02F 1/1343 G02F 1/1345

Claims (1)

(57) [Claims] A thin-film transistor and a thin-film transistor are provided at respective intersection regions between a plurality of scanning signal lines extending in the column direction and arranged in the row direction and a plurality of video signal lines extending in the row direction and arranged in the column direction on the first substrate. In a liquid crystal display device including a pixel including a pixel electrode, the pixel electrode of the pixel, the pixel electrode as one electrode,
A scanning capacitor line serving as the other electrode is formed by using another scanning signal line adjacent to the scanning signal line for selecting the pixel as a capacitor electrode line, and a second substrate is provided to face the first substrate. Providing a common electrode on a side of the second substrate facing the pixel electrode, wherein the common electrode is electrically connected to an external wiring provided on the first substrate by a conductive material, and the external wiring is At least a conductive layer formed at the same time as the scanning signal line is formed, and the first or last capacitance line of the plurality of lines is electrically connected to an external lead-out line of the common electrode. Liquid crystal display.