JPH0345661U - - Google Patents

Info

Publication number
JPH0345661U
JPH0345661U JP10691989U JP10691989U JPH0345661U JP H0345661 U JPH0345661 U JP H0345661U JP 10691989 U JP10691989 U JP 10691989U JP 10691989 U JP10691989 U JP 10691989U JP H0345661 U JPH0345661 U JP H0345661U
Authority
JP
Japan
Prior art keywords
conductivity type
base layer
layer
opposite conductivity
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10691989U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10691989U priority Critical patent/JPH0345661U/ja
Publication of JPH0345661U publication Critical patent/JPH0345661U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図は本考案の第1及び第2の実
施例の断面図、第3図は従来例の断面図である。 1……Nエピタキシヤル層、2……P型シリ
コン基板、3……酸化膜、4……ゲート電極、5
……アルミ配線、6……絶縁膜、7……N拡散
層(ドレイン)、8……N拡散層(ソース)、
9……P拡散層、10……Pベース層、11…
…空乏層、12……Nウエル層、13……曲率
半径。
1 and 2 are sectional views of the first and second embodiments of the present invention, and FIG. 3 is a sectional view of the conventional example. DESCRIPTION OF SYMBOLS 1... N - epitaxial layer, 2... P-type silicon substrate, 3... Oxide film, 4... Gate electrode, 5
... Aluminum wiring, 6 ... Insulating film, 7 ... N + diffusion layer (drain), 8 ... N + diffusion layer (source),
9...P + diffusion layer, 10...P base layer, 11...
...depletion layer, 12...N - well layer, 13...curvature radius.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 一導電型半導体基板上に形成された逆導電型不
純物層と、前記不純物層に形成された一導電型ベ
ース層と逆導電型ドレインと、前記ベース層に形
成された逆導電型ソースとを有する横型電界効果
トランジスタにおいて、前記半導体基板に接する
ように前記ベース層を形成したことを特徴とする
横型電界効果トランジスタ。
an impurity layer of opposite conductivity type formed on a semiconductor substrate of one conductivity type, a base layer of one conductivity type and a drain of opposite conductivity type formed on the impurity layer, and a source of opposite conductivity type formed on the base layer. A lateral field effect transistor, characterized in that the base layer is formed in contact with the semiconductor substrate.
JP10691989U 1989-09-11 1989-09-11 Pending JPH0345661U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10691989U JPH0345661U (en) 1989-09-11 1989-09-11

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10691989U JPH0345661U (en) 1989-09-11 1989-09-11

Publications (1)

Publication Number Publication Date
JPH0345661U true JPH0345661U (en) 1991-04-26

Family

ID=31655639

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10691989U Pending JPH0345661U (en) 1989-09-11 1989-09-11

Country Status (1)

Country Link
JP (1) JPH0345661U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007247183A (en) * 2006-03-14 2007-09-27 Sekisui House Ltd Eaves of building

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007247183A (en) * 2006-03-14 2007-09-27 Sekisui House Ltd Eaves of building

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