JPS6395255U - - Google Patents
Info
- Publication number
- JPS6395255U JPS6395255U JP19052486U JP19052486U JPS6395255U JP S6395255 U JPS6395255 U JP S6395255U JP 19052486 U JP19052486 U JP 19052486U JP 19052486 U JP19052486 U JP 19052486U JP S6395255 U JPS6395255 U JP S6395255U
- Authority
- JP
- Japan
- Prior art keywords
- high concentration
- region
- concentration diffusion
- conductivity type
- oxide film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009792 diffusion process Methods 0.000 claims description 9
- 239000000758 substrate Substances 0.000 claims description 5
- 239000011229 interlayer Substances 0.000 description 1
Description
第1図〜第3図はそれぞれ本考案の実施例の平
面図及び断面図、第4図は従来装置の一例の平面
図及び断面図である。
〈符号の説明〉1……p形基板、2……n+ソ
ース拡散領域、3……n+ドレイン拡散領域、4
……p+チヤンネルストツパ領域、5……ゲート
酸化膜、6……ゲート電極、7……ソース電極、
8……ドレイン電極、9……フイールド酸化膜、
10……層間絶縁膜、11……ソースコンタクト
領域、12……ドレインコンタクト領域、21,
22……n+拡散除去領域、23……p+チヤン
ネルストツパ除去領域。
1 to 3 are a plan view and a sectional view of an embodiment of the present invention, respectively, and FIG. 4 is a plan view and a sectional view of an example of a conventional device. <Explanation of symbols> 1...p-type substrate, 2...n + source diffusion region, 3...n + drain diffusion region, 4
... p + channel stopper region, 5 ... gate oxide film, 6 ... gate electrode, 7 ... source electrode,
8...Drain electrode, 9...Field oxide film,
10... Interlayer insulating film, 11... Source contact region, 12... Drain contact region, 21,
22...n + diffusion removal area, 23...p + channel stopper removal area.
Claims (1)
囲む形状に形成されたフイールド酸化膜と、該フ
イールド酸化膜下部の上記基板表面近傍に上記所
定領域を囲むように形成された第1導電形の高濃
度拡散領域と、上記基板表面近傍の上記所定領域
内に所定の間隔をおいて形成された2つの第2導
電形の高濃度拡散領域と、該2つの第2導電形の
高濃度拡散領域を跨ぐようにそれらとゲート酸化
膜を介して形成されたゲート電極とを備えたMO
Sトランジスタにおいて、上記2つの第2導電形
の高濃度拡散領域の少なくとも一方と上記第1導
電形の高濃度拡散領域とが、少なくとも上記ゲー
ト電極の下部の範囲では隣接しないように構成し
たことを特徴とするMOSトランジスタ。 a first conductive type substrate, a field oxide film formed in a shape surrounding a predetermined region on the surface of the substrate, and a first conductive film formed in the vicinity of the substrate surface below the field oxide film so as to surround the predetermined region. a high concentration diffusion region of a shape, two high concentration diffusion regions of a second conductivity type formed at a predetermined interval in the predetermined region near the substrate surface, and two high concentration diffusion regions of a second conductivity type. MO with a gate electrode formed across the diffusion region and a gate oxide film
In the S transistor, at least one of the two high concentration diffusion regions of the second conductivity type and the high concentration diffusion region of the first conductivity type are configured such that they are not adjacent to each other, at least in a region below the gate electrode. Characteristics of MOS transistors.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19052486U JPS6395255U (en) | 1986-12-12 | 1986-12-12 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19052486U JPS6395255U (en) | 1986-12-12 | 1986-12-12 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6395255U true JPS6395255U (en) | 1988-06-20 |
Family
ID=31143818
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19052486U Pending JPS6395255U (en) | 1986-12-12 | 1986-12-12 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6395255U (en) |
-
1986
- 1986-12-12 JP JP19052486U patent/JPS6395255U/ja active Pending
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