JPH01104049U - - Google Patents
Info
- Publication number
- JPH01104049U JPH01104049U JP19801387U JP19801387U JPH01104049U JP H01104049 U JPH01104049 U JP H01104049U JP 19801387 U JP19801387 U JP 19801387U JP 19801387 U JP19801387 U JP 19801387U JP H01104049 U JPH01104049 U JP H01104049U
- Authority
- JP
- Japan
- Prior art keywords
- conductivity type
- type provided
- well
- semiconductor substrate
- channel stopper
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 3
- 108010075750 P-Type Calcium Channels Proteins 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Description
第１図ａ，ｂは本考案の第１の実施例を示す平
面図及びＡ―Ａ′線断面図、第２図は本考案の第
２の実施例を示す平面図、第３図は従来の半導体
装置の一例を示す断面図である。
１……Ｎ型ソース領域、２……Ｐ型チヤネルス
トツパー、３……Ｐ型ウエル、４……Ｎ型シリコ
ン基板、５……フイールド酸化膜、６……ゲート
電極、７……Ｎ型ドレイン領域。
Figures 1a and b are a plan view and a sectional view taken along the line A-A' of the first embodiment of the present invention, Figure 2 is a plan view of the second embodiment of the present invention, and Figure 3 is a conventional 1 is a cross-sectional view showing an example of a semiconductor device of FIG. DESCRIPTION OF SYMBOLS 1...N-type source region, 2...P-type channel stopper, 3...P-type well, 4...N-type silicon substrate, 5...field oxide film, 6...gate electrode, 7...n-type drain area.
Claims (1)
けた逆導電型ウエルと、前記ウエル周辺に設けた
逆導電型チヤネルストツパーと、前記チヤネルス
トツパーと接触しない部分を少なくとも１個所有
するように設けられた一導電型ソース及びドレイ
ン領域と該ソース領域とドレイン領域との間に絶
縁膜を介して設けられたゲート電極とから成るＭ
ＯＳトランジスタを有することを特徴とする半導
体集積回路。 a semiconductor substrate of one conductivity type, a well of a reverse conductivity type provided on the semiconductor substrate, a channel stopper of a reverse conductivity type provided around the well, and at least one portion not in contact with the channel stopper; M consisting of source and drain regions of one conductivity type provided and a gate electrode provided between the source region and the drain region with an insulating film interposed therebetween.
A semiconductor integrated circuit characterized by having an OS transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19801387U JPH01104049U (en) | 1987-12-25 | 1987-12-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19801387U JPH01104049U (en) | 1987-12-25 | 1987-12-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01104049U true JPH01104049U (en) | 1989-07-13 |
Family
ID=31488539
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19801387U Pending JPH01104049U (en) | 1987-12-25 | 1987-12-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01104049U (en) |
-
1987
- 1987-12-25 JP JP19801387U patent/JPH01104049U/ja active Pending
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