JPS61131857U - - Google Patents
Info
- Publication number
- JPS61131857U JPS61131857U JP1985014595U JP1459585U JPS61131857U JP S61131857 U JPS61131857 U JP S61131857U JP 1985014595 U JP1985014595 U JP 1985014595U JP 1459585 U JP1459585 U JP 1459585U JP S61131857 U JPS61131857 U JP S61131857U
- Authority
- JP
- Japan
- Prior art keywords
- diffusion region
- semiconductor substrate
- electrode
- variable capacitance
- lead wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009792 diffusion process Methods 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims description 4
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 claims 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
Description
第1図は本考案による可変容量ダイオードの断
面図、第2図は従来の可変容量ダイオードの断面
図である。
主な図番の説明、1は可変容量ダイオード、2
はN+型のシリコン基板、3はN型のエピタキシ
ヤル層、4はリング状のP+型の第1の拡散領域
、5は第2の拡散領域、6は薄いP+型の拡散領
域、7は第1の絶縁膜、8は第2の絶縁膜、9は
Al電極、10はリード線、11はジヤケツトコ
ート膜である。
FIG. 1 is a sectional view of a variable capacitance diode according to the present invention, and FIG. 2 is a sectional view of a conventional variable capacitance diode. Explanation of main figure numbers, 1 is variable capacitance diode, 2
is an N + type silicon substrate, 3 is an N type epitaxial layer, 4 is a ring-shaped P + type first diffusion region, 5 is a second diffusion region, 6 is a thin P + type diffusion region, 7 is a first insulating film, 8 is a second insulating film, 9 is an Al electrode, 10 is a lead wire, and 11 is a jacket coat film.
Claims (1)
た逆導電型の第1の拡散領域と該拡散領域上に形
成した電極と該電極上に形成したリード線とを具
備し空乏層の厚さを容量変化として検知する可変
容量ダイオードに於て、前記リード線接合部と対
応する半導体基板内に形成した第2の拡散領域と
、該第2の拡散領域と対応する前記電極内に形成
した絶縁膜とを具備することを特徴とした可変容
量ダイオード。 It includes a semiconductor substrate of one conductivity type, a first diffusion region of an opposite conductivity type formed on the semiconductor substrate, an electrode formed on the diffusion region, and a lead wire formed on the electrode. In a variable capacitance diode that detects a capacitance change, a second diffusion region formed in the semiconductor substrate corresponding to the lead wire junction, and an insulating film formed in the electrode corresponding to the second diffusion region. A variable capacitance diode comprising:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985014595U JPS61131857U (en) | 1985-02-04 | 1985-02-04 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985014595U JPS61131857U (en) | 1985-02-04 | 1985-02-04 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61131857U true JPS61131857U (en) | 1986-08-18 |
Family
ID=30499662
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1985014595U Pending JPS61131857U (en) | 1985-02-04 | 1985-02-04 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61131857U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006294776A (en) * | 2005-04-08 | 2006-10-26 | Toko Inc | Diode |
-
1985
- 1985-02-04 JP JP1985014595U patent/JPS61131857U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006294776A (en) * | 2005-04-08 | 2006-10-26 | Toko Inc | Diode |
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