JPS6268252U - - Google Patents

Info

Publication number
JPS6268252U
JPS6268252U JP16014885U JP16014885U JPS6268252U JP S6268252 U JPS6268252 U JP S6268252U JP 16014885 U JP16014885 U JP 16014885U JP 16014885 U JP16014885 U JP 16014885U JP S6268252 U JPS6268252 U JP S6268252U
Authority
JP
Japan
Prior art keywords
region
type
integrated circuit
semiconductor substrate
diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16014885U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP16014885U priority Critical patent/JPS6268252U/ja
Publication of JPS6268252U publication Critical patent/JPS6268252U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例であり集積回路に組
込まれるダイオードを示す断面図、第2図は従来
の集積回路に組込まれるダイオードを示す断面図
である。 主な図番の説明、1はN型の半導体基板、2
はN型のエピタキシヤル層、3はP型の第1領
域、4はN型の第2領域、5は熱酸化膜である
FIG. 1 is an embodiment of the present invention, and is a sectional view showing a diode incorporated into an integrated circuit, and FIG. 2 is a sectional view showing a diode incorporated into a conventional integrated circuit. Explanation of main figure numbers, 1 is N + type semiconductor substrate, 2
3 is an N type epitaxial layer, 3 is a P type first region, 4 is an N + type second region, and 5 is a thermal oxide film.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 少なくともN型の半導体基板と該半導体基板に
形成されたP型の第1領域と前記第1領域内に形
成されたN型の第2領域とを具備する集積回路
に組込まれるダイオードに於いて、少なくとも前
記第1領域と第2領域との接合部の表面露出部に
新たに形成し直した熱酸化膜を具備することを特
徴とした集積回路に組込まれるダイオード。
In a diode incorporated into an integrated circuit, the diode includes at least an N-type semiconductor substrate, a P-type first region formed on the semiconductor substrate, and an N + -type second region formed in the first region. . A diode incorporated into an integrated circuit, comprising a newly formed thermal oxide film on at least an exposed surface of a junction between the first region and the second region.
JP16014885U 1985-10-18 1985-10-18 Pending JPS6268252U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16014885U JPS6268252U (en) 1985-10-18 1985-10-18

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16014885U JPS6268252U (en) 1985-10-18 1985-10-18

Publications (1)

Publication Number Publication Date
JPS6268252U true JPS6268252U (en) 1987-04-28

Family

ID=31085257

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16014885U Pending JPS6268252U (en) 1985-10-18 1985-10-18

Country Status (1)

Country Link
JP (1) JPS6268252U (en)

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