JPH0337221B2 - - Google Patents
Info
- Publication number
- JPH0337221B2 JPH0337221B2 JP57215549A JP21554982A JPH0337221B2 JP H0337221 B2 JPH0337221 B2 JP H0337221B2 JP 57215549 A JP57215549 A JP 57215549A JP 21554982 A JP21554982 A JP 21554982A JP H0337221 B2 JPH0337221 B2 JP H0337221B2
- Authority
- JP
- Japan
- Prior art keywords
- bus
- data
- input
- signal
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
- G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Bus Control (AREA)
- Small-Scale Networks (AREA)
- Multi Processors (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21554982A JPS59106021A (ja) | 1982-12-10 | 1982-12-10 | バス構成方式 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21554982A JPS59106021A (ja) | 1982-12-10 | 1982-12-10 | バス構成方式 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59106021A JPS59106021A (ja) | 1984-06-19 |
JPH0337221B2 true JPH0337221B2 (enrdf_load_stackoverflow) | 1991-06-04 |
Family
ID=16674266
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21554982A Granted JPS59106021A (ja) | 1982-12-10 | 1982-12-10 | バス構成方式 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59106021A (enrdf_load_stackoverflow) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4949239A (en) * | 1987-05-01 | 1990-08-14 | Digital Equipment Corporation | System for implementing multiple lock indicators on synchronous pended bus in multiprocessor computer system |
US4980854A (en) * | 1987-05-01 | 1990-12-25 | Digital Equipment Corporation | Lookahead bus arbitration system with override of conditional access grants by bus cycle extensions for multicycle data transfers |
US4941083A (en) * | 1987-05-01 | 1990-07-10 | Digital Equipment Corporation | Method and apparatus for initiating interlock read transactions on a multiprocessor computer system |
US4858116A (en) * | 1987-05-01 | 1989-08-15 | Digital Equipment Corporation | Method and apparatus for managing multiple lock indicators in a multiprocessor computer system |
JPH02303242A (ja) * | 1989-05-17 | 1990-12-17 | Nec Corp | バス中継装置 |
US5510920A (en) * | 1991-01-07 | 1996-04-23 | Fuji Xerox Co., Ltd. | Local area network |
US5523879A (en) * | 1991-04-26 | 1996-06-04 | Fuji Xerox Co., Ltd. | Optical link amplifier and a wavelength multiplex laser oscillator |
JPH1063613A (ja) * | 1996-08-26 | 1998-03-06 | Nec Corp | 半導体集積回路 |
EP0892352B1 (en) * | 1997-07-18 | 2005-04-13 | Bull S.A. | Computer system with a bus having a segmented structure |
JP2004102799A (ja) | 2002-09-11 | 2004-04-02 | Nec Electronics Corp | レジスタファイル及びレジスタファイルの設計方法 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5393748A (en) * | 1977-01-27 | 1978-08-17 | Nec Corp | Multiple information processor |
JPS54152942A (en) * | 1978-05-24 | 1979-12-01 | Nec Corp | Bus control system of data processing system |
-
1982
- 1982-12-10 JP JP21554982A patent/JPS59106021A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS59106021A (ja) | 1984-06-19 |
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