JPH03285336A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPH03285336A
JPH03285336A JP2085795A JP8579590A JPH03285336A JP H03285336 A JPH03285336 A JP H03285336A JP 2085795 A JP2085795 A JP 2085795A JP 8579590 A JP8579590 A JP 8579590A JP H03285336 A JPH03285336 A JP H03285336A
Authority
JP
Japan
Prior art keywords
wire
bonding
gold wire
gold
capillary
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2085795A
Other languages
English (en)
Inventor
Masao Segawa
雅雄 瀬川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2085795A priority Critical patent/JPH03285336A/ja
Publication of JPH03285336A publication Critical patent/JPH03285336A/ja
Pending legal-status Critical Current

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  • Engineering & Computer Science (AREA)
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  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は、電極パッドを有りる崖導体素子を回路基板に
固定する半導体装置に関する。
(従来の技術) 絶縁基板上にマウントされた半導体素子をワイヤーボン
ディング法により実装した従来の半導体装置の一例を第
4図に示す。
第4図(a)は、半導体索子3がマウントされた絶縁基
板1を示す。絶縁基板1は高純度アルミナを絶縁素材と
し、金ペーストによる配線導体を形成しである。9は配
置a々休のうちワイヤーボンディング用のボンディング
ランドを示づ。また2は半導体素子3を基板1に接着づ
る接着剤であり、ここでは熱硬化性Aoペースト等のI
P電電接着金用いている。このような絶縁1.1板1に
は、予め印刷等の手段によって塗布した金ペーストを^
温焼成して厚さ10〜20μm程度の配線導体(ボンデ
ィングランド)9を形成する。その後、絶縁基板1に接
着剤2を塗布し、半導体索子3を仮接着し、g1温焼成
して半導体素子3を基板1に固定(ダイボンディング)
する。このようにして、第4図(a)に示すような半導
体素子3がマウントされた半導体装置が形成される。
次に、第4図(b)に承りように、キャピラリ5を半尋
体素f3のアルミ電極パッド4の上に移動し、キャピラ
リ5を通した直径20〜50μmの金線6の先端に放電
用電極7を用いて放電を行い、金線6の先端を溶融して
己径数十μmの金ボ−ル8を形成する。尚、この時点で
熱圧着のために、絶縁基板1を100〜150℃に加熱
している。次に、第4図(C)に示すように、キャピラ
リ5に超音波振動を与え、金ボール8を半導体素子3の
アルミ電極パッド4に前記キャピラリ5の先端で加圧し
接合する(第1ボンデイング)。このような熱圧着法(
T、S法)により金線6の半導体素子3側の接合を行っ
た後、第4図1)に示すように、金線6を通したキャピ
ラリ5を絶縁1板1上のボンディングランド9上へ移動
する。
そして、第4図(e)に示すように、金線6をT。
S法によりボンディングランド9に接合(第2ボンデイ
ング)する。この後、第4図(f)に示すように、キャ
ピラリ5を、ボンディングランド9より引き離すことで
、ボンディングを完了する。
第4図に示した装置は、第5図に拡大して示1ようにア
ルミ電極パッド4と金ボール8の接合部よりボンディン
グランド9と金線6の接合部の方が低い位置になるため
、金ボール8側にループ10を形成し、金ボール8のネ
ック部に応力がかからないようにしている。このため、
ループ10によって半導体装置の高さを大きくしてしま
う。
一方、近年、半導体装2jの低コスト化のために配l1
1w4体を銅等の卑金属にする試みがなされている。こ
れに対応して、(850℃〉空気中焼成型抵抗体を用い
、配線導体に低fA(600℃)窒素焼成型銅導体を用
いたハイブリッドIC(HIC)基板が開発されている
。さらに、このような低温焼成yの配#!a導体(I!
4NWA)に対しても、上記高密度実装を達成するため
、第4図に示したようなワイヤーボンディングをする要
求がある。ところが、上記銅厚膜では、銅表面の数千人
の銅酸化膜やガラス層が形成されており、金線との金−
銅接合は十分なものといえない。特に、600℃程麿の
低温焼成型t!4導体では、焼結が不十分であり、厚膜
内部に多数の空隙(ボイド)が存7fする。従って、第
2ボンデイングで金線をキャピラリで銅厚膜に加圧する
際にキャピラリが銅厚膜に沈み込み(見掛は上、高度が
低下する)、十分な接合が得られないとともに、キャピ
ラリ内部に金線が潜り込み、次の金ボールを形成できな
いといった不都合が発生した。
一方、この金線の接合強度を測定する方法に、金線リー
ド部中央を引っ張り、金線が破!liするときの引張り
強度を、金線の接合強度とする方法がある。このような
測定方法において、金線の破断する部分は、第2ボンデ
イングの接合部が大半である。このことは、この第2ボ
ンデイングの接合部の強度不足が金線の破断の原因とな
っていることを示している。これは、上述の理由よるも
のであり、銅厚膜へのボンディングの茶杓より強めにす
る必要がある。しかしながら、金線は、細いために、過
度の加圧や超音波出力を印加すると反対に切断し易くな
る。
第6図はこのような金線の引張り強度と超音波出力の関
係を測定したグラフである。縦軸は引張り強度(単位Q
−f)を示し、横軸は超音波出力を示す。尚、第2ボン
デイングにおいて与える石型は80g・fである。
上記グラフは、熱圧肴時に加える超音波の出力レベルと
して、第2ボンデイングにおける金線(30μm)の変
形を押さえた1、OW付近が最も強度が高いことを示し
ているが、1.OW付近でも最低で5g・f程度のもの
もある。このため、銅F711uを用いた場合の金線の
引っ張り強度は実用上不十分であった。
(発明が解決しようとづる課題) 前記した従来の半導体装おでは、電極パッドと金ボール
の接合部の金線がループ状になり、半導体装置の厚みが
大きくなる。また、絶縁基板等のベース部材の金Jii
F7膜ボンディングランドに銅等の卑金属を用いた場合
には接続の強度が不十分であるという問題がイiっだ。
そこで本発明は、上記の問題点を除去し、薄形実装が可
能であると共にベース部材の金属P7膜接続に銅等の卑
金属を用いても十分な強度が得られる半導体装5を提供
づることを目的とする。
[発明の構成] (′a題を解決づるための手段) 本発明は、予め配線導体が形成された絶縁基板と、この
絶縁基板に電極パッド形成面とは反対側の面を接着固定
した半導体素子と、一端がボール状に形成されて前記電
極パッドに接続し、他端が前記に接続した金線とを具備
したことを特徴とする。
(作用) この様な構成によれば、配線導体側に金ボールが接続さ
れ、金ボールと導体層との面接続となり、接続強度が十
分に得られる。また、超音波やボンディング荷重を加え
る時にも金ボールの変形作用でその振動を吸収でき接続
強度が劣化しない。
(実施例) 以下、本発明の実施例を図面を参照して説明する。
第1図は本発明に係る半導体装置の一実施例を製造工程
順に示した工程図である。
先ず、第1図(a)に示1ようなボンディング前の半導
体装置を作成づる。このような半導体装置は、表面平滑
性のよい96%アルミブを用いて形成したベース部材(
絶縁基板)11を用意し、該絶縁基板11に、例えばス
クリーン印刷法により、市販の低温焼成型銅ペーストを
印刷する。次に、銅ペーストを印刷した絶#1基板11
を乾燥し、600℃の窒素を用いた焼成炉に通し、絶縁
基板11に印刷された銅ペーストを焼成して銅厚膜配線
導体19を形成する。このような焼成の後、従来と同様
に、絶R基板11には、例えば熱硬化性AQペースト等
の導電接着剤12を介して半導体素子3をダイボンディ
ングする。このようにして、第4図aに示すようなワイ
ヤボンディング前の半導体装tが形成される。
次に、第1図(b)に示すように、絶縁基板11を10
0〜150℃に加熱し、キトピラリ15を通した直径2
0〜50μmの金線16の先端に対して放電用電極17
を用いて放電し、金線16の先端を溶融して直径80μ
mの企ボール18を形成づる。次に、第1図(C)に示
づように、T、S法により、金ボール18を絶縁基板1
1上の銅厚膜配線導体19上に前記ギヤピラリ15の先
端で加圧し接合づる(第1ボンデイング)。次に、第1
図(d)に示すように、金線16を通したキャピラリ1
5を半導体素子13上のアルミ電極パッド14上へ移動
して、金線16を銅厚膜配線導体19からアルミ電極バ
ッド14へ延設づる。そして、第1図(e)の如く、金
線16をT、S法によりアルミ電極パッド14に接合(
第2ボンデイング)する。そして第1図(f)に示づよ
うに、キャピラリ15側の金線16を、アルミ電極パッ
ド15側の金線6の接合部16jより引き11111−
=jことで、ボンディングが完了する。
第2図は第1図(f)の金線16を示す側面図である。
この図に示1ように、金ボール18の接合部は、アルミ
?Ii極パッド14よりも低い位賀になり、金ボール1
8から延びる金線16に対して自然にループを形成づる
。このため、そのループによって半導体装置の高さが大
きくされることがない。
また、銅厚膜配線導体19と金ボール18との接合は、
接合面積を十分に広く取ることができ、線と面の接合よ
り接合強度が大きくなる。また、ボンディング時、ボン
ディング荷重や超音波出力を人キ<シても、それによる
キャピラリ15等の振動を金ボールが変形りることで吸
収でさ、ボンディング時の振動により接合強度が劣化し
てしまうことF:)ない。この場合の超n波出力の強度
は第3図に示づ引張り強r11試験のグラフにおいて最
も引張り強度がnくなる2、5Wと八めることがrき、
第6図の1.0WJ、り大きくすることができる。この
2.5Wの条例での接続強度は、最低で610Q−f程
度あり、十分に実用レベルとなる。
一方、アルミ電極バッド14は、金線16による線と面
の接合となるが、この接合は金−アルミ接合となるので
、十分な強度と電気的接続がvノられる。
尚、本発明は銅す膜のみならず他の金属材料による膜導
体にも適応できる。
[発明の効果] 以上述べた様に本発明によれば、薄形実装が可能となり
、配置9Q体に銅等の卑金属を用いても、−1分な金線
の接合強度が得られる。
【図面の簡単な説明】
第1図は本発明に係る半導体装置の一実施例を示す工程
図、第2図は金線のボンディング状態を示す側面図、第
3図は上記金線の引張り強度と超音波出力の関係を示す
グラフ、第4図は従来の半導体装買の製造工程を説明す
る工程図、第5図は従来の金線のボンディング状態を示
す側面図、第6図は上記金線の引張り強度と超音波出力
の関係を示すグラフである。 11・・・絶縁基板、13・・・単導体素子、14・・
・アルミ電極パッド、15・・・キャピラリ、16・・
・金線、18・・・金ボール、19・・・銅厚膜配線導
体。 、O 第2 第3図 第4図 第5図 第6図

Claims (1)

  1. 【特許請求の範囲】  予め配線導体が形成された絶縁基板と、 この絶縁基板に電極パッド形成面とは反対側の面を接着
    固定した半導体素子と、 一端がボール状に形成されて前記電極パッドに接続し、
    他端が前記配線導体に接続した金線とを具備したことを
    特徴とする半導体装置。
JP2085795A 1990-03-31 1990-03-31 半導体装置 Pending JPH03285336A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2085795A JPH03285336A (ja) 1990-03-31 1990-03-31 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2085795A JPH03285336A (ja) 1990-03-31 1990-03-31 半導体装置

Publications (1)

Publication Number Publication Date
JPH03285336A true JPH03285336A (ja) 1991-12-16

Family

ID=13868823

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2085795A Pending JPH03285336A (ja) 1990-03-31 1990-03-31 半導体装置

Country Status (1)

Country Link
JP (1) JPH03285336A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5614113A (en) * 1995-05-05 1997-03-25 Texas Instruments Incorporated Method and apparatus for performing microelectronic bonding using a laser
CN103151280A (zh) * 2013-03-04 2013-06-12 哈尔滨工业大学(威海) 一种金丝与铜箔的连接方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5614113A (en) * 1995-05-05 1997-03-25 Texas Instruments Incorporated Method and apparatus for performing microelectronic bonding using a laser
CN103151280A (zh) * 2013-03-04 2013-06-12 哈尔滨工业大学(威海) 一种金丝与铜箔的连接方法

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