JPH032667U - - Google Patents
Info
- Publication number
- JPH032667U JPH032667U JP6304089U JP6304089U JPH032667U JP H032667 U JPH032667 U JP H032667U JP 6304089 U JP6304089 U JP 6304089U JP 6304089 U JP6304089 U JP 6304089U JP H032667 U JPH032667 U JP H032667U
- Authority
- JP
- Japan
- Prior art keywords
- board
- grooves
- chip ceramic
- area
- groove
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 5
- 239000000919 ceramic Substances 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Structure Of Printed Boards (AREA)
Description
第１図は本考案の原理図、第２図は本考案の一
実施例を示す構成図、第３図は従来の多数個取り
セラミツク基板の構造図、第４図は分割後の小面
積セラミツク基板の構造図、第５図は基板搬送時
の説明図、第６図は従来の連設プリント基板の平
面図である。
図中、１は大面積基板、２は小面積基板、３は
溝、３Ａは深溝部、４は交差部である。
Figure 1 is a diagram of the principle of the present invention, Figure 2 is a configuration diagram showing an embodiment of the present invention, Figure 3 is a structural diagram of a conventional multi-chip ceramic substrate, and Figure 4 is a diagram of a small area ceramic substrate after division. FIG. 5 is an explanatory diagram of the board during transportation, and FIG. 6 is a plan view of a conventional connected printed circuit board. In the figure, 1 is a large area substrate, 2 is a small area substrate, 3 is a groove, 3A is a deep groove portion, and 4 is an intersection portion.
Claims (1)
縦横に形成された溝３に沿つて複数の小面積基板
２に分割する多数個取りセラミツク基板において
、 縦方向と横方向の溝３の交差部４あるいは該溝
３の端部４′に一段深い深溝部３Ａを形成してな
ることを特徴とする多数個取りセラミツク基板。[Scope of Claim for Utility Model Registration] In a multi-chip ceramic board in which a large-area board 1 processed with wiring and component mounting is divided into a plurality of small-area boards 2 along grooves 3 formed vertically and horizontally, A multi-chip ceramic substrate characterized in that a deeper groove portion 3A is formed at the intersection 4 of the grooves 3 in the direction or at the end portion 4' of the groove 3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6304089U JPH032667U (en) | 1989-05-31 | 1989-05-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6304089U JPH032667U (en) | 1989-05-31 | 1989-05-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH032667U true JPH032667U (en) | 1991-01-11 |
Family
ID=31592739
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6304089U Pending JPH032667U (en) | 1989-05-31 | 1989-05-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH032667U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52150154U (en) * | 1976-05-10 | 1977-11-14 | ||
| JP2013125855A (en) * | 2011-12-14 | 2013-06-24 | Seiko Epson Corp | Ceramic substrate, electronic device and electronic apparatus, manufacturing method of electronic device and manufacturing method of ceramic substrate |
-
1989
- 1989-05-31 JP JP6304089U patent/JPH032667U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52150154U (en) * | 1976-05-10 | 1977-11-14 | ||
| JP2013125855A (en) * | 2011-12-14 | 2013-06-24 | Seiko Epson Corp | Ceramic substrate, electronic device and electronic apparatus, manufacturing method of electronic device and manufacturing method of ceramic substrate |