JPH03257849A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH03257849A JPH03257849A JP5536890A JP5536890A JPH03257849A JP H03257849 A JPH03257849 A JP H03257849A JP 5536890 A JP5536890 A JP 5536890A JP 5536890 A JP5536890 A JP 5536890A JP H03257849 A JPH03257849 A JP H03257849A
- Authority
- JP
- Japan
- Prior art keywords
- film
- sog film
- substrate
- sog
- semiconductor substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 25
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 238000000034 method Methods 0.000 claims abstract description 10
- 239000007791 liquid phase Substances 0.000 claims description 5
- 239000000126 substance Substances 0.000 claims 4
- 230000000694 effects Effects 0.000 abstract description 3
- 239000011248 coating agent Substances 0.000 abstract description 2
- 238000000576 coating method Methods 0.000 abstract description 2
- 238000010438 heat treatment Methods 0.000 abstract description 2
- 230000001788 irregular Effects 0.000 abstract 1
- 229910052751 metal Inorganic materials 0.000 description 7
- 239000002184 metal Substances 0.000 description 7
- 238000007796 conventional method Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 239000007888 film coating Substances 0.000 description 3
- 238000009501 film coating Methods 0.000 description 3
- 229910000838 Al alloy Inorganic materials 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 230000001419 dependent effect Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000005389 semiconductor device fabrication Methods 0.000 description 1
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、微細な多層金属配線を有する半導体装置の製
造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having fine multilayer metal wiring.
従来の技術 半導体デバイスは高集積化へと限りなく進化している。Conventional technology Semiconductor devices are evolving endlessly towards higher integration.
特に最近では多層金属配線構造を持つ高集積度半導体装
置が増加している。一般的には、アルミ系合金を用いた
金属配線は配線の断線等、信頼性を向上させるためアル
ミ系合金の膜厚を厚く形成している。従って段差が太き
(なりがちであり、多層金属配線を形成する際には平坦
化技術が特に重要となっている。一般的に微細な半導体
装置の多層金属配線を形成する際に平坦化技術が用いら
れるが、その中でも最もポピユラーな技術がスピン・オ
ン・ガラス(以下SOGと略す)である。この方法は、
多層金属配線工程で半導体基板表面の凹凸部分にSOG
膜(液相にしたガラス膜)を回転塗布した後加熱硬化さ
せ、半導体基板表面の凹凸を緩和するものである。Particularly recently, highly integrated semiconductor devices having a multilayer metal wiring structure have been increasing. Generally, in metal wiring using an aluminum alloy, the film thickness of the aluminum alloy is formed to be thick in order to improve reliability, such as disconnection of the wiring. Therefore, the steps tend to be thick, and planarization technology is particularly important when forming multilayer metal wiring.Generally, planarization technology is used when forming multilayer metal wiring for fine semiconductor devices. Among these, the most popular technology is spin-on-glass (hereinafter abbreviated as SOG).This method is
SOG applied to uneven parts of semiconductor substrate surface during multilayer metal wiring process
A film (a glass film in a liquid phase) is spin-coated and then heated and cured to reduce irregularities on the surface of a semiconductor substrate.
第2図(a) 、 (b)は従来の方法でSOG膜を形
成したものの工程順断面図であり、半導体基板1.絶縁
膜22段差部分3を有するものに、第2図(a)のよう
に、SOG膜4を形成し、次に、第2図(b)のように
、上層膜5を設けたものである。FIGS. 2(a) and 2(b) are cross-sectional views in the order of steps of forming an SOG film using a conventional method. As shown in FIG. 2(a), an SOG film 4 is formed on the insulating film 22 having the stepped portion 3, and then an upper layer film 5 is provided as shown in FIG. 2(b). .
発明が解決しようとする課題
しかしながら、このSOG法は、簡便であイが、最近の
超微細加工においてはSOG膜4のd布特性にパターン
依存性が出易く、半導体装置本造段階で歩留まり低下の
一因を担っていた。−船釣なSOG法では基板を一方向
に回転させて中矢部からSOG膜を滴下したり、あるい
は滴下してから一方向に回転させているが、これではど
うしてもSOG膜の塗布状態に方向性が出易い。滴下す
るSOG膜の粘度を適正化することによりある程度改善
はされるが、品種により適正粘度を選択することは事実
上困難である。Problems to be Solved by the Invention However, although this SOG method is simple, in recent ultrafine processing, the d-cloth characteristics of the SOG film 4 tend to be pattern dependent, resulting in a decrease in yield at the stage of semiconductor device fabrication. was a contributing factor. - In the boat fishing SOG method, the substrate is rotated in one direction and the SOG film is dropped from the center arrow part, or the substrate is dropped and then rotated in one direction, but this method inevitably affects the state of the SOG film coating. is easy to appear. Although some improvement can be achieved by optimizing the viscosity of the SOG film to be dropped, it is actually difficult to select the appropriate viscosity depending on the product.
課題を解決するための手段
本発明は、SOG膜塗布工程において上記問題点を解決
するために基板の回転方向を反転させ、SOG膜の塗布
特性に方向性が出ないようにしたものである。Means for Solving the Problems In the present invention, in order to solve the above-mentioned problems in the SOG film coating process, the direction of rotation of the substrate is reversed so that the coating characteristics of the SOG film are not directional.
作用
この構成では、SOG@を正転、逆転の2方向から塗布
することにより、SOG膜の塗布が従来の方法よりもよ
り均一性よく行えるようになる。Function: With this configuration, by applying SOG@ from two directions, forward and reverse, the SOG film can be applied more uniformly than in the conventional method.
実施例
本発明の一実施例について図面を用いながら説明を行う
。第1図(a)〜(C)に本発明の半導体装置の製造方
法における工程順断面図を示す。まず、半導体基板1上
絶縁膜2の凹凸面3にSOG膜4を回転塗布する(第1
図(a))。次に半導体基板1を逆方向に回転させSO
G膜41を回転塗布する(第1図(b))。その後加熱
を行い、SOG膜4とSOG膜41を硬化させ42上層
膜5を堆積する(第1図(C))。Embodiment An embodiment of the present invention will be described with reference to the drawings. FIGS. 1A to 1C are cross-sectional views showing steps in the method for manufacturing a semiconductor device of the present invention. First, the SOG film 4 is spin-coated on the uneven surface 3 of the insulating film 2 on the semiconductor substrate 1 (first
Figure (a)). Next, the semiconductor substrate 1 is rotated in the opposite direction and the SO
A G film 41 is spin-coated (FIG. 1(b)). Thereafter, heating is performed to harden the SOG film 4 and the SOG film 41, and the upper layer film 42 is deposited (FIG. 1(C)).
発明の効果
本発明を用いることにより、従来方法では困難であった
微細パターンでのSOG膜塗布特性が改善され、微細な
半導体装置、特に多層金属配線を用いる半導体装置の製
造において大きな効果を発揮できるものである。Effects of the Invention By using the present invention, the SOG film coating characteristics in fine patterns, which were difficult to achieve using conventional methods, have been improved, and great effects can be exhibited in the manufacture of fine semiconductor devices, especially semiconductor devices that use multilayer metal wiring. It is something.
第1図は本発明の実施例半導体装置の製造方法の工程順
断面図、第2図に従来方法での半導体装置の製造方法工
程順断面図である。
l・・・・・・半導体基板、2・・・・・・凹凸面、3
・・・・・・絶縁膜、4・・・・・・SOG膜、41・
・・・・・SOG膜、42・・・・・・SOG膜、5・
・・・・・上層膜。FIG. 1 is a step-by-step sectional view of a method for manufacturing a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a step-by-step sectional view of a conventional method for manufacturing a semiconductor device. l... Semiconductor substrate, 2... Uneven surface, 3
...Insulating film, 4...SOG film, 41.
...SOG film, 42...SOG film, 5.
...upper layer membrane.
Claims (2)
ら液相物質を滴下させ、半導体基板上の凹凸面に液相物
質を塗布する工程と、前記半導体基板の凹凸面を反対方
向に回転させながら前記液相物質を滴下させ、半導体基
板上の凹凸面に再び前記液相物質を塗布する工程とを含
むことを特徴とする半導体装置の製造方法。(1) Dropping a liquid phase substance on the uneven surface of the semiconductor substrate without rotating it in a certain direction, applying the liquid phase substance to the uneven surface of the semiconductor substrate, and rotating the uneven surface of the semiconductor substrate in the opposite direction. A method for manufacturing a semiconductor device, comprising the steps of: dropping the liquid phase substance while rotating the semiconductor substrate; and applying the liquid phase substance again to the uneven surface of the semiconductor substrate.
を含むことを特徴とする請求項1記載の半導体装置の製
造方法。2. The method of manufacturing a semiconductor device according to claim 1, further comprising: (2) reversing the rotational direction of the semiconductor substrate two or more times.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5536890A JPH03257849A (en) | 1990-03-07 | 1990-03-07 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5536890A JPH03257849A (en) | 1990-03-07 | 1990-03-07 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03257849A true JPH03257849A (en) | 1991-11-18 |
Family
ID=12996544
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5536890A Pending JPH03257849A (en) | 1990-03-07 | 1990-03-07 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03257849A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100246780B1 (en) * | 1996-10-31 | 2000-03-15 | 김영환 | Method of forming spin on glass layer |
JP2014060269A (en) * | 2012-09-18 | 2014-04-03 | Disco Abrasive Syst Ltd | Protective film covering method |
-
1990
- 1990-03-07 JP JP5536890A patent/JPH03257849A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100246780B1 (en) * | 1996-10-31 | 2000-03-15 | 김영환 | Method of forming spin on glass layer |
JP2014060269A (en) * | 2012-09-18 | 2014-04-03 | Disco Abrasive Syst Ltd | Protective film covering method |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPH0645327A (en) | Semiconductor device and manufacture thereof | |
JPS611029A (en) | Method of flattening thin plate by plasma | |
JPS63104026A (en) | Manufacture of liquid crystal display device | |
JPH01185947A (en) | Manufacture of semiconductor device | |
JPH03257849A (en) | Manufacture of semiconductor device | |
US5554884A (en) | Multilevel metallization process for use in fabricating microelectronic devices | |
JPS63131546A (en) | Semiconductor device | |
JPH05267290A (en) | Semiconductor integrated circuit and manufacture thereof | |
JPH01238044A (en) | Semiconductor device | |
JPS63133550A (en) | Manufacture of semiconductor device | |
JPH07297183A (en) | Semiconductor device and its manufacture | |
JPH02180052A (en) | Manufacture of semiconductor device | |
JPS59104718A (en) | Production of thin film magnetic head | |
JPH0555225A (en) | Manufacture of semiconductor device | |
KR0141932B1 (en) | Method of manufacture in semiconductor device | |
JPS63236346A (en) | Manufacture of semiconductor device | |
KR930011112B1 (en) | Metal wiring method of semiconductor device | |
JPH0334675B2 (en) | ||
JPH04155927A (en) | Production of semiconductor device | |
JPS636847A (en) | Manufacture of semiconductor device | |
JPS60152041A (en) | Formation for multilayer wiring structure | |
JPS5895839A (en) | Manufacture of semiconductor device | |
JPH04264728A (en) | Semiconductor device and production thereof | |
JPS6132554A (en) | Formation of multilayer interconnection structure | |
JPH03148130A (en) | Manufacture of semiconductor device |