JPS63236346A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To easily form a metallic wiring with extremely excellent step coverage on a semiconductor substrate with fine contact hole by a method wherein a stage of coating the semiconductor substrate not impressed with high-frequency bias with a metallic film as well as another stage coating the semiconductor substrate impressed with high-frequency bias with the metallic film are alternately repeated to form the metallic film in specified thickness. CONSTITUTION:A semiconductor substrate 1 not impressed with highfrequency bias with a contact hole is firstly coated with a metallic wiring material 3. At this time, it is recommended that the film thickness of coating metallic wiring material 3 is 1/5-1/3 of the metallic wiring to be formed. Next, sputtering process is continued on the substrate 1 impressed with the high-frequency bias. In this stage, another wiring material 4 in the state of thick film is formed on the part of contact hole not coated in the preceding stage. At this time, the film thickness of another coating metallic material 4 is set up to be 1/3-1/2 of the metallic wiring to be formed. Finally the substrate 1 resumed to the state of not impressed with the high-frequency bias is coated with the same metallic wiring material 3 in the film thickness of 1/5-1/3 of the metallic wiring to be formed so that the metallic wiring in specified film thickness almost evenly coated on the bottom part and the end parts of opening part may be formed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to an improvement in the process of forming metal wiring by sputtering.

[Conventional technology]

Metal wiring in semiconductor devices is usually formed by sputtering, but means for applying a high frequency bias is also used in order to improve step coverage in contact holes. In this way, when high-frequency bias is applied during sputtering formation of a metal thin film, the metal wiring material is deposited deeply to the bottom of the contact hole.
Metal wiring with good coverage can be obtained.

[Problem that the invention seeks to solve]

However, when metal wiring material is sputtered under conditions where a high-frequency bias is applied, the strong electric field formed near the opening of the contact hole causes argon ions to re-sputter, resulting in breakage at the edge of the opening. becomes more likely to occur. Generally, when applying a high frequency bias, the bias power to be applied is adjusted depending on the size of the contact hole, but this power control is an extremely difficult task.

Particularly in recent years, when the degree of integration has been significantly increased and the size of contact holes has been miniaturized to about 1.5 μmφ, this tendency has become even stronger, causing frequent breakage accidents and significantly lowering production yields.

SUMMARY OF THE INVENTION In view of the above-mentioned circumstances, an object of the present invention is to provide a method for manufacturing a semiconductor device that includes a metal wiring process that allows metal wiring to be deposited on fine contact holes with extremely good step coverage.

[Means for solving problems]

According to the present invention, a method for manufacturing a semiconductor device alternately repeats a step of depositing a metal film on a semiconductor substrate without applying a high-frequency bias and a step of depositing a metal film with the application of a high-frequency bias, as desired. This includes the process of forming metal wiring to a film thickness of .

That is, according to the present invention, it is possible to avoid forming a metal wiring with a desired thickness at once while constantly applying a high-frequency bias as in the conventional method, and to form a metal wiring with a desired thickness while adjusting the time and timing of applying a high-frequency bias. A process for forming metal interconnects is provided.

By alternately repeating the steps of applying and not applying high-frequency bias in this way, the advantages of the sputtering characteristics of the two steps mutually complement each other's disadvantages, so that it can be extremely Metal wiring with good step coverage can be easily formed.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to the drawings.

FIGS. 1(a) to 1(c) are process flow diagrams showing one embodiment of the present invention. According to this embodiment, a metal wiring material 3 is first deposited on a semiconductor substrate 1 having a contact hole in a state where no high frequency bias is applied, as shown in FIG. 1(a). Here, 2 is an insulating film between the eyebrows such as phosphosilicate glass (PSG). At this time, the thickness of the metal wiring material 3 to be deposited is desirably 115 to 1/3 that of the metal wiring to be formed. At this stage shown in FIG. 1(a), the metal wiring material 3 thickly adheres to the vicinity of the opening of the contact hole and hardly reaches the bottom. Then, as shown in FIG. 1(b), sputtering is continued while a high frequency bias is applied. At this stage of FIG. 1(b), a thick film of metal wiring material 4 is also formed on the bottom of the contact hole which was not covered in the previous stage.

At this time, the film thickness of the metal wiring material 4 to be deposited is set to 1/3 to 1/2 of the metal wiring to be formed. In this way, the thickness of the metal wiring material 4 is set to 1/2 to 1 of the thickness of the metal wiring to be formed.
The reason why it is set to /3 is that the effect of high-frequency bias application can be maximized, and the constriction near the contact hole opening created at this time creates a slope that gives good coverage characteristics to the opening. Here, the state shifts again to the state where no high frequency bias is applied, and the metal wiring material 3
If the thickness of the metal wiring is 115 to 1/3 that of the metal wiring to be formed, the metal wiring of the desired thickness will adhere almost uniformly to the bottom of the contact hole and the end of the opening as shown in FIG. 1(C). can be obtained. According to this embodiment, the state in which the high frequency bias is applied enters the second stage, and a good coverage structure can be provided to the contact hole by reversing the re-sputtering phenomenon caused by argon ions, so there is no fear of step breakage. Metal interconnections with particularly excellent step coverage characteristics can be easily formed.

FIGS. 2(a) to 2(b) are process flow diagrams showing another embodiment of the present invention. According to this embodiment, in the first step, the metal wiring material 4 to which a high frequency bias is applied is first deposited, and then the metal wiring material 3 to which no high frequency bias is applied is laminated thereon. At this time, the thickness of each film is 1/2 of the metal wiring to be formed. Even in the case of this example, the high-frequency bias is not constantly applied while sputtering the metal wiring material, and on the contrary, the application of the high-frequency bias in the first stage has the effect of improving the coverage of the contact hole. As in the example, there is no need to worry about step breaks.
Metal wiring with excellent coverage characteristics can be formed.

〔Effect of the invention〕

As explained in detail above, according to the present invention, by alternately repeating the step of applying high frequency bias and the step of not applying high frequency bias, the disadvantages of the sputtering characteristics of the two steps can be mutually complemented with each other's advantages. Therefore, it is possible to easily form a metal wiring with particularly excellent step coverage characteristics even on a semiconductor substrate having a miniaturized contact hole.

[Brief explanation of drawings]

FIGS. 1(a) to (c) are process flowcharts showing one embodiment of the present invention, and FIGS. 2(a) to (b) are process flowcharts showing another embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Interlayer insulating film, 3... Metal wiring material deposited without applying high frequency bias, 4...
...Metal wiring material deposited with high frequency bias applied. λN-1・ ((A) (C) 81 Fig.

Claims (1)

[Claims] A metal wiring forming process is performed in which the steps of depositing a metal film on a semiconductor substrate without applying a high-frequency bias and depositing a metal film with a high-frequency bias are alternately repeated to form a desired film thickness. A method of manufacturing a semiconductor device, comprising: