JPH02180052A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To realize flattening of the surface by etching an application film at lower etching speed than that of an interlayer insulating film while using a first application film for flattening. CONSTITUTION:A wiring 3 is formed on a silicon oxide film 2 on the surface of a semiconductor substrate 1 in a required pattern and thereon an interlayer oxide film 4 is formed, further thereon a flattening application film 5 is applied for being baked. Next, a first etching back is performed under the condition, in which etching speed of the flattening application film 5 is slowed down than etching speed of the interlayer insulating film 4, while performing etching so that an etching face of the flattening application film 5 and an etching face of the interlayer oxide film 4 may be on the same height. Later again, the flattening application film 6 is applied, and a second etching back is performed under the condition, in which etching speed of the flattening application film 6 and the interlayer oxide film 4 is equalized. In this way, the interlayer oxide film is formed on the surface. Thereby, flattening of the surface can be realized.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a semiconductor device in which wiring layers are planarized.

[Conventional technology]

Conventionally, methods shown in FIGS. 2(a) to 2(c) have been used as a method for planarizing the surface of a wiring structure formed in a semiconductor device.

That is, as shown in FIG. 2A, a wiring 13 is formed on a silicon oxide film 12 on the surface of a semiconductor substrate 11, an interlayer oxide film 14 is formed thereon, and then a flattening coating film 15 is applied to the entire surface. Apply and bake to harden.

Next, as shown in FIG. 2B, the flattening coating film 15 is etched and packed using an anisotropic etching method. At this time, etching is performed under conditions such that the etching rate of the planarizing coating film 15 is higher than the etching rate of the interlayer oxide film 14. As a result, the planarizing coating film 15 remains only in the recessed portions of the interlayer oxide film 14.

Then, as shown in FIG. 2(c), a second interlayer oxide film 17 is formed on the interlayer oxide film 14 and the planarizing coating film 15,
Achieve surface flattening.

[Problem to be solved by the invention]

In the conventional manufacturing method described above, etching hacking is performed to control the overall thickness of the interlayer insulating film to a required thickness, but in order to prevent the thickness of the interlayer oxide film 14 from being excessively reduced. The etching rate of the planarizing coating film 15 is set higher than the etching rate of the interlayer oxide film 14. For this reason, the interlayer oxide film 1 is removed by the etching bank.
There is a problem in that the flattening coating film 15 in the recessed portion 4 is likely to be excessively etched, resulting in a level difference compared to before etching hacking, resulting in poor flatness.

An object of the present invention is to provide a method for manufacturing a semiconductor device having a wiring structure with excellent flatness.

[Means to solve the problem]

The method for manufacturing a semiconductor device of the present invention includes a step of applying a first planarizing coating film on an interlayer insulating film that covers a wiring layer formed on a semiconductor substrate, and applying the first planarizing coating film to A step of etching the surface to make it substantially flat under conditions that result in an etching rate slower than that of the film, a step of applying a second planarizing coating film on the etched surface, and a step of applying the second planarizing coating film to the etched surface. The method includes a step of etching the surface to a substantially flat surface at the same etching rate as that of the interlayer insulating film, and a step of forming an insulating film on the etched surface.

[Function] In the above-described method, etching using the first planarizing coating film prevents the coating film from being excessively etched with respect to the interlayer insulating film, and makes the coating film relatively uneven. so that it is as follows. Furthermore, by etching using the second planarizing coating film, the interlayer insulating film and the coating film are uniformly etched to achieve surface planarization.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) to 1(e) are longitudinal sectional views showing an embodiment of the present invention in the order of manufacturing steps.

First, as shown in FIG. 2A, a wiring 3 with a thickness of about 5,000 layers is formed in a desired pattern on a silicon oxide film 2 on the surface of a semiconductor substrate 1, and an interlayer oxide film with a thickness of about 6,000 layers is formed on this. form 4. A flattening coating film 5 is applied thereon,
Bake and harden.

Next, as shown in FIG. 3B, a first etching back is performed to etch back the flattening coating film 5.

At this time, the etching rate of the planarizing coating film 5 is set to be slower than that of the interlayer insulating film 4, and the etching surface of the planarizing coating film 5 and the etching surface of the interlayer oxide film 4 are at the same height. Perform etching to achieve the desired result.

Thereafter, as shown in FIG. 6(c), the flattening coating film 6 is applied again and baked to harden.

Next, as shown in FIG. 2D, a second etching back is performed. However, here, the planarizing coating film 6 and the interlayer oxide film 4 are
The etching speed is the same.

In addition, as shown in the same figure (e), a film thickness of 5000 mm was applied to the surface.
By forming the oxide film 7 with a spacing of about 100 mL, the surface can be flattened.

In this manufacturing method, the application of the flattening coating film 5 and its first
By etching back, a portion of the planarizing coating film 5 is made to protrude above the interlayer oxide film 4, and this protruding portion is removed by coating the planarizing coating film 6 and its second etching hack. Therefore, the surface flatness of the interlayer oxide film 7 formed thereon can be made extremely high.

Although the flattening film is applied and baked only once before each etching back, the flatness can be further improved by applying and baking the layer multiple times. .

〔Effect of the invention〕

As explained above, in the present invention, the first planarizing coating film is etched at a slower etching rate than the interlayer insulating film, so that the coating film is etched excessively with respect to the interlayer insulating film. This prevents etching and makes the coating film relatively protruding. Also, after that, the second
By using a flattening coating film and etching the coating film at approximately the same etching rate as the interlayer insulating film, it is possible to uniformly etch the interlayer insulating film and the coating film to realize surface planarization. There is an effect that can be done.

[Brief explanation of the drawing]

FIGS. 1(a) to (e) are longitudinal sectional views showing an embodiment of the present invention in the order of manufacturing steps, and FIGS. 2(a) to (c) are longitudinal sectional views showing a conventional method in the order of the manufacturing steps. 1... Semiconductor substrate, 2... Silicon oxide film, 3...
- Wiring, 4... Interlayer oxide film, 5, 6... Coating film for planarization, 7... Interlayer oxide film, 11... Semiconductor substrate, 12
... silicon oxide film, 13 ... wiring, 14 ... interlayer oxide film, 15 ... flattening coating film, 17 ... interlayer oxide film. ! ■−

Claims (1)

[Claims] 1. A step of applying a first planarizing coating film on an interlayer insulating film covering a wiring layer formed on a semiconductor substrate, and an etching rate of this planarizing coating film is slower than that of the interlayer insulating film. a step of etching the surface so that it becomes substantially flat under conditions; a step of applying a second planarizing coating film on the etched surface; and a step of etching the planarizing coating film at the same etching rate as the interlayer insulating film. 1. A method of manufacturing a semiconductor device, comprising: etching the surface to make it substantially flat under such conditions; and forming an insulating film on the etched surface.