JPH0317216B2 - - Google Patents
Info
- Publication number
- JPH0317216B2 JPH0317216B2 JP58203881A JP20388183A JPH0317216B2 JP H0317216 B2 JPH0317216 B2 JP H0317216B2 JP 58203881 A JP58203881 A JP 58203881A JP 20388183 A JP20388183 A JP 20388183A JP H0317216 B2 JPH0317216 B2 JP H0317216B2
- Authority
- JP
- Japan
- Prior art keywords
- wire
- bonding
- added
- strength
- tensile strength
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H10W72/015—
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/43—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/43—Manufacturing methods
- H01L2224/432—Mechanical processes
- H01L2224/4321—Pulling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/43—Manufacturing methods
- H01L2224/438—Post-treatment of the connector
- H01L2224/43848—Thermal treatments, e.g. annealing, controlled cooling
-
- H10W72/50—
-
- H10W72/5524—
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58203881A JPS6095956A (ja) | 1983-10-31 | 1983-10-31 | 半導体素子のボンデイング用Al線 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58203881A JPS6095956A (ja) | 1983-10-31 | 1983-10-31 | 半導体素子のボンデイング用Al線 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6095956A JPS6095956A (ja) | 1985-05-29 |
| JPH0317216B2 true JPH0317216B2 (cg-RX-API-DMAC10.html) | 1991-03-07 |
Family
ID=16481261
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58203881A Granted JPS6095956A (ja) | 1983-10-31 | 1983-10-31 | 半導体素子のボンデイング用Al線 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6095956A (cg-RX-API-DMAC10.html) |
-
1983
- 1983-10-31 JP JP58203881A patent/JPS6095956A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6095956A (ja) | 1985-05-29 |
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