JPH0316776B2 - - Google Patents

Info

Publication number
JPH0316776B2
JPH0316776B2 JP57025012A JP2501282A JPH0316776B2 JP H0316776 B2 JPH0316776 B2 JP H0316776B2 JP 57025012 A JP57025012 A JP 57025012A JP 2501282 A JP2501282 A JP 2501282A JP H0316776 B2 JPH0316776 B2 JP H0316776B2
Authority
JP
Japan
Prior art keywords
etching
thin film
metal thin
output
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57025012A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58141531A (ja
Inventor
Masayasu Abe
Masaharu Aoyama
Toshio Yonezawa
Takashi Yasujima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP57025012A priority Critical patent/JPS58141531A/ja
Priority to US06/467,298 priority patent/US4462856A/en
Publication of JPS58141531A publication Critical patent/JPS58141531A/ja
Publication of JPH0316776B2 publication Critical patent/JPH0316776B2/ja
Granted legal-status Critical Current

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Mechanical Engineering (AREA)
  • Materials Engineering (AREA)
  • Weting (AREA)
JP57025012A 1982-02-18 1982-02-18 半導体素子用金属薄膜エツチング装置 Granted JPS58141531A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP57025012A JPS58141531A (ja) 1982-02-18 1982-02-18 半導体素子用金属薄膜エツチング装置
US06/467,298 US4462856A (en) 1982-02-18 1983-02-17 System for etching a metal film on a semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57025012A JPS58141531A (ja) 1982-02-18 1982-02-18 半導体素子用金属薄膜エツチング装置

Publications (2)

Publication Number Publication Date
JPS58141531A JPS58141531A (ja) 1983-08-22
JPH0316776B2 true JPH0316776B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1991-03-06

Family

ID=12153998

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57025012A Granted JPS58141531A (ja) 1982-02-18 1982-02-18 半導体素子用金属薄膜エツチング装置

Country Status (2)

Country Link
US (1) US4462856A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS58141531A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4886552A (en) * 1988-09-09 1989-12-12 United Technologies Corporation Method for monitoring the removal of a metallic contaminant from the surface of a metallic article
DE3832660A1 (de) * 1988-09-26 1990-03-29 Texas Instruments Deutschland Verfahren und vorrichtung zum abaetzen einer auf einem substrat angebrachten elektrisch leitenden schicht
US5256565A (en) * 1989-05-08 1993-10-26 The United States Of America As Represented By The United States Department Of Energy Electrochemical planarization
JP3638715B2 (ja) * 1996-05-27 2005-04-13 株式会社ルネサステクノロジ 半導体装置の評価方法
US5911864A (en) * 1996-11-08 1999-06-15 Northrop Grumman Corporation Method of fabricating a semiconductor structure
KR100265556B1 (ko) * 1997-03-21 2000-11-01 구본준 식각장치

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3755026A (en) * 1971-04-01 1973-08-28 Sprague Electric Co Method of making a semiconductor device having tunnel oxide contacts
GB1434199A (en) * 1972-10-19 1976-05-05 Wilkinson Sword Ltd Selective electrolytic dissolution of predetermined metals
US3874959A (en) * 1973-09-21 1975-04-01 Ibm Method to establish the endpoint during the delineation of oxides on semiconductor surfaces and apparatus therefor
US4058438A (en) * 1975-07-18 1977-11-15 The United States Of America As Represented By The Secretary Of The Army Rapid universal sensing cell
JPS5387667A (en) * 1977-01-12 1978-08-02 Hitachi Ltd Detecting method for etching end point of non-conductive film
JPS54116179A (en) * 1978-03-01 1979-09-10 Kunihiko Kanda Method of forming electric wire
JPS54116180A (en) * 1978-03-01 1979-09-10 Kunihiko Kanda Method of forming electric wire
JPS5531639A (en) * 1978-08-29 1980-03-06 Kunihiko Kanda Forming method for electric wiring
JPS5562737A (en) * 1978-11-02 1980-05-12 Kunihiko Kanda Wiring method for semiconductor element
US4336111A (en) * 1978-11-02 1982-06-22 The Boeing Company Method for determining the strength of a metal processing solution
US4229264A (en) * 1978-11-06 1980-10-21 The Boeing Company Method for measuring the relative etching or stripping rate of a solution
US4338157A (en) * 1979-10-12 1982-07-06 Sigma Corporation Method for forming electrical connecting lines by monitoring the etch rate during wet etching
JPS5655093A (en) * 1979-10-12 1981-05-15 Kunihiko Kanda Method of forming electric circuit
JPS56127773A (en) * 1980-03-12 1981-10-06 Hitachi Ltd Etching device

Also Published As

Publication number Publication date
US4462856A (en) 1984-07-31
JPS58141531A (ja) 1983-08-22

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