JPH0315778B2 - - Google Patents

Info

Publication number
JPH0315778B2
JPH0315778B2 JP56050375A JP5037581A JPH0315778B2 JP H0315778 B2 JPH0315778 B2 JP H0315778B2 JP 56050375 A JP56050375 A JP 56050375A JP 5037581 A JP5037581 A JP 5037581A JP H0315778 B2 JPH0315778 B2 JP H0315778B2
Authority
JP
Japan
Prior art keywords
processor
data
address
simulation
sent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56050375A
Other languages
English (en)
Japanese (ja)
Other versions
JPS57164363A (en
Inventor
Atsushi Sugano
Kenichi Ueda
Kunio Pponda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP5037581A priority Critical patent/JPS57164363A/ja
Publication of JPS57164363A publication Critical patent/JPS57164363A/ja
Publication of JPH0315778B2 publication Critical patent/JPH0315778B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/261—Functional testing by simulating additional hardware, e.g. fault simulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
JP5037581A 1981-04-02 1981-04-02 Simulation system in multi-processor system Granted JPS57164363A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5037581A JPS57164363A (en) 1981-04-02 1981-04-02 Simulation system in multi-processor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5037581A JPS57164363A (en) 1981-04-02 1981-04-02 Simulation system in multi-processor system

Publications (2)

Publication Number Publication Date
JPS57164363A JPS57164363A (en) 1982-10-08
JPH0315778B2 true JPH0315778B2 (zh) 1991-03-01

Family

ID=12857128

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5037581A Granted JPS57164363A (en) 1981-04-02 1981-04-02 Simulation system in multi-processor system

Country Status (1)

Country Link
JP (1) JPS57164363A (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59161737A (ja) * 1983-03-04 1984-09-12 Hitachi Ltd マイクロプロセツサシステム
JP2590179B2 (ja) * 1988-02-16 1997-03-12 富士通株式会社 並列論理シミュレーション制御方式

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57141759A (en) * 1981-02-26 1982-09-02 Nec Corp Data processing system
JPS57143669A (en) * 1981-02-28 1982-09-04 Omron Tateisi Electronics Co Debugging device for multiprocessor system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57141759A (en) * 1981-02-26 1982-09-02 Nec Corp Data processing system
JPS57143669A (en) * 1981-02-28 1982-09-04 Omron Tateisi Electronics Co Debugging device for multiprocessor system

Also Published As

Publication number Publication date
JPS57164363A (en) 1982-10-08

Similar Documents

Publication Publication Date Title
CA1233264A (en) Data processor having dynamic bus sizing
US4688171A (en) Serial bus for master/slave computer system
JP2709705B2 (ja) マルチコンピユータシステムにおけるプログラム管理方法
JPH0315778B2 (zh)
US4639860A (en) Wrap-around logic for interprocessor communications
US6112229A (en) Secure terminal and method of communicating messages among processing systems internal thereto
JPS6019821B2 (ja) シリアルデ−タ受信方式
EP0376003A2 (en) Multiprocessing system with interprocessor communications facility
JPS6259825B2 (zh)
JPS62135038A (ja) スレ−ブプロセツサのデ−タ通信方式
CA1309503C (en) Selective receiver for each processor in a multiple processor system
JP2595808B2 (ja) 分散処理用メモリ装置
JPS62206657A (ja) プロセツサ間デ−タ転送方式
JPH0520783B2 (zh)
JPS6130300B2 (zh)
WO1992005489A1 (en) Method of nonsynchronous access to shared memory
US7478137B1 (en) Lightweight messaging with and without hardware guarantees
CN116701084A (zh) 总线协议验证方法、装置、设备、存储介质及程序产品
JPS6124739B2 (zh)
JPH03252848A (ja) スプリットバスにおける可変バス幅指定方式及び可変バス幅情報受信方式
JP2586155B2 (ja) 論理シミュレータ
JPS6049464A (ja) マルチプロセッサ計算機におけるプロセッサ間通信方式
JPS59221131A (ja) デ−タ伝送ステ−シヨン
JPS61100036A (ja) ２重化システムデ−タ受信処理方式
JP2659410B2 (ja) データフローコンピュータの実行一時停止方式