JPS57143669A - Debugging device for multiprocessor system - Google Patents

Debugging device for multiprocessor system

Info

Publication number
JPS57143669A
JPS57143669A JP56029042A JP2904281A JPS57143669A JP S57143669 A JPS57143669 A JP S57143669A JP 56029042 A JP56029042 A JP 56029042A JP 2904281 A JP2904281 A JP 2904281A JP S57143669 A JPS57143669 A JP S57143669A
Authority
JP
Japan
Prior art keywords
controller
debugging device
optional
test
constitution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56029042A
Other languages
Japanese (ja)
Inventor
Makoto Kawai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Tateisi Electronics Co
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tateisi Electronics Co, Omron Tateisi Electronics Co filed Critical Tateisi Electronics Co
Priority to JP56029042A priority Critical patent/JPS57143669A/en
Publication of JPS57143669A publication Critical patent/JPS57143669A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/3668—Testing of software
    • G06F11/3672—Test management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To simplify the constitution, by operating manually switches to test the operation of each controller easily in a debugging device used for the operation test of each controller. CONSTITUTION:In a debugging device 1, switches 16-17, 19, and 20 are operated manually to write optional command data to an optional area of a main memory, to give a start command to an optional controller C1 to execute a processing based on command data, and to read and display response data which is written to the main memory 3 by the controller C1 after the execution of this processing. Consequently, these functions are used freely to test controllers C1-C3 in respects of hardware and software.
JP56029042A 1981-02-28 1981-02-28 Debugging device for multiprocessor system Pending JPS57143669A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56029042A JPS57143669A (en) 1981-02-28 1981-02-28 Debugging device for multiprocessor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56029042A JPS57143669A (en) 1981-02-28 1981-02-28 Debugging device for multiprocessor system

Publications (1)

Publication Number Publication Date
JPS57143669A true JPS57143669A (en) 1982-09-04

Family

ID=12265335

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56029042A Pending JPS57143669A (en) 1981-02-28 1981-02-28 Debugging device for multiprocessor system

Country Status (1)

Country Link
JP (1) JPS57143669A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57164363A (en) * 1981-04-02 1982-10-08 Matsushita Electric Ind Co Ltd Simulation system in multi-processor system
JPS603778A (en) * 1983-06-21 1985-01-10 Fujitsu Ltd Processor reset method
JPS6149260A (en) * 1984-08-17 1986-03-11 Fujitsu Ltd Channel processing device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5463644A (en) * 1977-10-31 1979-05-22 Toshiba Corp Multiprocessing system
JPS55134457A (en) * 1979-04-04 1980-10-20 Toshiba Corp Maintenance unit in multiprocessor system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5463644A (en) * 1977-10-31 1979-05-22 Toshiba Corp Multiprocessing system
JPS55134457A (en) * 1979-04-04 1980-10-20 Toshiba Corp Maintenance unit in multiprocessor system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57164363A (en) * 1981-04-02 1982-10-08 Matsushita Electric Ind Co Ltd Simulation system in multi-processor system
JPS603778A (en) * 1983-06-21 1985-01-10 Fujitsu Ltd Processor reset method
JPS6149260A (en) * 1984-08-17 1986-03-11 Fujitsu Ltd Channel processing device

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