JPH0313680B2 - - Google Patents

Info

Publication number
JPH0313680B2
JPH0313680B2 JP58168689A JP16868983A JPH0313680B2 JP H0313680 B2 JPH0313680 B2 JP H0313680B2 JP 58168689 A JP58168689 A JP 58168689A JP 16868983 A JP16868983 A JP 16868983A JP H0313680 B2 JPH0313680 B2 JP H0313680B2
Authority
JP
Japan
Prior art keywords
dummy
column
row
decoder
memory cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58168689A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6059599A (ja
Inventor
Misao Higuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP58168689A priority Critical patent/JPS6059599A/ja
Publication of JPS6059599A publication Critical patent/JPS6059599A/ja
Publication of JPH0313680B2 publication Critical patent/JPH0313680B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
JP58168689A 1983-09-13 1983-09-13 不揮発性半導体メモリ Granted JPS6059599A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58168689A JPS6059599A (ja) 1983-09-13 1983-09-13 不揮発性半導体メモリ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58168689A JPS6059599A (ja) 1983-09-13 1983-09-13 不揮発性半導体メモリ

Publications (2)

Publication Number Publication Date
JPS6059599A JPS6059599A (ja) 1985-04-05
JPH0313680B2 true JPH0313680B2 (enrdf_load_stackoverflow) 1991-02-25

Family

ID=15872637

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58168689A Granted JPS6059599A (ja) 1983-09-13 1983-09-13 不揮発性半導体メモリ

Country Status (1)

Country Link
JP (1) JPS6059599A (enrdf_load_stackoverflow)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2587531B1 (fr) * 1985-04-26 1991-04-26 Eurotechnique Sa Memoire morte programmable electriquement une seule fois
DE3577167D1 (de) * 1985-08-28 1990-05-17 Ibm Verfahren zur schnellen verstaerkungseinstellung in einem modemempfaenger.
JPS62177799A (ja) * 1986-01-30 1987-08-04 Toshiba Corp 半導体記憶装置
US4749947A (en) * 1986-03-10 1988-06-07 Cross-Check Systems, Inc. Grid-based, "cross-check" test structure for testing integrated circuits
JPS62229600A (ja) * 1986-03-31 1987-10-08 Toshiba Corp 不揮発性半導体記憶装置
JPS6334800A (ja) * 1986-07-28 1988-02-15 Nec Ic Microcomput Syst Ltd 半導体メモリ
JPH07105147B2 (ja) * 1987-09-09 1995-11-13 株式会社東芝 半導体記憶装置
US5065090A (en) * 1988-07-13 1991-11-12 Cross-Check Technology, Inc. Method for testing integrated circuits having a grid-based, "cross-check" te
KR100704025B1 (ko) * 2005-09-09 2007-04-04 삼성전자주식회사 셀스트링에 배치되는 더미셀을 가지는 불휘발성 반도체메모리 장치

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5853440B2 (ja) * 1978-11-25 1983-11-29 富士通株式会社 テストビット選択用論理回路

Also Published As

Publication number Publication date
JPS6059599A (ja) 1985-04-05

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